Texas Instruments LM53625 QEVM Series User manual

LM53625xQEVM and LM53635xQEVM
User's Guide
Literature Number: SNVU526
May 2016

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Table of Contents
Contents
1 Introduction......................................................................................................................... 3
2 Technical Specification EVM Board........................................................................................ 4
3 Schematics ......................................................................................................................... 5
4 Board Layout....................................................................................................................... 7
5 Operation and Test Setup.................................................................................................... 11
5.1 Efficiency Measurement ............................................................................................... 11
5.2 Measure Load Transient............................................................................................... 12
5.3 Measure EMI............................................................................................................ 12
6 Posts, Probes, and Jumpers................................................................................................ 13
6.1 VIN1 and GND1 Posts................................................................................................. 13
6.2 VOUT and GND Posts................................................................................................. 13
6.3 IN+ and IN- Posts....................................................................................................... 13
6.4 EN and GND2 Probe................................................................................................... 13
6.5 VINs, VOUTs, and GNDs Probe...................................................................................... 13
6.6 BIAS and GNDS Probe ................................................................................................ 13
6.7 RESET and GND3 Probe.............................................................................................. 14
6.8 SYNC and GND3 Probe............................................................................................... 14
6.9 Jumper J1................................................................................................................ 14
6.10 Jumper J2................................................................................................................ 14
6.11 Jumper J3................................................................................................................ 14
7 Bill of Materials .................................................................................................................. 14
8 Efficiency and Line- and Load-Regulation ............................................................................. 16
8.1 Load Transients......................................................................................................... 17
8.2 Conducted EMI.......................................................................................................... 17

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LM53625xQEVM and LM53635xQEVM User's Guide
User's Guide
SNVU526–May 2016
LM53625xQEVM and LM53635xQEVM User's Guide
1 Introduction
The LM53635xEVM is specifically designed for automotive applications, providing a fixed output voltage of
5 V, 3.3 V, or an adjustable output voltage at 3.5-A continuous load. The LM53625xEVM is implemented
using the same board and components but with or an IC with current limit set for 2.5 A maximum
continuous load.
Figure 1. LM53625xQEVM and LM53635xQEVM Evaluation Board – Top View
All aspects of the LM53625xQEVM and LM53635xQEVM are optimized for the automotive market. An
input voltage range to 36 V eases input surge protection design. Exceptional dropout performance allows
the elimination of a boost stage in many designs for start/stop applications. An open drain RESET output,
with filtering and Power-GOOD delay, provides a true indication of system status. This feature negates the
requirement for additional supervisory circuitry, saving cost, and board space. Seamless transition
between PWM and PFM operation AUTO MODE, along with a low quiescent current, ensures high
efficiency at all loads. The Texas Instruments LM53625QEVM and LM53635xQEVM helps to evaluate the
operation and performance of the LM53625x and LM53635x and is available for order in five variants. See
Table 1 of orderable EVM variants and configuration.
Table 1. Orderable EVM Variants and Configuration for LM53625 and LM53635
EVM VARIANT EVM ORDERABLE
NAME IC U1 CONTINUOUS LOAD OUTPUT VOLTAGE SPREAD SPECTRUM
001 LM536253QEVM LM536253QRNLRQ1 2.5 A 3.3 V Fixed —
002 LM53635AQEVM LM53635AQRNLRQ1 3.5 A 5 V Adjusted —
003 LM53635LQEVM LM53635LQRNLRQ1 3.5 A 5 V Fixed Yes
004 LM53635MQEVM LM53635MQRNLRQ1 3.5 A 5 V Adjusted Yes
005 LM53635NQEVM LM53635NQRNLRQ1 3.5 A 3.3 V Fixed Yes

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LM53625xQEVM and LM53635xQEVM User's Guide
2 Technical Specification EVM Board
Table 2 shows specifications for the LM53625xQEVM and LM53635xQEVM board.
Table 2. Technical Specification
BOARD SIZE
4000 × 3000 mil 101 mm × 76 mm 76 cm2
BOARD LAYER
4-Layer FR4 PCB Top Layer1 and Bottom Layer2
Mid Layer2 and Mid Layer3 2.8 mil 2 oz. Cu 1.4 mil 1 oz. Cu
SOLUTION SIZE
860 mil × 490 mil 22 mm × 12.5 mm 2.75 cm2
POWER INPUT
VIN1 and GND1
IN+ / IN- Power Supply Input Power Input for EMI Test typical 13.5 V (range 3.5 to 36 V) transient typical 13.5 V
Power Output:
VOUT and GND Power Output to Load typical 3.3 V or 5 V
JUMPERS
J1 FPWM pin
J2 ENABLE pin
J3 RESET pin
Auto Mode or Forced PWM
Enable LM536325x and LM536335x
Open drain output
Set – Default [AUTO-MODE]
Set – Default [EN-VIN]
Optional - [RESET-VOUT]
TEST POINTS
GNDs, GND2 and GND3
EN
VINs
VOUTs
BIAS
RESET
SYNC
Sense GND Points
Enable Pin Voltage
Input Voltage Sense
Output Voltage Sense
BIAS Voltage Sense
RESET output
Switch node SYNC input
If J2[EN-VIN] then VIN1 3.5 - 36 V
Sense VIN1 3.5 to 36 V
Sense VOUT typical 3.3 V or 5 V
Sense BIAS typical 3.3 V or 5 V
If J3 [RESET-VOUT] then VOUTs
external sync frequency source

BIAS
RESET
AGND
SW
0.47µF
Cb
47µF
Co3
22µF
Co2
22µF
Co1
GND
FB
BIAS
EN
VOUT
GND
LM53635 3.5A
SV601262A Evaluation Board
0.1µF
Co4
EN
SYNC
GND
FPWM
GND
GND
1
2
3
J2
HTSW-103-07-G-S
100k
R3
EN Jumper
100k
R7 VOUT
RESET
SH-J1
FPWM Jumper
SH-J2
SH-J3
Reset Jumper
GND2
GND3
GND GND
AGND
AGND
0.047µF
Cin_hf2
0.047µF
Cin_hf1
10µF
C2
10µF
C1
GNDGND
VCC
1
CBOOT 2
SYNC
3
PVIN1
4
PGND1 5
PGND1 6
PGND1 7
PGND1 8
SW 9
PGND2 10
PGND2 11
PGND2 12
PGND2 13
PVIN2
14
AVIN
15
FPWM
16
NC
17
EN
18 RESET 19
AGND 20
FB 21
BIAS 22
U1
LM53635RNL
GND
EVM Variants Table
Variant Label Text
001 LM536253QEVM 3.3V / 2.5A w/o SS
002 LM53635AQEVM ADJ / 3.5A w/o SS
003
004
005
LM53635LQEVM 5.0V / 3.5A with SS
LM53635MQEVM ADJ / 3.5A with SS
LM53635NQEVM 3.3V / 3.5A with SS
1 2
J3 HTSW-102-07-G-S
1
2
3
J1
HTSW-103-07-G-S
Vout
3.3V fixed
5.0V adjust.
5.0V fixed
5.0V adjust.
3.3V fixed
EN
VINVIN
BOOT
4.7µF
Cvcc
100k
R6
RESET
0.1µF
Cbias
VOUT
VOUT
VIN
VOUTs
GNDs
VINs
2.2µH
L1
SYNC
3.0
Rbias
AGND GND
NTG
Net-Tie
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LM53625xQEVM and LM53635xQEVM User's Guide
3 Schematics
Figure 2. Fixed - Output Voltage Option Schematic
The fixed voltage option has an internal resistor divider and FB pin that connects directly to Cout capacitor.
NOTE: Cvcc and Cbias must connect directly to pin 20 AGND.

BIAS
RESET
AGND
SW
0.47µF
Cb
47µF
Co3
22µF
Co2
22µF
Co1
GND
FB
BIAS
EN
VOUT
GND
LM53635 3.5A
SV601262A Evaluation Board
0.1µF
Co4
EN
SYNC
GND
FPWM
GND
GND
1
2
3
J2
HTSW-103-07-G-S
100k
R3
EN Jumper
100k
R7 VOUT
RESET
49.9k
RFBT
12.1k
RFBB
15pF
CFF
AGND
SH-J1
FPWM Jumper
SH-J2
SH-J3
Reset Jumper
GND2
GND3
GND GND
AGND
AGND
0.047µF
Cin_hf2
0.047µF
Cin_hf1
10µF
C2
10µF
C1
GNDGND
VCC
1
CBOOT 2
SYNC
3
PVIN1
4
PGND1 5
PGND1 6
PGND1 7
PGND1 8
SW 9
PGND2 10
PGND2 11
PGND2 12
PGND2 13
PVIN2
14
AVIN
15
FPWM
16
NC
17
EN
18 RESET 19
AGND 20
FB 21
BIAS 22
U1
LM53635RNL
GND
EVM Variants Table
Variant Label Text
001 LM536253QEVM 3.3V / 2.5A w/o SS
002 LM53635AQEVM ADJ / 3.5A w/o SS
003
004
005
LM53635LQEVM 5.0V / 3.5A with SS
LM53635MQEVM ADJ / 3.5A with SS
LM53635NQEVM 3.3V / 3.5A with SS
1 2
J3 HTSW-102-07-G-S
1
2
3
J1
HTSW-103-07-G-S
Vout
3.3V fixed
5.0V adjust.
5.0V fixed
5.0V adjust.
3.3V fixed
EN
VINVIN
BOOT
4.7µF
Cvcc
100k
R6
RESET
0.1µF
Cbias
VOUT
VOUT
VIN
VOUTs
GNDs
VINs
2.2µH
L1
SYNC
3.0
Rbias
AGND GND
NTG
Net-Tie
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Figure 3. Adjustable - Output Voltage Option Schematic
Adjustable option uses external resistor divider to define output voltage. The CFF capacitor can be adjusted to make the feedback loop response
faster for load transient. By lowering the total resistance of the feedback divider the noise immunity can be increased.
NOTE: To minimize noise coupling into the feedback pin, the maximum resistance recommended in the feedback resistors RFBB and RFBT is 50
kΩ. The feedback resistors RFBB and RFBT must be placed as close to the FB pin as possible, and RFBB must be grounded to AGND
pin.

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4 Board Layout
The LM53635xQEVM uses a four-layer PCB stack-up design. Top Layer 1 and Bottom Layer 4 are
implemented using 2 oz. copper for optimized heat transfer and dissipation. Mid Layer 2 and Mid Layer 3
utilize 1 oz. copper. Total PCB thickness is 61 mil (1.55 mm).
Figure 4. Four-Layer PCB Stack-Up
The overall EVM PCB board size dimension is 4000 mil × 3000 mil (101 mm × 76 mm) with a top surface
area of 76 cm2. All vias on the PCB are constructed using 8-mil drill thru-hole with 16-mil pad size.
Figure 5 to Figure 8 shows the PCB Layout for each Cu Layer. Top Layer1 and Bottom Layer4 are
constructed using large filled Cu areas connected to GND. This is done to improve thermal performance
as well as improve overall EMI performance. Mid Layer 2 is constructed using a large GND plane as well.
The intention here is to minimize loop inductance by placing metal right under the Top Layer 1 traces
minimizing the cross section of current loops. Mid Layer 3 is mainly used to route non-critical signal traces
to the IC.
NOTE: The PCB board layout is not fully optimized to use for final applications, but gives a good
starting point. The layout can be simplified and optimized by eliminating features included for
evaluation purposes such as measurement sense lines, jumper connections and features
unused in a particular application such as the feedback resistor divider for fixed voltage
options.

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Figure 5. PCB Layout Top Layer 1 – Top View
Figure 6. PCB Layout Mid Layer 2 GND Plane – Top View

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Figure 7. PCB Layer Mid Layer 3 – Top View
Figure 8. PCB Layer Bottom Layer 4 – Flipped View (as Seen From Bottom of Board)

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Figure 9. PCB Layer 5 – Dimensions
Figure 10. PCB Layer 7 Composite Top

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Figure 11. PCB Layer 6 Composite Bottom
5 Operation and Test Setup
5.1 Efficiency Measurement
1. Connect power supply to posts VIN1 and GND1 and make sure the power supply provides sufficient
current.
NOTE: There is no reverse polarity protection or fuse on the evaluation board.
2. Connect electronic load to posts VOUT and GND. For all power wires use preferable twisted lab wires.
If the power supply wires are very long > 50 cm please solder additional 470 µF, 50 V bulk capacitor to
posts VIN1 and GND1. Always use sufficient power wires and separate measurement sense wires.
NOTE: These sense lines are not designed to carry power.
3. To accurately sense input and output voltage use the test points VINs, VOUTs, and GNDs.
Alternatively sense wires can be soldered directly over input capacitors C1 or C2 and the output
capacitors C01 or C02.
4. Make sure the IC is enabled by having jumper J2 set to [EN-VIN] and check test point EN is driven
high. While measuring Iq (unloaded input current) remove all the input and output voltage probes that
are most likely causing additional current draw.
NOTE: If the jumper J1 is set to [MODE-FPWM] the part will have a lower efficiency at light loads by
maintaining the 2.1-MHz switch frequency. To measure the highest light load efficiency place
the Jumper J1 in [AUTO-MODE].

GND
when l aying out the board, keep the EMI fi l ter away from Swi tch Node.
IN+
IN-
GND
VIN1
100µF
Cbulk
4.7µF
CF1
4.7µF
CF2
0.1µF
CHF1
0.1µF
CHF2
EMI FILTER
2.2µHLF1
IHLP2020CZER2R2M11
12
3
4
LCM
VIN
GND1
IN+
IN-
600 ohm
FB1
4 A 2220
0
R1
0
R2
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5.2 Measure Load Transient
1. Connect power supply to posts VIN1 and GND1 and make sure the power supply can provide
sufficient peak current.
NOTE: There is no reverse polarity protection or fuse on the evaluation board.
2. Connect transient load to posts VOUT and GND. For all power wires use preferable twisted lab wires.
If the power supply wires are very long > 50 cm; solder additional 470 µF, 50 V bulk capacitor to posts
VIN1 and GND1. Use sufficient power wires to avoid voltage drops and use short sense probe
connection for the measurement.
3. To accurately sense the output voltage, the scope probe should be placed directly over the output
capacitors C01 or C02. Make sure to connect scope probe GND ring directly to the output capacitor
GND pad for minimal ground loop. Ground loops can introduce ringing in observed waveforms which is
an artifact; not present on the PCB. Alternatively use differential probe over output capacitors C01 or
C02. Do not use wires to differential probe and always probe directly with shortest possible pins.
Make sure the IC is enabled by having jumper J2 set to [EN-VIN] and check test point EN is driven
high and not drooping during the load transient.
5.3 Measure EMI
1. Connect power supply cable from LISN to posts IN+ and IN- and make sure the board is placed 5 cm
above the table.
NOTE: The length of the LISN cable to VIN+/VIN- should be between 20 cm to 40 cm for conducted
EMI CISPR 25.
2. Connect resistive load directly to posts VOUT and GND. Use extremely short leads.
NOTE: To accurately measure EMI make sure the table has good ground connection to the
chamber, connect the battery GND cable to ground table, and do not touch the board and
setup or close the switch node. The board has a very effective 3-stage EMI filter where the
common mode choke is not assembled by default. If the common mode choke is added,
remove the bypass resistors R1 and R2.
Figure 12. 3-Stage EMI Filter Schematic

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Figure 13. Position of the EMI Filter Components on PCB – Bottom Layer
6 Posts, Probes, and Jumpers
6.1 VIN1 and GND1 Posts
Standard input posts from power supply to operate EVM. The maximum input voltage is 36 V with 42 V
absolute maximum transient.
6.2 VOUT and GND Posts
Standard output posts to load. Use sufficient lab cables and preferable twist them to reduce inductive
parasitic of lab cables. The typical output voltage is 5 V or 3.3 V.
6.3 IN+ and IN- Posts
Standard Input posts for EMI Measurements so the IC is operated with EMI input Filter. By default there is
a 2-stage filter assembled with a wire wound Inductor PI-Filter for low frequency filtering followed by stage
utilizing a ferrite bead for high frequency filtering. If one wishes to measure a setup with a common mode
choke; add the choke and remove bypass resistors R1 and R2.
6.4 EN and GND2 Probe
EN and GND2 probe can be used to measure the enable voltage or drive it from external source. If an
external source is used make sure to remove jumper J2. By default J2 jumper is set EN to VIN.
6.5 VINs, VOUTs, and GNDs Probe
VINs and VOUTs are sense points for input and output voltage.
NOTE: Do not use for power supply or load.
These probe points are intended for use as kelvin sense point for static measurements like efficiency or
line- or load regulation. For dynamic measurements please measure directly over the input capacitors C1
and C2 or directly over the output capacitor CO1 and CO2.
6.6 BIAS and GNDS Probe
BIAS probe senses the bias voltage to the IC. Bias voltage is provided from the output voltage of the IC
over Rbias = 3 Ωresistor. An external Bias supply voltage can be provided by removing Rbias located on
bottom side of PCB to disconnect IC output voltage as source for bias.

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6.7 RESET and GND3 Probe
RESET provides an accurate power good signal with release delay. By default jumper J3 is set to VOUT
and pulls the RESET pin to VOUT through a 100-kΩresistor. RESET is an open drain output so it can be
pulled to other external voltage levels by removing jumper J3.
6.8 SYNC and GND3 Probe
By default the IC is running with internal oscillator at 2.1 MHz. There are IC options available with and
without internal spread spectrum modulation. Over the SYNC pin, an external function generator can be
connected to take control of the LM53625 and LM53635’s clock, changing switching frequency. SYNC
function is responsive enough to be used for custom frequency modulation techniques.
6.9 Jumper J1
Jumper J1 sets light load operation mode of the IC. If set to [AUTO-MODE] when lightly loaded the IC
goes automatically into PFM mode operation with fewer switching pulses and higher efficiency. The IC can
be set into forced PWM mode (jumper position is marked FPWM) to operate with a constant switching
frequency over the entire load range. This forced FPWM mode of operation will have best load transient
behavior as well because there is no operation mode change during load transient steps.
6.10 Jumper J2
Jumper J2 enables the IC. By default it is set to [EN-VIN] and pulls the enable pin through a 100-kΩ
resistor to Vin. If an external source drives the EN pin then remove jumper J2 and use probe points EN
and GND2 or use a 3-pin wire connector directly plugged over J2.
6.11 Jumper J3
Jumper J3 pulls the open drain RESET output to VOUT through a 100-kΩresistor. If another RESET
output level is needed use probe point RESET and pullup resistor to external reference voltage and
remove jumper J3.
7 Bill of Materials
Table 3. Bill of Materials
DESIGNATOR QTY VALUE DESCRIPTION PART NUMBER
BIAS, EN, RESET, SYNC 4 Test Point, Miniature, White, TH 5002
C1, C2 2 10 µF CAP, CERM, 10 µF, 50 V, ±10%, X5R, 1206_109 GRM31CR61H106KA12L
Cb 1 0.47 µF CAP, CERM, 0.47 µF, 25 V, ±10%, X5R, 0603 GRM188R61E474KA12D
Cbias, Co4 2 0.1 µF CAP, CERM, 0.1 µF, 16 V, ±10%, X7R, AEC-Q200 Grade
1, 0603 GCM188R71C104KA37J
Cbulk 1 100 µF CAP, Aluminum Polymer, 100 µF, 50 V, ±20%, 0.025 Ω,
AEC-Q200 Grade-2 HHXB500ARA101MJA0G
CF1, CF2 2 4.7 µF CAP, CERM, 4.7 µF, 50 V, ±20%, X7R, AEC-Q200 Grade
1, 1210 CGA6P3X7R1H475M250AB
CHF1, CHF2 2 0.1 µF CAP, CERM, 0.1 µF, 16 V, ±10%, X7R, AEC-Q200 Grade
1, 0603 CGJ3E2X7R1C104K080AA
Cin_hf1, Cin_hf2 2 0.047 µF CAP, CERM, 0.047 µF, 50 V, +/- 10%, X7R, 0603 GRM188R71H473KA61D
Co1, Co2 2 22 µF CAP, CERM, 22 µF, 10 V, ±10, X7R, 1206 GRM31CR71A226KE15L
Co3 1 47 µF CAP, CERM, 47 µF, 10 V, ±10, X7R, 1210 GRM32ER71A476KE15L
Cvcc 1 4.7 µF CAP, CERM, 4.7 µF, 16 V, ±10%, X7R, AEC-Q200 Grade
1, 0805 GCM21BR71C475KA73L
FB1 1 600 ΩFerrite Bead, 600 Ωat 100 MHz, 4 A, 2220 HI2220P601R-10
GND, GND1, IN+, IN-,
VIN1, VOUT 6 Double Terminal, Turret, TH, Double 1502-2
GND2, GND3, GNDs 3 Black Test Point, Miniature, Black, TH 5001
H1, H2, H3, H4 4 Machine Screw, Round, #4-40 × 1/4, Nylon, Philips
panhead NY PMS 440 0025 PH

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Table 3. Bill of Materials (continued)
DESIGNATOR QTY VALUE DESCRIPTION PART NUMBER
H5, H6, H7, H8 4 Standoff, Hex, 0.5"L #4-40 Nylon 1902C
J1, J2 2 Header, 100 mil, 3×1, Gold, TH HTSW-103-07-G-S
J3 1 Header, 100 mil, 2×1, Gold, TH HTSW-102-07-G-S
L1 1 2.2 µH Inductor, Shielded, Powdered Iron, 2.2 µH, 10.2 A,
0.00941 Ω, SMD IHLP3232DZER2R2M11
LCM 0 Coupled inductor, 5 A, 0.01 Ω, SMD ACM9070-701-2PL-TL01
LF1 1 2.2 µH Inductor, Shielded Drum Core, Powdered Iron, 2.2 µH, 5.5
A, 0.025 Ω, SMD IHLP2020CZER2R2M11
R1, R2 2 0 ΩRES, 0Ω, 5% 0.25 W, 1206 CRCW12060000Z0EA
R3, R6, R7 3 100 k RES, 100 K, 5%, 0.1 W, 0603 CRCW0603100KJNEA
Rbias 1 3 ΩRES, 3 Ω, 5%, 0.1 W, 0603 CRCW06033R00JNEA
SH-J1, SH-J2, SH-J3 3 1×2 Shunt, 100 mil, Gold plated, Black 969102-0000-DA
VINs 1 Test Point, Miniature, Red, TH 5000
VOUTs 1 Test Point, Miniature, Orange, TH 5003
Variant 001 LM536253QEVM Fixed 3.3 V, 2.5 A Without Spread Spectrum
U1 1 2.5/3.5 A Synchronous Buck Regulator for Automotive
Applications, RNL0022A LM536253QRNLRQ1
RFBB 0 DNP
RFBT 1 0 Ω2.5/3.5 A Synchronous Buck Regulator for Automotive
Applications, RNL0022A CRCW04020000Z0ED
CFF 0 DNP
Variant 002 LM53635AQEVM Adjustable 5 V, 3.5 A Without Spread Spectrum
U1 1 2.5/3.5 A Synchronous Buck Regulator for Automotive
Applications, RNL0022A LM53635AQRNLRQ1
RFBB 1 12.1 k RES, 12.1 k, 1%, 0.063 W, 0402 CRCW040212K1FKED
RFBT 1 49.9 k RES, 49.9 k, 1%, 0.063 W, 0402 CRCW040249K9FKED
CFF 1 15 pF CAP, CERM, 15 pF, 50 V, ±5%, C0G/NP0, 0402 GRM1555C1H150JA01D
Variant 003 LM53635LQEVM Fixed 5 V, 3.5 A With Spread Spectrum
U1 1 2.5/3.5A Synchronous Buck Regulator for Automotive
Applications, RNL0022A LM53635LQRNLRQ1
RFBB 0 DNP
RFBT 1 0 ΩRES, 0 Ω, 5%, 0.063 W, 0402 CRCW04020000Z0ED
CFF 0 DNP
Variant 004 LM53635MQEVM Adjustable 5 V, 3.5 A With Spread Spectrum
U1 1 2.5/3.5A Synchronous Buck Regulator for Automotive
Applications, RNL0022A LM53635MQRNLRQ1
RFBB 1 12.1 k RES, 12.1 k, 1%, 0.063 W, 0402 CRCW040212K1FKED
RFBT 1 49.9 k RES, 49.9 k, 1%, 0.063 W, 0402 CRCW040249K9FKED
CFF 1 15 pF CAP, CERM, 15 pF, 50 V, ±5%, C0G/NP0, 0402 GRM1555C1H150JA01D
Variant 005 LM53635NQEVM Fixed 3.3 V, 3.5 A With Spread Spectrum
U1 1 2.5/3.5A Synchronous Buck Regulator for Automotive
Applications, RNL0022A LM53635NQRNLRQ1
RFBB 0 DNP
RFBT 1 0 ΩRES, 0 Ω, 5%, 0.063 W, 0402 CRCW04020000Z0ED
CFF 0 DNP

Output Current (A)
Output Voltage (V)
0 0.5 1 1.5 2 2.5 3 3.5
4.96
4.98
5
5.02
5.04
5.06
5.08
D003
8Vin
12Vin
18Vin
36Vin
Output Current (A)
Output Voltage (V)
0 0.5 1 1.5 2 2.5 3 3.5
4.775
4.8
4.825
4.85
4.875
4.9
4.925
4.95
4.975
5
5.025
5.05
D007
5.5Vin
8Vin
12Vin
13.5Vin
18Vin
36Vin
Output Current (A)
Efficiency
1E-5 0.0001 0.001 0.01 0.10.2 0.5 1 2 34
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
D001
8Vin
12Vin
13.5Vin
18Vin
Output Current (A)
Efficiency
0 0.5 1 1.5 2 2.5 3 3.5
50%
55%
60%
65%
70%
75%
80%
85%
90%
95%
100%
D006
5.5Vin
8Vin
12Vin
13.5Vin
18Vin
36Vin
Efficiency and Line- and Load-Regulation www.ti.com
16 SNVU526–May 2016
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Copyright © 2016, Texas Instruments Incorporated
LM53625xQEVM and LM53635xQEVM User's Guide
8 Efficiency and Line- and Load-Regulation
The variant of the board LM53635LQEVM is used for all measurements and curves in Figure 14 to
Figure 23.
VOUT = 5 V AUTO
Figure 14. LM53635LQEVM Efficiency
VOUT = 5 V FPWM
Figure 15. LM53635LQEVM Efficiency
VOUT = 5 V AUTO
Figure 16. LM53635LQEVM Load and Line Regulation
VOUT = 5 V FPWM
Figure 17. LM53635LQEVM Load and Line Regulation

www.ti.com Efficiency and Line- and Load-Regulation
17
SNVU526–May 2016
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LM53625xQEVM and LM53635xQEVM User's Guide
8.1 Load Transients
VOUT = 5 V IOUT = 0 mA to 3.5 A, FPWM
TR= TF= 1 µs
Figure 18. LM53635LQEVM Load Regulation
VOUT = 5 V IOUT = 10 mA to 3.5 A, AUTO
TR= TF= 1 µs
Figure 19. LM53635LQEVM Load Transients
8.2 Conducted EMI
Figure 20. Conducted EMI Setup - Front View Figure 21. Conducted EMI Setup - Side View

Efficiency and Line- and Load-Regulation www.ti.com
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Copyright © 2016, Texas Instruments Incorporated
LM53625xQEVM and LM53635xQEVM User's Guide
Figure 22. LM53635LQEVM Low Frequency Conducted EMI
Results for 5 Vout With Spread Spectrum. Green-Average
and Yellow-Peak
Figure 23. LM53635LQEVM High Frequency Conducted
EMI Results for 5 Vout With Spread Spectrum. Green-
Average and Yellow-Peak

STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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