7.1. Main Block
IC600: C2DBYY000250
Pin
No. Port I/O Description FM
AM
(V)
CD
(V)
1 AVDD - Standard voltage for A/D converter 3.5 3.5
2 GND - Ground Terminal 0 0
3 ILL-DET I H: Illumi off; L: Illumi on 3.5 3.5
4 LAN
MUTE - - - -
5 VDD - D/A converter standard voltage 3.5 3.5
6 MUTE O H: MUTE ON L: MUTE OFF 0 0
7 FAN - No connection - -
8 IC/
FLMD0 - - 0 0
9 VDD0 - Power Supply 3.5 3.5
10 REGCPU - Regulator output; stable-capacity
connection and power for when the
regulator stops
2.6 2.6
11 GND - Ground Terminal 0 0
12 X1 I Oscilllation terminal (main clock)
4.718MHz 1.3 1.3
13 X2 O Oscilllation terminal (main clock)
4.718MHz 1.3 1.3
14 RESET I H: Normal L: Reset 3.4 3.4
15 XT1 I Oscillation terminal (sub) 32.768kHz 0 0
16 XT2 - No connection - -
17 SPEC
CHANGE
3
- - - -
18 Lo-BAT I H: +B (3.1V or more)
L: +B (less than 3.1V) 3.4 3.4
19 SW1 - No connection - -
20 DRST I On-chip debug terminal 0 0
21 NC - No connection - -
22 CD-SOM I CD (IDC) deck serial communication 0 1.8
23 CD-SIM O CD (IDC) deck serial communication
H: data 1 L: data 0 0 2.6
24 CD-
SCKM O CD (IDC) deck serial communication
clock output terminal 0 3.4
25 SPEC
CHANGE
1
- - - -
26 NC - No connection - -
27 SW3 - No connection - -
28 BEEP O BEEP output terminal 0 0
29 SPD I Input terminal from the speed pulse;
1pulse at 1/2548km 0 0
30 SPEC
CHANGE
2
- - - -
31 TX+ O AVC-LAN data input terminal 0 0
32 TX- I AVC-LAN data output terminal 0 0
33 GND - Input/output port and GND for the
combined functional terminal 0 0
34 VDD - Input/output port and power for the
combined functional terminal 3.5 3.5
35 NC - No connection - -
36 NC - No connection - -
37 LCD-ON
(PWM) O H: LCD backlight on L: LCD backlight off 3.8 3.8
38 ILL-ON
(PWM) O H: ILL ON L: ILL OFF 0 0
39 DDI O On-chip Debug terminal 0 0
40 DDO O On-chip Debug terminal 0 0
41 DCK O On-chip Debug terminal 0 0
42 DMS O On-chip debug terminal 0 0
Pin
No. Port I/O Description FM
AM
(V)
CD
(V)
43 DSP-
SDA I/O DSP (SAF7730HV) input/output (H/L) 2.7 3.2
44 DSP-
SCL O DSP (SAF7730HV) input/output (H/L) 2.4 2.9
45 WP I/O DSP (SAF7730HV) input/output (H/L) 3.2 3.2
46 PANEL
INFO - - - -
47 LCD-
RESET O H: Normal; L: LCD when resetting 5.2 5.2
48 NC - No connection - -
49 LCD-CE
1O - 0 0
50 LCD-
DATA I/O LCD data input/output terminal 0 0
51 LCD-OFF O H: LCD on L: LCD off 5.2 5.2
52 LCD-CLK O LCD driver data clock output 5.2 5.2
53 NC - No connection - -
54 NC - No connection - -
55 NC - No connection - -
56 DOLBY - No connection - -
57 DC-DC
OSC O Timer output 1.7 1.7
58 ACC-
DET I H: ACC on; L: ACC off 3.5 3.5
59 RESET
DSP O H: Normally DSP L: DSP RESET 3.5 3.5
60 DSP-INIT I H: INIT completed; L: INIT incomplete 3.4 3.4
61 +B-DET I H: +B on L: +B off 3.5 3.5
62 RSE-
MUTE - No connection - -
63 L/R I H: Left handle L: Right handle 0 0
64 NC - No connection - -
65 DIV-SW I H: Main is fixed L: Diver operation 3.2 3.2
66 TEL-
MUTE I H: VOL operation is valid
L: VOL operation is invalid 3.5 3.5
67 CD-
RESET O H: Normal L: RESET 3.5 3.5
68 CD-ON O H: CD deck CPU communication is
possible; L: Not possible 0 3.5
69 GND
(BVSS) - Ground for bus interface 0 3.5
70 VDD
(BVDD) - Power supply for bus interface 3.5 3.5
71 NC - No connection - -
72 NC - No connection - -
73 LCD-
KEYREQ I H: With key input data
L: No key data 0 0
74 NC - No connection - -
75 NC - No connection - -
76 FLMD1 I - 0 0
77 NC - No connection - -
78 NC - No connection - -
79 NC - No connection - -
80 NC - No connection - -
81 NC - No connection - -
82 NC - No connection - -
83 NC - No connection - -
84 PW-
STBY2 O STBY2 output for power IC (BD4902) 3.5 3.5
85 PW-
STBY O STBY output for power IC (BD4902) 3.5 3.5
86 PW-
LATCH O Latch signal output for power IC
(BD4902) 3.5 3.5
87 PW-SCK O Clock output for power IC (BD4902) 0 0
88 PW-
DATA O Data output for power IC (BD4902) 0 0
7 TERMINALS DESCRIPTION
6
CQ-ES7880AZ
