TQ TQMa6x User manual

TQMa6x & TQMa6xP
User's Manual
TQMa6x & TQMa6xP UM 0401
21.10.2018

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page i
TABLE OF CONTENTS
1. ABOUT THIS MANUAL ........................................................................................................................................................................1
1.1 Copyright and license expenses.....................................................................................................................................................1
1.2 Registered trademarks.......................................................................................................................................................................1
1.3 Disclaimer ..............................................................................................................................................................................................1
1.4 Imprint ....................................................................................................................................................................................................1
1.5 Tips on safety ........................................................................................................................................................................................2
1.6 Sym ols and typographic conventions........................................................................................................................................2
1.7 Handling and ESD tips........................................................................................................................................................................2
1.8 Naming of signals................................................................................................................................................................................3
1.9 Further applica le documents / presumed knowledge..........................................................................................................3
2. BRIEF DESCRIPTION.............................................................................................................................................................................4
2.1 Key functions and characteristics...................................................................................................................................................4
3. ELECTRONICS........................................................................................................................................................................................4
3.1 System overview..................................................................................................................................................................................4
3.1.1 System architecture / lock diagram.............................................................................................................................................4
3.1.2 Functionality .........................................................................................................................................................................................5
3.2 System components...........................................................................................................................................................................6
3.2.1 i.MX6........................................................................................................................................................................................................6
3.2.1.1 i.MX6 derivatives..................................................................................................................................................................................6
3.2.1.2 eFUSEs.....................................................................................................................................................................................................6
3.2.1.3 i.MX6 errata............................................................................................................................................................................................6
3.2.1.4 Boot modes ...........................................................................................................................................................................................7
3.2.1.5 Boot configuration..............................................................................................................................................................................8
3.2.1.6 Boot interfaces......................................................................................................................................................................................9
3.2.1.7 Boot device eMMC ..............................................................................................................................................................................9
3.2.1.8 Boot device SPI NOR flash.............................................................................................................................................................. 10
3.2.1.9 Boot device SD card......................................................................................................................................................................... 11
3.2.2 Memory................................................................................................................................................................................................ 12
3.2.2.1 DDR3L SDRAM................................................................................................................................................................................... 12
3.2.2.2 eMMC NAND flash............................................................................................................................................................................ 13
3.2.2.3 SPI NOR flash...................................................................................................................................................................................... 13
3.2.2.4 EEPROM ............................................................................................................................................................................................... 14
3.2.3 RTC ........................................................................................................................................................................................................ 15
3.2.4 Temperature sensor......................................................................................................................................................................... 15
3.2.5 Interfaces............................................................................................................................................................................................. 16
3.2.5.1 Overview ............................................................................................................................................................................................. 16
3.2.5.2 AUDMUX ............................................................................................................................................................................................. 17
3.2.5.3 CCM....................................................................................................................................................................................................... 17
3.2.5.4 ECSPI..................................................................................................................................................................................................... 17
3.2.5.5 ENET...................................................................................................................................................................................................... 18
3.2.5.6 FLEXCAN.............................................................................................................................................................................................. 20
3.2.5.7 GPIO...................................................................................................................................................................................................... 20
3.2.5.8 HDMI..................................................................................................................................................................................................... 21
3.2.5.9 I2C........................................................................................................................................................................................................... 21
3.2.5.10 I2C / ENET-Patch Variants................................................................................................................................................................ 22
3.2.5.11 IPU ......................................................................................................................................................................................................... 23
3.2.5.12 LDB........................................................................................................................................................................................................ 24
3.2.5.13 MIPI_CSI............................................................................................................................................................................................... 25
3.2.5.14 MIPI_DSI............................................................................................................................................................................................... 25
3.2.5.15 MLB ...................................................................................................................................................................................................... 25
3.2.5.16 PCIe ....................................................................................................................................................................................................... 26
3.2.5.17 PWM...................................................................................................................................................................................................... 26
3.2.5.18 SATA...................................................................................................................................................................................................... 26
3.2.5.19 SJC......................................................................................................................................................................................................... 27
3.2.5.20 S/PDIF................................................................................................................................................................................................... 27
3.2.5.21 Tamper................................................................................................................................................................................................. 27
3.2.5.22 UART..................................................................................................................................................................................................... 28
3.2.5.23 USB........................................................................................................................................................................................................ 29
3.2.5.24 uSDHC.................................................................................................................................................................................................. 29
3.2.5.25 Watchdog............................................................................................................................................................................................ 30
3.2.5.26 XTAL...................................................................................................................................................................................................... 30

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page ii
TABLE OF CONTENTS (continued)
3.2.6 Reset ..................................................................................................................................................................................................... 31
3.2.7 Power supply ..................................................................................................................................................................................... 32
3.2.7.1 Overview TQMa6x power supply................................................................................................................................................. 32
3.2.7.2 Voltage monitoring VCC5V............................................................................................................................................................ 33
3.2.7.3 Power consumption TQMa6x ....................................................................................................................................................... 34
3.2.7.4 Power-Up sequence TQMa6x / carrier oard........................................................................................................................... 35
3.3 TQMa6x interface.............................................................................................................................................................................. 35
3.3.1 Pin multiplexing................................................................................................................................................................................ 35
3.3.2 Pinout connector X1........................................................................................................................................................................ 36
3.3.3 Pinout connector X2........................................................................................................................................................................ 38
3.3.4 Pinout connector X3........................................................................................................................................................................ 40
4. MECHANICS........................................................................................................................................................................................ 41
4.1 Connectors ......................................................................................................................................................................................... 41
4.2 Dimensions......................................................................................................................................................................................... 41
4.3 Component placement .................................................................................................................................................................. 43
4.4 Adaptation to the environment................................................................................................................................................... 44
4.5 Protection against external effects ............................................................................................................................................. 44
4.6 Thermal management .................................................................................................................................................................... 44
4.7 Structural requirements ................................................................................................................................................................. 44
4.8 Notes of treatment........................................................................................................................................................................... 44
5. SOFTWARE.......................................................................................................................................................................................... 45
6. SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS ................................................................................................. 45
6.1 EMC....................................................................................................................................................................................................... 45
6.2 ESD........................................................................................................................................................................................................ 45
6.3 Operational safety and personal security ................................................................................................................................. 45
6.4 Climatic and operational conditions .......................................................................................................................................... 46
6.5 Relia ility and service life............................................................................................................................................................... 46
6.6 Environmental protection.............................................................................................................................................................. 47
6.6.1 RoHS ..................................................................................................................................................................................................... 47
6.6.2 WEEE®................................................................................................................................................................................................... 47
6.6.3 REACH®................................................................................................................................................................................................ 47
6.6.4 EuP......................................................................................................................................................................................................... 47
6.6.5 Battery.................................................................................................................................................................................................. 47
6.6.6 Packaging............................................................................................................................................................................................ 47
6.6.7 Other entries ...................................................................................................................................................................................... 47
7. APPENDIX............................................................................................................................................................................................ 48
7.1 Acronyms and definitions.............................................................................................................................................................. 48
7.2 References........................................................................................................................................................................................... 50

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page iii
TABLE DIRECTORY
Ta le 1: Terms and Conventions .............................................................................................................................................................2
Ta le 2: Processor derivatives ..................................................................................................................................................................6
Ta le 3: Boot modes and BT_FUSE_SEL................................................................................................................................................7
Ta le 4: General oot settings .................................................................................................................................................................8
Ta le 5: Boot configuration eMMC at uSDHC3...................................................................................................................................9
Ta le 6: uSDHC3 eMMC modes ...............................................................................................................................................................9
Ta le 7: Boot configuration SPI NOR flash at eCSPI1...................................................................................................................... 10
Ta le 8: Boot configuration SD card at uSDHC2.............................................................................................................................. 11
Ta le 9: uSDHC2 SD card modes.......................................................................................................................................................... 11
Ta le 10: i.MX6 SDRAM interface according to i.MX6 derivative.................................................................................................. 12
Ta le 11: DDR3L SDRAM memory size options.................................................................................................................................. 12
Ta le 12: DDR3L SDRAM address range............................................................................................................................................... 12
Ta le 13: SPI NOR flash assem ly options ........................................................................................................................................... 13
Ta le 14: EEPROM, component............................................................................................................................................................... 14
Ta le 15: EEPROM, TQMa6x-specific data............................................................................................................................................ 14
Ta le 16: Current consumption RTC at pin LICELL............................................................................................................................ 15
Ta le 17: Temperature sensor ................................................................................................................................................................. 15
Ta le 18: Internally used interfaces........................................................................................................................................................ 16
Ta le 19: Externally availa le interfaces............................................................................................................................................... 16
Ta le 20: Signals AUD3 .............................................................................................................................................................................. 17
Ta le 21: Signals CCM ................................................................................................................................................................................ 17
Ta le 22: Signals ECSPI1, ECSPI5............................................................................................................................................................. 17
Ta le 23: Signals RGMII.............................................................................................................................................................................. 18
Ta le 24: ENET-Patch variants.................................................................................................................................................................. 19
Ta le 25: Signals FLEXCAN........................................................................................................................................................................ 20
Ta le 26: Signals GPIO................................................................................................................................................................................ 20
Ta le 27: Signals HDMI............................................................................................................................................................................... 21
Ta le 28: Signals I2C .................................................................................................................................................................................... 21
Ta le 29: I2C address assignment ........................................................................................................................................................... 21
Ta le 30: Signals parallel display DISP0................................................................................................................................................ 23
Ta le 31: Signals LVDS0, LVDS1 .............................................................................................................................................................. 24
Ta le 32: Signals MIPI_CSI......................................................................................................................................................................... 25
Ta le 33: Signals MIPI_DSI ........................................................................................................................................................................ 25
Ta le 34: Signals MLB ................................................................................................................................................................................. 25
Ta le 35: Signals PCIe................................................................................................................................................................................. 26
Ta le 36: Signals PWM ............................................................................................................................................................................... 26
Ta le 37: Signals SATA ............................................................................................................................................................................... 26
Ta le 38: JTAG modes ................................................................................................................................................................................ 27
Ta le 39: Signals JTAG................................................................................................................................................................................ 27
Ta le 40: Signals S/PDIF............................................................................................................................................................................. 27
Ta le 41: Signal TAMPER ........................................................................................................................................................................... 27
Ta le 42: Signals UARTs............................................................................................................................................................................. 28
Ta le 43: Signals USB_H1.......................................................................................................................................................................... 29
Ta le 44: Signals USB_OTG....................................................................................................................................................................... 29
Ta le 45: Signals uSDHC2 ......................................................................................................................................................................... 29
Ta le 46: Signal WDOG .............................................................................................................................................................................. 30
Ta le 47: Signals XTAL................................................................................................................................................................................ 30
Ta le 48: Reset signals................................................................................................................................................................................ 31
Ta le 49: Power consumption TQMa6x................................................................................................................................................ 34
Ta le 50: Pinout connector X1................................................................................................................................................................. 36
Ta le 51: Pinout connector X2................................................................................................................................................................. 38
Ta le 52: Pinout connector X3................................................................................................................................................................. 40
Ta le 53: Pinout differences TQMa6x revision 02xx and TQMa6x revision 04xx ..................................................................... 40
Ta le 54: TQMa6x, connectors................................................................................................................................................................. 41
Ta le 55: Carrier oard mating connectors......................................................................................................................................... 41
Ta le 56: TQMa6x, heights ....................................................................................................................................................................... 41
Ta le 57: La els on TQMa6x..................................................................................................................................................................... 43
Ta le 58: Climate and operational conditions extended temperature range –25 °C to +85 °C.......................................... 46
Ta le 59: Climate and operational conditions industrial temperature range –40 °C to +85 °C .......................................... 46
Ta le 60: Acronyms..................................................................................................................................................................................... 48
Ta le 61: Further applica le documents.............................................................................................................................................. 50

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page iv
ILLUSTRATION DIRECTORY
Illustration 1: Block diagram TQMa6x...............................................................................................................................................................4
Illustration 2: Block diagram i.MX6....................................................................................................................................................................6
Illustration 3: Block diagram DDR3L SDRAM connection........................................................................................................................ 12
Illustration 4: Block diagram eMMC NAND flash connection................................................................................................................. 13
Illustration 5: Block diagram SPI NOR flash connection........................................................................................................................... 13
Illustration 6: Block diagram EEPROM interface......................................................................................................................................... 14
Illustration 7: Block diagram RTC.................................................................................................................................................................... 15
Illustration 8: Block diagram temperature sensor interface................................................................................................................... 15
Illustration 9: ENET-Patch Variant “A”............................................................................................................................................................ 22
Illustration 10: ENET-Patch Variant “B” ............................................................................................................................................................ 22
Illustration 11: ENET-Patch Variant “C”............................................................................................................................................................ 22
Illustration 12: Block diagram UART interfaces............................................................................................................................................. 28
Illustration 13: Block diagram Reset................................................................................................................................................................. 31
Illustration 14: Block diagram power supply................................................................................................................................................. 32
Illustration 15: Block diagram PMIC signals ................................................................................................................................................... 32
Illustration 16: Block diagram VCC5V monitoring ....................................................................................................................................... 33
Illustration 17: Block diagram power supply carrier oard....................................................................................................................... 35
Illustration 18: TQMa6x dimensions, side view............................................................................................................................................. 41
Illustration 19: TQMa6x dimensions, top view.............................................................................................................................................. 42
Illustration 20: TQMa6x dimensions, top view through TQMa6x ........................................................................................................ 42
Illustration 21: TQMa6x, component placement top.................................................................................................................................. 43
Illustration 22: TQMa6x, component placement ottom.......................................................................................................................... 43
REVISION HISTORY
Rev. Date Name Pos. Modification
0203 10.02.2018 Petz Initial document
0400 19.04.2018 Petz All Complete rework, DualPlus and QuadPlus CPUs added
0401 21.10.2018 Petz
All
Ta le 10
3.2.7.4
3.2.5.23, 6.5, Illustration 22
Ta le 58, Ta le 59
Formatting, links updated,
Clocks corrected
Warning updated
Updated
“Package temperature” replaced with “Case temperature”
Case temperature DDR3L SDRAM changed to +95 °C

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 1
1. ABOUT THIS MANUAL
1.1 Copyright a d lice se expe ses
Copyright protected © 2018 y TQ-Systems Gm H.
This User's Manual may not e copied, reproduced, translated, changed or distri uted, completely or partially
in electronic, machine reada le, or in any other form without the written consent of TQ-Systems Gm H.
The drivers and utilities for the components used as well as the BIOS are su ject to the copyrights of the respective
manufacturers. The licence conditions of the respective manufacturer are to e adhered to.
Bootloader-licence expenses are paid y TQ-Systems Gm H and are included in the price.
Licence expenses for the operating system and applications are not taken into consideration and must e calculated / declared
separately.
1.2 Registered trademarks
TQ-Systems Gm H aims to adhere to copyrights of all graphics and texts used in all pu lications, and strives to use original
or license-free graphics and texts.
All rand names and trademarks mentioned in this User's Manual, including those protected y a third party, unless specified
otherwise in writing, are su jected to the specifications of the current copyright laws and the proprietary laws of the present
registered proprietor without any limitation. One should conclude that rand and trademarks are rightly protected y a third
party.
1.3 Disclaimer
TQ-Systems Gm H does not guarantee that the information in this User's Manual is up-to-date, correct, complete or of good
quality. Nor does TQ-Systems Gm H assume guarantee for further usage of the information. Lia ility claims against TQ-Systems
Gm H, referring to material or non-material related damages caused, due to usage or non-usage of the information given in this
User's Manual, or due to usage of erroneous or incomplete information, are exempted, as long as there is no proven intentional
or negligent fault of TQ-Systems Gm H.
TQ-Systems Gm H explicitly reserves the rights to change or add to the contents of this User's Manual or parts of it without
special notification.
Importa t Notice:
Before using the Starterkit MBa6x or parts of the schematics of the MBa6x, you must evaluate it and determine if it is suita le for
your intended application. You assume all risks and lia ility associated with such use. TQ-Systems Gm H makes no other
warranties including, ut not limited to, any implied warranty of merchanta ility or fitness for a particular purpose. Except where
prohi ited y law, TQ-Systems Gm H will not e lia le for any indirect, special, incidental or consequential loss or damage
arising from the usage of the Starterkit MBa6x or schematics used, regardless of the legal theory asserted.
1.4 Impri t
TQ-Systems Gm H
Gut Delling, Mühlstraße 2
D-82229 Seefeld
Tel: [phone]
Fax: [phone]
E-Mail: Info@TQ-Group
We : TQ-Group

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 2
1.5 Tips o safety
Improper or incorrect handling of the product can su stantially reduce its life span.
1.6 Symbols a d typographic co ve tio s
Ta le 1: Terms and Conventions
Sym ol Meaning
This sym ol represents the handling of electrostatic-sensitive modules and / or components. These
components are often damaged / destroyed y the transmission of a voltage higher than a out 50 V.
A human ody usually only experiences electrostatic discharges a ove approximately 3,000 V.
This sym ol indicates the possi le use of voltages higher than 24 V.
Please note the relevant statutory regulations in this regard.
Non-compliance with these regulations can lead to serious damage to your health and may damage
or destroy the component.
This sym ol indicates a possi le source of danger.
Ignoring the instructions descri ed can cause health damage, or damage the hardware.
This sym ol represents important details or aspects for working with TQ-products.
Command A font with fixed-width is used to denote commands, contents, file names, or menu items.
1.7 Ha dli g a d ESD tips
General handling of your TQ-products
The TQ-product may only e used and serviced y certified personnel who have taken note of the
information, the safety regulations in this document and all related rules and regulations.
A general rule is not to touch the TQ-product during operation. This is especially important when
switching on, changing jumper settings or connecting other devices without ensuring eforehand
that the power supply of the system has een switched off.
Violation of this guideline may result in damage / destruction of the TQMa6x and e dangerous
to your health.
Improper handling of your TQ-product would render the guarantee invalid.
Proper ESD handling
The electronic components of your TQ-product are sensitive to electrostatic discharge (ESD).
Always wear antistatic clothing, use ESD-safe tools, packing materials etc., and operate your TQ-
product in an ESD-safe environment. Especially when you switch modules on, change jumper settings,
or connect other devices.

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 3
1.8 Nami g of sig als
A hash mark (#) at the end of the signal name indicates a low-active signal.
Example: RESET#
If a signal can switch etween two functions and if this is noted in the name of the signal, the low-active function is marked with
a hash mark and shown at the end.
Example: C / D#
If a signal has multiple functions, the individual functions are separated y slashes when they are important for the wiring.
The identification of the individual functions follows the a ove conventions.
Example: WE2# / OE#
1.9 Further applicable docume ts / presumed k owledge
•Specificatio s a d ma ual of the modules used:
These documents descri e the service, functionality and special characteristics of the module used (incl. BIOS).
•Specificatio s of the compo e ts used:
The manufacturer's specifications of the components used, for example CompactFlash cards, are to e taken note of.
They contain, if applica le, additional information that must e taken note of for safe and relia le operation.
These documents are stored at TQ-Systems Gm H.
•Chip errata:
It is the user's responsi ility to make sure all errata pu lished y the manufacturer of each component are taken note of.
The manufacturer’s advice should e followed.
•Software behaviour:
No warranty can e given, nor responsi ility taken for any unexpected software ehaviour due to deficient components.
•Ge eral expertise:
Expertise in electrical engineering / computer engineering is required for the installation and the use of the device.
The following documents are required to fully comprehend the following contents:
•MBa6x circuit diagram
•MBa6x User's Manual
•i.MX6 Data Sheets
•i.MX6 Reference Manuals
•U-Boot documentation: www.denx.de/wiki/U-Boot/Documentation
•PTXdist documentation: www.ptxdist.de
•TQ-Support Wiki: support.tq-group.com/doku.php?id=en:arm:tqma6x

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 4
2. BRIEF DESCRIPTION
This User's Manual descri es the hardware of the TQMa6x revision 04xx, and refers to some software settings.
A certain derivative of the TQMa6x does not necessarily provide all features descri ed in this User's Manual.
Functional differences etween Dual/Quad and DualPlus/QuadPlus are referred to in the relevant passages.
This User's Manual does also not replace the NXP i.MX6 Reference Manuals (4), (5), and (6).
The TQMa6x is a universal Minimodule ased on the NXP ARM CPU MCIMX6 (i.MX6).
The Cortex™ A9 core of this i.MX6 is typically clocked with 800 MHz.
The TQMa6x extends the TQC product range and offers an outstanding computing performance.
A suita le i.MX6 derivative (Single, Dual, Quad core) can e chosen for each requirement.
2.1 Key fu ctio s a d characteristics
The TQMa6x provides the following key functions and characteristics:
•NXP i.MX6 (Solo, DualLite, Dual, Quad, DualPlus, QuadPlus)
•Up to 2 G yte DDR3L SDRAM, 64 it interface (except “Solo”: 32 it interface)
•Up to 8 G yte eMMC NAND flash
•Up to 128 M yte SPI NOR flash 1
•64 k it EEPROM
•Temperature sensor
•NXP PMIC (Power Management Integrated Circuit)
•Extended temperature range
•Single 5 V power supply
•Hardware is ackward compati le with TQMa6x revision 02xx
All essential i.MX6 pins are routed to the connectors.
There are therefore no restrictions for customers using the TQMa6x with respect to an integrated customised design.
3. ELECTRONICS
The information provided in this User's Manual is only valid in connection with the tailored oot loader,
which is preinstalled on the TQMa6x, and the BSP provided y TQ-Systems Gm H, see also chapter 5.
3.1 System overview
3.1.1 System architecture / lock diagram
Illustration 1: Block diagram TQMa6x
1: It is not possi le to oot from an SPI NOR flash igger than 16 M yte.

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3.1.2 Functionality
The following key functions are implemented on the TQMa6x:
•i.MX6 CPU
•DDR3L SDRAM
•eMMC NAND flash
•SPI NOR flash
•EEPROM
•Temperature sensor
•Supervisor
•PMIC / DC/DC converter
The following interfaces are provided at the connectors of the TQMa6x: 2
•1 × Ethernet 10/100/1000 RGMII
•1 × HDMI 1.4
•1 × I2S
•1 × JTAG
•1 × MIPI CSI
•1 × MIPI DSI
•1 × MLB
•1 × Parallel display RGB 24 it
•1 × PCIe 2.0 (1 Lane)
•1 × SATA 3.0
•1 × SD 8 Bit (SDIO / MMC / SD card)
•1 × S/PDIF
•2 × CAN
•2 × General Purpose Clocks
•2 × I2C
•2 × LVDS display
•2 × SPI
•2 × USB 2.0 Hi-Speed (1 × USB Host, 1 × USB-OTG)
•40 × GPIO
•4 × PWM
•4 × UART (with Handshake)
Further interfaces of the i.MX6 are also availa le as an alternative to the mentioned factory configuration, y adapting the pin
configuration. These are amongst other:
•Camera Sensor Interfaces
•EIM us
•Enhanced Periodic Interrupt Timer EPIT
•Enhanced Serial Audio Interface ESAI
•Ethernet 10/100 RMII
•General Purpose Media Interface GPMI
•General Purpose Timer GPT
•Keypad port
•MIPI HSI Host Controller
•More audio interfaces
•More I2C interfaces
•More SPI interfaces
•More UARTs
•One additional parallel display
2: Quantity of interfaces depends on the i.MX6 derivative.

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3.2 System compo e ts
3.2.1 i.MX6
The following lock diagram shows the main features of the i.MX6 processor family.
Illustration 2: Block diagram i.MX6
(Source: NXP)
3.2.1.1 i.MX6 derivatives
Depending on the TQMa6x derivative, one of the following i.MX6 derivatives is assem led:
Ta le 2: Processor derivatives
Description Clock Temperature range TQ-BSP
i.MX6S Solo Industrial 800 MHz –40 °C to +105 °C Yes
i.MX6U DualLite Industrial 800 MHz –40 °C to +105 °C Yes
i.MX6D Dual Industrial 800 MHz –40 °C to +105 °C Yes
i.MX6Q Quad Industrial 800 MHz –40 °C to +105 °C Yes
i.MX6DP DualPlus Industrial 800 MHz –40 °C to +105 °C Yes
i.MX6QP QuadPlus Industrial 800 MHz –40 °C to +105 °C Yes
3.2.1.2 eFUSEs
The eFUSEs in the i.MX6 are availa le for the user, except for the MAC address eFUSEs.
TQMa6x modules are delivered pre-programmed with MAC addresses from the TQ-Systems MAC address pool.
The MAC addresses are urned in the designated OCOTP eFUSEs ( ank 4, word 2, 3).
The MAC address LOCK-FUSE WP (Write Protect) is urnt, which permits to temporarily overwrite the MAC address for test
purposes. If this is not desired, the MAC address LOCK-FUSE OP (Overwrite Protect) can e urned y the user.
3.2.1.3 i.MX6 errata
Attention: Malfunction
Please take note of the current i.MX6 errata (7), (8).

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3.2.1.4 Boot modes
The i.MX6 contains a ROM with integrated oot loader.
After power-up, the oot code initializes the hardware and then loads the program image from the selected oot device.
The eMMC or the SPI NOR flash integrated on the TQMa6x can for example e selected as the standard oot device.
More oot interfaces are availa le as an alternative to ooting from the integrated eMMC or the SPI NOR flash, see 3.2.1.6.
More information a out oot interfaces and its configuration is to e taken from the i.MX6 data sheets (1), (2), and (3) as well as
the i.MX6 Reference Manuals (4), (5), and (6).
The oot device and its configuration, as well as different i.MX6 settings have to e set via different oot mode registers.
Therefore, the i.MX6 provides two possi ilities:
•Burning internal eFuses
•Reading dedicated GPIO pins
The exact ehaviour during ooting depends on the value of the register BT_FUSE_SEL.
The following ta le shows the ehaviour of the it BT_FUSE_SEL in dependence of the selected oot mode.
Ta le 3: Boot modes and BT_FUSE_SEL
BOOT_MODE[1:0] Boot type BT_FUSE_SEL Usage
00 (default) Boot from eFuses BT_FUSE_SEL = 0: Boot using Serial Loader (default)
BT_FUSE_SEL = 1: Boot configuration is taken from eFuses Series production
01 Serial Downloader n/a Development
/ production
10 Internal Boot BT_FUSE_SEL = 0: Boot configuration is taken from BOOT_CFG pins (default)
BT_FUSE_SEL = 1: Boot configuration is taken from eFuses Development
11 Reserved n/a n/a
Attention: Malfunction
Burning an eFuse is irreversi le!
TQ-Systems Gm H takes no responsi ility for the correct operation of the TQMa6x,
if the user urns eFuses.
Attention: Boot configuration
It is recommended to implement a redundant update concept for field software updates
during the carrier oard design.

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 8
3.2.1.5 Boot configuration
Note: Boot configuration
No oot device is preset when the TQMa6x is delivered.
Some general settings are done with some eFuses independent from the oot device.
Ta le 4: General oot settings
i.MX6 TQMa6x
eFuse Option Setting 3 Signal Pin
BOOT_CFG1[7:0] Boot co figuratio 1:
Specific to selected oot mode – BOOT_CFG1_7:0 –
BOOT_CFG2[7:0] Boot co figuratio 2:
Specific to selected oot mode – BOOT_CFG2_7:0 –
BOOT_CFG3[7]
L1 I-Cache DISABLE:
0 = E abled
1 = Disa led
0 BOOT_CFG3_7 X2-97
BOOT_CFG3[6]
BT_MMU_DISABLE:
0 = MMU / L1 D Cache / PL310 e abled
1 = MMU / L1 D Cache / PL310 disa led
0 BOOT_CFG3_6 X2-98
BOOT_CFG3[5] 0 BOOT_CFG3_5 X2-99
BOOT_CFG3[4]
DDR Memory Map Co fig:
00 = Si gle DDR cha el
01 = 2 × 32 Map
10 = 4 KB interleaving
11 = Reserved (Solo / DualLite / Dual / Quad)
11 = Extension Mode (DualPlus / QuadPlus)
(see BOOT_CFG3[1:0]) 0 BOOT_CFG3_4 X2-100
BOOT_CFG3[3] Reserved 0 BOOT_CFG3_3 X2-101
BOOT_CFG3[2]
Boot Freque cies ARM / DDR / AXI:
Solo / DualLite:
0 = 792 / 396 / 264 MHz
1 = 396 / 352 / 176 MHz
Dual / Quad / DualPlus / QuadPlus:
0 = 792 / 528 / 264 MHz
1 = 396 / 352 / 176 MHz
0 BOOT_CFG3_2 X2-102
BOOT_CFG3[1] 0 BOOT_CFG3_1 X2-103
BOOT_CFG3[0]
DDR Memory Map Exte sio Co fig: 4
00 = Si gle DDR Cha el
01 = Fixed 2 × 32 Map
10 = Reserved
11 = Reserved 0 BOOT_CFG3_0 X2-104
BOOT_CFG4[7]
Debug loop:
0 = Loop disabled
1 = Loop ena led
0 BOOT_CFG4_7 X2-85
BOOT_CFG4[6:0] Boot co figuratio 4:
Specific to selected oot mode – BOOT_CFG4_6:0 –
3: Voltage level or condition of eFuse.
4: Reserved for Solo, DualLite, Dual, Quad, or if BOOT_CFG3[5:4] is not 0 11.

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 9
3.2.1.6 Boot interfaces
In the next chapters, the configuration of the following oot devices is descri ed:
•eMMC
•SPI NOR flash 5
•SD card
3.2.1.7 Boot device eMMC
Ta le 5: Boot configuration eMMC at uSDHC3
i.MX6 TQMa6x
eFuse Option Setting 6 Signal Pin
BOOT_CFG1[7] 0 BOOT_CFG1_7 X2-115
BOOT_CFG1[6]
Boot Device Selectio :
01 = Boot from uSDHC I terfaces 1 BOOT_CFG1_6 X2-116
BOOT_CFG1[5]
SD / MMC-Selectio :
0 = SD / eSD / SDXC
1 = MMC / eMMC
1 BOOT_CFG1_5 X2-117
BOOT_CFG1[4]
Fast Boot Support:
0 = Regular
1 = Fast Boot
0 BOOT_CFG1_4 X2-118
BOOT_CFG1[3] 0 BOOT_CFG1_3 X2-119
BOOT_CFG1[2]
MMC Speed Mode:
0x = High Speed Mode
1x = Normal Speed Mode 0 BOOT_CFG1_2 X2-120
BOOT_CFG1[1]
eMMC Reset E able:
0 = eMMC-Reset disa led
1 = eMMC-Reset e abled
1 BOOT_CFG1_1 X2-121
BOOT_CFG2[7] 0 BOOT_CFG2_7 X2-107
BOOT_CFG2[6] 1 BOOT_CFG2_6 X2-108
BOOT_CFG2[5]
eMMC Bus Width:
000 = 1 it
001 = 4 it
010 = 8 bit
101 = 4 it DDR (MMC 4.4)
110 = 8 it DDR (MMC 4.4) 0 BOOT_CFG2_5 X2-109
BOOT_CFG2[4] 1 BOOT_CFG2_4 X2-110
BOOT_CFG2[3]
Port Select:
00 = uSDHC1
01 = uSDHC2
10 = uSDHC3
11 = uSDHC4 0 BOOT_CFG2_3 X2-111
BOOT_CFG2[2]
DLL Override:
0 = Boot ROM
1 = Apply value per eFuse field MMC_DLL_DLY[6:0]
0 BOOT_CFG2_2 X2-112
BOOT_CFG2[1]
Boot Ack owledge:
0 = Boot Ack owledge e able
1 = Boot Acknowledge disa le
0 BOOT_CFG2_1 X2-113
BOOT_CFG2[0]
Override Pad Setti gs:
0 = default values
1 = Use PAD_SETTINGS values
0 BOOT_CFG2_0 X2-114
In addition to the mode listed a ove the following eMMC modes are supported at port uSDHC3.
Ta le 6: uSDHC3 eMMC modes
eMMC mode 1 Bit 4 Bit 8 Bit Fast Boot DDR
Normal Speed    – 7 – 7
High Speed    – 7 – 7
5: It is not possi le to oot from an SPI NOR flash igger than 16 M yte.
6: Voltage level or condition of eFuse.
7: Not yet supported y software.

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 10
3.2.1.8 Boot device SPI NOR flash
Ta le 7: Boot configuration SPI NOR flash at eCSPI1
i.MX6 TQMa6x
eFuse Option Setting 8 Signal Pin
BOOT_CFG1[7] 0 BOOT_CFG1_7 X2-115
BOOT_CFG1[6] 0 BOOT_CFG1_6 X2-116
BOOT_CFG1[5] 1 BOOT_CFG1_5 X2-117
BOOT_CFG1[4]
Boot Device Selectio :
0011 = Boot from Serial ROM
1 BOOT_CFG1_4 X2-118
BOOT_CFG4[6]
EEPROM Recovery: 9
0 = disabled
1 = ena led
0 BOOT_CFG4_6 X2-86
BOOT_CFG4[5] 0 BOOT_CFG4_5 X2-89
BOOT_CFG4[4]
CS select (SPI o ly):
00 = CS#0
01 = CS#1
10 = CS#2
11 = CS#3 1 BOOT_CFG4_4 X2-90
BOOT_CFG4[3]
SPI Addressi g (SPI o ly)
0 = 2- ytes (16- it) (3.75 MHz Clock)
1 = 3 Bytes (24-bit) (15 MHz Clock)
1 BOOT_CFG4_3 X2-91
BOOT_CFG4[2] 0 BOOT_CFG4_2 X2-92
BOOT_CFG4[1] 0 BOOT_CFG4_1 X2-93
BOOT_CFG4[0]
Port Select:
000 = ECSPI-1
001 = ECSPI-2
010 = ECSPI-3
001 = ECSPI-4
100 = ECSPI-5
101 = I2C-1
110 = I2C-2
111 = I2C-3 0 BOOT_CFG4_0 X2-96
Note: SPI NOR flash size
It is not possi le to oot from an SPI NOR flash igger than 16 M yte.
8: Voltage level or condition of eFuse.
9: The i.MX6 supports recovery devices. If this it is set, the SPI NOR flash serves as recovery oot device.

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 11
3.2.1.9 Boot device SD card
Ta le 8: Boot configuration SD card at uSDHC2
i.MX6 TQMa6x
eFuse Option Setting 10 Signal Pin
BOOT_CFG1[7] 0 BOOT_CFG1_7 X2-115
BOOT_CFG1[6]
Boot Device Selectio :
01 = Boot from uSDHC I terfaces 1 BOOT_CFG1_6 X2-116
BOOT_CFG1[5]
SD / MMC-Selectio :
0 = SD / eSD / SDXC
1 = MMC / eMMC
0 BOOT_CFG1_5 X2-117
BOOT_CFG1[4]
Fast Boot:
0 = Regular
1 = Fast Boot
1 BOOT_CFG1_4 X2-118
BOOT_CFG1[3] 0 BOOT_CFG1_3 X2-119
BOOT_CFG1[2]
SD Speed Mode:
00 = Normal / SDR12
01 = High / SDR25
10 = SDR50 (on uSDHC3 and uSDHC4 only)
11 = SDR104 (on uSDHC3 and uSDHC4 only) 0 BOOT_CFG1_2 X2-120
BOOT_CFG1[1]
SD Power Cycle E able:
0 = No Power Cycle
1 = Power cycle ena led via SD_RST pad (on uSDHC3 and uSDHC4 only)
0 BOOT_CFG1_1 X2-121
BOOT_CFG1[0]
SD Loopback Clock Source Sel (for SDR50 a d SDR104 o ly)
0 = through SD pad
1 = direct
0 BOOT_CFG1_0 X2-122
BOOT_CFG2[7] 0 BOOT_CFG2_7 X2-107
BOOT_CFG2[6]
SD Calibratio Step:
00 = 1 delay cell
01 = 1 delay cell
10 = 2 delay cell
11 = 3 delay cell 0 BOOT_CFG2_6 X2-108
BOOT_CFG2[5]
Bus Width:
0 = 1 it
1 = 4 bit
1 BOOT_CFG2_5 X2-109
BOOT_CFG2[4] 0 BOOT_CFG2_4 X2-110
BOOT_CFG2[3]
Port:
00 = uSDHC1
01 = uSDHC2
10 = uSDHC3
11 = uSDHC4 1 BOOT_CFG2_3 X2-111
BOOT_CFG2[1]
Pull-Dow duri g SD Power Cycle:
0 = Use default SD pad setti gs duri g power cycle
1 = Set pull-down on SD pads during power cycle
(only used if "SD Power Cycle Ena le" ena led)
0 BOOT_CFG2_1 X2-113
BOOT_CFG2[0]
Override Pad Setti gs:
0 = Use default values
1 = Use PAD_SETTINGS values
0 BOOT_CFG2_0 X2-114
In addition to the mode listed a ove the following SD card modes are supported at port uSDHC2:
Ta le 9: uSDHC2 SD card modes
SD mode 1 Bit 4 Bit Fast Boot
SDR12   
SDR25   
SDR50 – – –
SDR104 – – –
10: Voltage level or condition of eFuse.

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3.2.2 Memory
3.2.2.1 DDR3L SDRAM
Depending on the i.MX6 derivative either two or four DDR3L SDRAM chips are assem led on the TQMa6x.
All chips have one common chip select. The chips are connected to the i.MX6 with a 64- it us.
(Exception: The i.MX6 “Solo” is connected with a 32- it us.)
The following lock diagram shows how the DDR3L SDRAM is connected to the i.MX6.
Illustration 3: Block diagram DDR3L SDRAM connection
The characteristics of the memory interface depend on the i.MX6 derivative.
The following ta le shows the different possi ilities.
Ta le 10: i.MX6 SDRAM interface according to i.MX6 derivative
i.MX6 derivative Bus width Clock SDRAM chips TQ-BSP
i.MX6 Solo × 32 396 MHz 2 Yes
i.MX6 DualLite × 64 396 MHz 4 Yes
i.MX6 Dual × 64 528 MHz 4 Yes
i.MX6 DualPlus × 64 528 MHz 4 Yes
i.MX6 Quad × 64 528 MHz 4 Yes
i.MX6 QuadPlus × 64 528 MHz 4 Yes
The assem ly options of DDR3L SDRAM on the TQMa6x are listed in the following ta le.
Ta le 11: DDR3L SDRAM memory size options
Assem ly option Size
2 × DDR3L 128M16 / ×32 512 M yte
2 × DDR3L 256M16 / ×32 1 G yte
4 × DDR3L 128M16 / ×64 1 G yte
4 × DDR3L 256M16 / ×64 2 G yte
The following address range is reserved for the DDR controller in mode X32 / X64 fixed:
Ta le 12: DDR3L SDRAM address range
Start address Size Chip Select Remark
0x1000_0000 0xFFFF_FFFF CS0# 3840 M yte

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 13
3.2.2.2 eMMC NAND flash
Attention: Malfunction or destruction
Some Micron eMMC have a too high drive-strength. This can lead to poor signal integrity and a life time
reduction of the i.MX6. When using an own ootloader or operating system it is essential to implement
the SET_DSR routine, which is part of the BSP as of revision 0102.
The SET_DSR routine as of BSP revision 0102 must ot e implemented for TQMa6x as of revision 04xx!
An eMMC NAND flash for the oot loader and the application software is assem led. The Hardware Reset function depends on
the BSP implementation. The following lock diagram shows how the eMMC flash is connected to the i.MX6.
i.MX6 eMMC
SD3_CLK
SD3_CMD CLK CMD
SD3_DATA[7:0] DAT[7:0]
RESET#SD3_RESET
Illustration 4: Block diagram eMMC NAND flash connection
3.2.2.3 SPI NOR flash
An SPI NOR flash is also availa le. It can e.g., serve as oot device or as recovery device.
The following lock diagram shows how the SPI NOR flash is connected to the i.MX6.
Illustration 5: Block diagram SPI NOR flash connection
The write protection pin of the SPI NOR flash is availa le at connector X3-40.
The reset pin is not connected y default. A reset can only e carried out via a complete power cycle of the TQMa6x.
The SPI NOR flash can e reset y one or more of the following sources (assem ly option).
•WDOG1# (see 3.2.5.25)
•MX6_POR# (see 3.2.6)
•GPIO2_IO01 (see 3.2.5.7)
The SPI NOR flashes, which can e assem led on the TQMa6x, are listed in the following ta le.
Ta le 13: SPI NOR flash assem ly options
Manufacturer Size Temperature range
Micron 16 M yte 11 –40 °C to +85 °C
Micron 32 M yte 12 –40 °C to +85 °C
Micron 64 M yte 12 –40 °C to +85 °C
Micron 128 M yte 12 –40 °C to +85 °C
Attention: Malfunction in SPI-mode
During the oot process, the i.MX6 only supports the 3- yte mode.
Special hardware mechanisms are required for 4- yte mode operation
else erroneous re oots might occur.
11: Maximum size of SPI NOR flash to oot from.
12: Qualification pending.

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 14
3.2.2.4 EEPROM
A serial EEPROM is availa le for permanent storage of e.g. TQMa6x characteristics or customers parameters.
Depending on the TQMa6x version, the I2C1 or the I2C3 us of the i.MX6 controls the EEPROM, see also 3.2.5.9.
Write-Protection (WP) is not supported.
The following lock diagram shows how the EEPROM is connected to the i.MX6.
Illustration 6: Block diagram EEPROM interface
The following ta le shows the EEPROM used.
Ta le 14: EEPROM, component
Manufacturer Part num er Size Temperature range
STM M24C64-WDW6TP 64 k it –45 °C to +85 °C
The I2C address of the EEPROM is 0x50 / 101 0000b
In the EEPROM, TQMa6x-specific data is stored. It is, however, not essential for the correct operation of the TQMa6x.
The user can delete or alter the data.
In the following ta le, the parameters stored in the EEPROM are shown.
Ta le 15: EEPROM, TQMa6x-specific data
Offset Payload ( yte) Padding ( yte) Size ( yte) Type Remark
0x00 Varia le Varia le 32(10) Binary Hard Reset Configuration Word (HRCW), (optional)
0x20 6(10) 10(10) 16(10) Binary MAC address
0x30 8(10) 8(10) 16(10) ASCII Serial num er
0x40 Varia le Varia le 64(10) ASCII Order code
0x80 – – 8064(10) – (Unused)

User's Manual l TQMa6x & TQMa6xP UM 0401 l © 2018, TQ-Systems Gm H Page 15
3.2.3 RTC
The i.MX6 provides an RTC, which has its own power domain (SNVS). The accuracy of the RTC is mainly determined y the
characteristics of the quartz used. The type FC-135 used on the TQMa6x has a standard frequency tolerance of
±20 ppm @ +25 °C. The following lock diagram shows the implementation on the TQMa6x.
Illustration 7: Block diagram RTC
The RTC power domain SNVS of the i.MX6 is supplied y the PMIC-internal regulator VSNVS. This regulator is supplied either y
VIN (VDD4V2) or y LICELL. LICELL supports coin cells as well as Lithium coin cells or SuperCaps, which can also e charged y
the PMIC. Charging methods and electrical characteristics of the pin LICELL are to e taken from the PMIC data sheet (10).
A coin cell is not suita le for long term ridging ecause of the high current consumption. A Lithium coin cell or a SuperCap
might e an option depending on the use case. It is to e taken note of that the typical charging current is only 60 µA.
For long term ridging an external RTC connected at the I2C us on the carrier oard is recommended.
Ta le 16: Current consumption RTC at pin LICELL
Coin Cell voltage PMIC PF0100A, typical current consumption
2.4 V 85 µA
2.7 V 100 µA
3.0 V 115 µA
3.3 V 130 µA
3.2.4 Temperature sensor
A temperature sensor LM75ADP is assem led on the TQMa6x to monitor the temperature of the TQMa6x.
The LM75ADP is placed on the ottom side of the TQMa6x, (D2 in Illustration 22). Depending on the TQMa6x version,
the temperature sensor is connected to the I2C1 or the I2C3 us of the i.MX6, see also 3.2.5.9.
The following lock diagram shows how the temperature sensor is connected to the i.MX6.
Illustration 8: Block diagram temperature sensor interface
The “OS”-output (over-temperature shutdown) of the sensor is not connected.
The following ta le shows the temperature sensor used.
Ta le 17: Temperature sensor
Manufacturer Part num er Resolution Error Temperature range
NXP LM75ADP 11 it ADC Max. ±3 °C –55 °C to +125 °C
The I2C address of the temperature sensor is 0x48 / 100 1000b