TQ TQMa93xxLA User manual

TQMa93xxLA
Preliminary User's Manual
TQMa93xxLA UM 0003
01.03.2023

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page i
TABLE OF CONTENTS
1. ABOUT THIS MANUAL......................................................................................................................................................................................1
1.1 Copyright and license expenses..................................................................................................................................................................1
1.2 Registered trademarks ....................................................................................................................................................................................1
1.3 Disclaimer ............................................................................................................................................................................................................1
1.4 Imprint...................................................................................................................................................................................................................1
1.5 Tips on safety......................................................................................................................................................................................................2
1.6 Symbols and typographic conventions....................................................................................................................................................2
1.7 Handling and ESD tips.....................................................................................................................................................................................2
1.8 Naming of signals..............................................................................................................................................................................................3
1.9 Further applicable documents / presumed knowledge.....................................................................................................................3
2. BRIEF DESCRIPTION ..........................................................................................................................................................................................4
2.1 Key functions and characteristics................................................................................................................................................................4
2.2 CPU block diagram ...........................................................................................................................................................................................5
3. ELECTRONICS......................................................................................................................................................................................................6
3.1 Interfaces to other systems and devices...................................................................................................................................................6
3.1.1 Pin multiplexing ................................................................................................................................................................................................6
3.1.1.1 Pinout TQMa93xxLA.........................................................................................................................................................................................7
3.1.1.2 TQMa93xxLA signals........................................................................................................................................................................................8
3.2 System components .....................................................................................................................................................................................12
3.2.1 i.MX 93................................................................................................................................................................................................................ 12
3.2.1.1 i.MX 93 derivatives......................................................................................................................................................................................... 12
3.2.1.2 i.MX 93 errata................................................................................................................................................................................................... 12
3.2.1.3 Boot modes ......................................................................................................................................................................................................12
3.2.1.4 Boot configuration......................................................................................................................................................................................... 13
3.2.2 Memory..............................................................................................................................................................................................................14
3.2.2.1 LPDDR4 SDRAM..............................................................................................................................................................................................14
3.2.2.2 eMMC..................................................................................................................................................................................................................14
3.2.2.3 QSPI NOR Flash / NAND Flash.................................................................................................................................................................... 14
3.2.2.4 EEPROM M24C64-D....................................................................................................................................................................................... 15
3.2.2.5 EEPROM with temperature sensor SE97BTP ........................................................................................................................................ 15
3.2.3 Trust Secure Element SE050....................................................................................................................................................................... 15
3.2.4 Accelerometer/Gyroscope.......................................................................................................................................................................... 16
3.2.5 RTC.......................................................................................................................................................................................................................16
3.2.5.1 i.MX 93 internal RTC ......................................................................................................................................................................................16
3.2.5.2 Discrete RTC PCF85063A............................................................................................................................................................................. 16
3.2.6 Interfaces...........................................................................................................................................................................................................17
3.2.6.1 Overview ...........................................................................................................................................................................................................17
3.2.6.2 ADC......................................................................................................................................................................................................................18
3.2.6.3 CAN FD...............................................................................................................................................................................................................18
3.2.6.4 Ethernet / RGMII..............................................................................................................................................................................................19
3.2.6.5 I2C......................................................................................................................................................................................................................... 20
3.2.6.6 JTAG ....................................................................................................................................................................................................................21
3.2.6.7 GPIO ....................................................................................................................................................................................................................21
3.2.6.8 MIPI CSI ..............................................................................................................................................................................................................22
3.2.6.9 MIPI DSI..............................................................................................................................................................................................................22
3.2.6.10 LVDS.................................................................................................................................................................................................................... 23
3.2.6.11 SAI........................................................................................................................................................................................................................ 23
3.2.6.12 SPI ........................................................................................................................................................................................................................24
3.2.6.13 Tamper...............................................................................................................................................................................................................25
3.2.6.14 UART ...................................................................................................................................................................................................................25
3.2.6.15 USB ......................................................................................................................................................................................................................26
3.2.6.16 SD2 (SD-Card)..................................................................................................................................................................................................27
3.2.6.17 External clock sources .................................................................................................................................................................................. 28
3.2.7 Reset and unspecific signals ...................................................................................................................................................................... 28
3.2.8 Power.................................................................................................................................................................................................................. 29
3.2.8.1 Power supply ...................................................................................................................................................................................................29
3.2.8.2 Configurable voltages..................................................................................................................................................................................29
3.2.8.3 Power consumption...................................................................................................................................................................................... 30
3.2.8.4 Voltage monitoring....................................................................................................................................................................................... 30
3.2.8.5 Supply outputs................................................................................................................................................................................................30
3.2.8.6 Power-Up sequence TQMa93xxLA / carrier board.............................................................................................................................31

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page ii
3.2.8.7 Standby and BBSM ........................................................................................................................................................................................ 31
3.2.8.8 PMIC....................................................................................................................................................................................................................31
3.2.9 Impedances...................................................................................................................................................................................................... 32
4. SOFTWARE........................................................................................................................................................................................................ 33
5. MECHANICS......................................................................................................................................................................................................34
5.1 Dimensions....................................................................................................................................................................................................... 34
5.2 Component placement and labeling......................................................................................................................................................35
5.3 Adaptation to the environment ...............................................................................................................................................................37
5.4 Protection against external effects..........................................................................................................................................................37
5.5 Thermal management..................................................................................................................................................................................37
5.6 Structural requirements............................................................................................................................................................................... 37
6. SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS ............................................................................................................38
6.1 EMC .....................................................................................................................................................................................................................38
6.2 ESD....................................................................................................................................................................................................................... 38
6.3 Shock and Vibration................................................................................................................................................................................... 38
6.4 Climate and operational conditions........................................................................................................................................................ 39
6.5 Operational safety and personal security..............................................................................................................................................39
6.6 Reliability and service life............................................................................................................................................................................39
7. ENVIRONMENT PROTECTION.....................................................................................................................................................................40
7.1 RoHS.................................................................................................................................................................................................................... 40
7.2 WEEE®.................................................................................................................................................................................................................40
7.3 REACH®.............................................................................................................................................................................................................. 40
7.4 EuP....................................................................................................................................................................................................................... 40
7.5 Battery................................................................................................................................................................................................................ 40
7.6 Packaging..........................................................................................................................................................................................................40
7.7 Other entries....................................................................................................................................................................................................40
8. APPENDIX.......................................................................................................................................................................................................... 41
8.1 Acronyms and definitions...........................................................................................................................................................................41
8.2 References ........................................................................................................................................................................................................43

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page iii
TABLE DIRECTORY
Table 1: Terms and conventions ..................................................................................................................................................................................2
Table 2: Pinout TQMa93xxLA, top view through TQMa93xxLA........................................................................................................................7
Table 3: TQMa93xxLA, signals.......................................................................................................................................................................................8
Table 4: i.MX 93 derivatives......................................................................................................................................................................................... 12
Table 5: Boot configuration i.MX 93.........................................................................................................................................................................13
Table 6: QSPI signals ......................................................................................................................................................................................................14
Table 7: ISO_7816 and ISO_14443 signals............................................................................................................................................................. 16
Table 8: TQMa93xxLA interfaces ...............................................................................................................................................................................17
Table 9: Pin assignment ADC......................................................................................................................................................................................18
Table 10: CAN FD signals................................................................................................................................................................................................18
Table 11: ENET signals in RGMII mode.......................................................................................................................................................................19
Table 12: Address assignment I2C1 bus.................................................................................................................................................................... 20
Table 13: Pin assignment I2C .........................................................................................................................................................................................20
Table 14: JTAG signals ..................................................................................................................................................................................................... 21
Table 15: GPIO signals......................................................................................................................................................................................................21
Table 16: MIPI CSI signals................................................................................................................................................................................................ 22
Table 17: MIPI DSI signals ...............................................................................................................................................................................................22
Table 18: LVDS signals..................................................................................................................................................................................................... 23
Table 19: SAI signals .........................................................................................................................................................................................................24
Table 20: Pinning SPI........................................................................................................................................................................................................24
Table 21: Pinning Tamper .............................................................................................................................................................................................. 25
Table 22: UART signals..................................................................................................................................................................................................... 26
Table 23: USB signals........................................................................................................................................................................................................ 26
Table 24: SD2 signals........................................................................................................................................................................................................ 27
Table 25: CLK signals........................................................................................................................................................................................................28
Table 26: Reset and unspecific signals ......................................................................................................................................................................29
Table 27: Power consumption...................................................................................................................................................................................... 30
Table 28: Voltages provided by TQMa93xxLA........................................................................................................................................................30
Table 29: PMIC signals .....................................................................................................................................................................................................32
Table 30: Trace impedance recommendations......................................................................................................................................................32
Table 31: TQMa93xxLA heights....................................................................................................................................................................................34
Table 32: Labels on TQMa93xxLA................................................................................................................................................................................36
Table 33: Shock resistance .............................................................................................................................................................................................38
Table 34: Vibration resistance....................................................................................................................................................................................... 38
Table 35: Climate and operational conditions........................................................................................................................................................ 39
Table 36: Acronyms ..........................................................................................................................................................................................................41
Table 37: Further applicable documents..................................................................................................................................................................43

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page iv
FIGURE DIRECTORY
Figure 1: Block diagram i.MX 93.....................................................................................................................................................................................5
Figure 2: Block diagram TQMa93xxLA (simplified)..................................................................................................................................................6
Figure 3: Block diagram eMMC.................................................................................................................................................................................... 14
Figure 4: Block diagram EEPROM................................................................................................................................................................................ 15
Figure 5: Block diagram SE050..................................................................................................................................................................................... 15
Figure 6: Block diagram RTC supply (TQMa93xxLA with discrete RTC) ........................................................................................................17
Figure 7: Block diagram ADC........................................................................................................................................................................................ 18
Figure 8: Block diagram CAN........................................................................................................................................................................................18
Figure 9: Block diagram RGMII..................................................................................................................................................................................... 19
Figure 10: Block diagram I2C ...........................................................................................................................................................................................20
Figure 11: Block diagram JTAG interface.................................................................................................................................................................... 21
Figure 12: Block diagram MIPI CSI.................................................................................................................................................................................22
Figure 13: Block diagram MIPI DSI ................................................................................................................................................................................ 22
Figure 14: Block diagram LVDS ......................................................................................................................................................................................23
Figure 15: Block diagram SAI3........................................................................................................................................................................................23
Figure 16: Block diagram SPI...........................................................................................................................................................................................24
Figure 17: Block diagram Tamper ................................................................................................................................................................................. 25
Figure 18: Block diagram UART interfaces.................................................................................................................................................................25
Figure 19: Block diagram USB interfaces....................................................................................................................................................................26
Figure 20: Block diagram SD card interface............................................................................................................................................................... 27
Figure 21: Block diagram external clocks...................................................................................................................................................................28
Figure 22: Block diagram Reset......................................................................................................................................................................................28
Figure 23: Possible power supply of the CPU-rail NVCC_GPIO ..........................................................................................................................29
Figure 24: Block diagram power supply carrier board .......................................................................................................................................... 31
Figure 25: TQMa93xxLA dimensions, top view........................................................................................................................................................34
Figure 26: TQMa93xxLA dimensions, side view....................................................................................................................................................... 34
Figure 27: TQMa93xxLA dimensions, top through view ......................................................................................................................................35
Figure 28: TQMa93xxLA, component placement top............................................................................................................................................35
Figure 29: TQMa93xxLA, LGA pad numbering scheme, bottom view ............................................................................................................36
Figure 30: Labels on TQMa93xxLA................................................................................................................................................................................36

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page v
REVISION HISTORY
Rev.
Date
Name
Pos.
Modification
0001
1.12.2022
Kreuzer
First issue
0002
27.2.2022
Kreuzer
all
Adjustments after internal review
0003
1.3.2022
Kreuzer
Typo, formating

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 1
1. ABOUT THIS MANUAL
1.1 Copyright and license expenses
Copyright protected © 2023 by TQ-Systems GmbH.
This Preliminary User's Manual may not be copied, reproduced, translated, changed or distributed, completely or partially in
electronic, machine readable, or in any other form without the written consent of TQ-Systems GmbH.
The drivers and utilities for the components used as well as the BIOS are subject to the copyrights of the respective
manufacturers. The licence conditions of the respective manufacturer are to be adhered to.
Bootloader-licence expenses are paid by TQ-Systems GmbH and are included in the price.
Licence expenses for the operating system and applications are not taken into consideration and must be calculated / declared
separately.
1.2 Registered trademarks
TQ-Systems GmbH aims to adhere to copyrights of all graphics and texts used in all publications, and strives to use original
or license-free graphics and texts.
All brand names and trademarks mentioned in this Preliminary User's Manual, including those protected by a third party, unless
specified otherwise in writing, are subjected to the specifications of the current copyright laws and the proprietary laws of the
present registered proprietor without any limitation. One should conclude that brand and trademarks are rightly protected by a
third party.
1.3 Disclaimer
TQ-Systems GmbH does not guarantee that the information in this Preliminary User's Manual is up-to-date, correct, complete or
of good quality. Nor does TQ-Systems GmbH assume guarantee for further usage of the information. Liability claims against TQ-
Systems GmbH, referring to material or non-material related damages caused, due to usage or non-usage of the information
given in this Preliminary User's Manual, or due to usage of erroneous or incomplete information, are exempted, as long as there
is no proven intentional or negligent fault of TQ-Systems GmbH.
TQ-Systems GmbH explicitly reserves the rights to change or add to the contents of this Preliminary User's Manual or parts of it
without special notification.
Important Notice:
Before using the Starterkit MBa93xxLA or parts of the schematics of the MBa93xxLA, you must evaluate it and determine if it is
suitable for your intended application. You assume all risks and liability associated with such use. TQ-Systems GmbH makes no
other warranties including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. Except
where prohibited by law, TQ-Systems GmbH will not be liable for any indirect, special, incidental or consequential loss or damage
arising from the usage of the Starterkit MBa93xxLA or schematics used, regardless of the legal theory asserted.
1.4 Imprint
TQ-Systems GmbH
Gut Delling, Mühlstraße 2
D-82229 Seefeld
Tel: [phone]
Fax: [phone]
E-Mail: Info@TQ-Group
Web: TQ-Group

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 2
1.5 Tips on safety
Improper or incorrect handling of the product can substantially reduce its life span.
1.6 Symbols and typographic conventions
Table 1: Terms and conventions
Symbol
Meaning
This symbol represents the handling of electrostatic-sensitive modules and / or components. These
components are often damaged / destroyed by the transmission of a voltage higher than about 50 V.
A human body usually only experiences electrostatic discharges above approximately 3,000 V.
This symbol indicates the possible use of voltages higher than 24 V.
Please note the relevant statutory regulations in this regard.
Non-compliance with these regulations can lead to serious damage to your health and may damage
or destroy the component.
This symbol indicates a possible source of danger.
Ignoring the instructions described can cause health damage, or damage the hardware.
This symbol represents important details or aspects for working with TQ-products.
Command
A font with fixed-width is used to denote commands, contents, file names, or menu items.
1.7 Handling and ESD tips
General handling of your TQ-products
The TQ-product may only be used and serviced by certified personnel who have taken note of the
information, the safety regulations in this document and all related rules and regulations.
A general rule is not to touch the TQ-product during operation. This is especially important when
switching on, changing jumper settings or connecting other devices without ensuring beforehand
that the power supply of the system has been switched off.
Violation of this guideline may result in damage / destruction of the TQMa93xxLA and be dangerous
to your health.
Improper handling of your TQ-product would render the guarantee invalid.
Proper ESD handling
The electronic components of your TQ-product are sensitive to electrostatic discharge (ESD).
Always wear antistatic clothing, use ESD-safe tools, packing materials etc., and operate your TQ-
product in an ESD-safe environment. Especially when you switch modules on, change jumper settings,
or connect other devices.

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 3
1.8 Naming of signals
A hash mark (#) at the end of the signal name indicates a low-active signal.
Example: RESET#
If a signal can switch between two functions and if this is noted in the name of the signal, the low-active function is marked with
a hash mark and shown at the end.
Example: C / D#
If a signal has multiple functions, the individual functions are separated by slashes when they are important for the wiring.
The identification of the individual functions follows the above conventions.
Example: WE2# / OE#
1.9 Further applicable documents / presumed knowledge
•Specifications and manual of the modules used:
These documents describe the service, functionality and special characteristics of the module used (incl. BIOS).
•Specifications of the components used:
The manufacturer's specifications of the components used, for example CompactFlash cards, are to be taken note of.
They contain, if applicable, additional information that must be taken note of for safe and reliable operation.
These documents are stored at TQ-Systems GmbH.
•Chip errata:
It is the user's responsibility to make sure all errata published by the manufacturer of each component are taken note of.
•Software behaviour:
No warranty can be given, nor responsibility taken for any unexpected software behaviour due to deficient components.
•General expertise:
Expertise in electrical engineering / computer engineering is required for the installation and the use of the device.
The following documents are required to fully comprehend the following contents:
•MBa93xxLA circuit diagram
•MBa93xxLA
•i.MX 93 Data Sheet
•i.MX 93 Reference Manual
•U-Boot documentation: www.denx.de/wiki/U-Boot/Documentation
•PTXdist documentation: www.ptxdist.de
•Yocto documentation: www.yoctoproject.org/docs/
•TQ-Support Wiki: Support-Wiki TQMa93xxLA (in progress)

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 4
2. BRIEF DESCRIPTION
This Preliminary User's Manual describes the hardware of the TQMa93xxLA as of revision 0100, in combination with the
MBa93xxLA as of revision 0100 and refers to some software settings. A certain TQMa93xxLA derivative does not necessarily
provide all features described in this Preliminary User's Manual.
This Preliminary User's Manual does neither replace the i.MX 93 Reference Manual (1), nor the i.MX 93 Data Sheet (2), nor any
other documents from NXP.
The TQMa93xxLA is a universal Minimodule based on the NXP ARM®Cortex®-A55 based i.MX 93 CPU family, see also Table 4.
2.1 Key functions and characteristics
The TQMa93xxLA extends the TQ-Systems GmbH product range and offers an outstanding computing performance.
All essential i.MX 93 signals are routed to the TQMa93xxLA LGA pads. There are therefore no restrictions for customers using the
TQMa93xxLA with respect to an integrated customised design. All essential components like CPU, LPDDR4, eMMC, and PMIC are
already integrated on the TQMa93xxLA.
The main features of the TQMa93xxLA are:
•64 bit NXP i.MX 93 CPU, up to 2 × ARM Cortex®-A55 and 1 × Cortex®-M33
•Up to 2 Gbyte of LPDDR4- or LPDDR4X RAM
•Up to 256 Gbyte of eMMC NAND Flash, eMMC standard 5.1
•Up to 256 Mbyte QSPI NOR Flash (optional)
•64 Kbit EEPROM (optional)
•Temperature sensor + EEPROM
•NXP Power Management Integrated Circuit PCA9451
•RTC (optional)
•Trust Secure Element (optional)
•Gyroscope (optional)
•All essential i.MX 93 signals are routed to the TQMa93xxLA LGA pads
•Single supply voltage 5 V

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 5
2.2 CPU block diagram
Figure 1: Block diagram i.MX 93
(Source: NXP)

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 6
3. ELECTRONICS
The information provided in this User's Manual is only valid in connection with the tailored boot loader,
which is preinstalled on the TQMa93xxLA, and the BSP provided by TQ-Systems GmbH, see also chapter 4.
i.MX 93
281 LGA pads
eMMC 5.1 (opt.)
Gyroscope (opt.)
Temperature
sensor / EEPROM
PMIC
NXP PCA9451A
RGMII
USB
UART
I2C
GPIO
SPI
CSI DSI
LVDS
1x QSPI-NOR-
Flash (optional)
RTC (optional)
LPDDR4-RAM
TPM (optional)
Supervisor
EEPROM (opt.)
5 V
5 V
Figure 2: Block diagram TQMa93xxLA (simplified)
3.1 Interfaces to other systems and devices
3.1.1 Pin multiplexing
The multiple pin configurations by different i.MX 93 internal function units must be taken note of.
The pin assignment in Table 3 refers to a TQMa93xxLA with i.MX 93 CPU in combination with the carrier board MBa93xxLA.
NXP provides a tool showing the multiplexing and simplifies the selection and configuration (i.MX Pins Tool NXP Tool).
The electrical and pin characteristics are to be taken from the i.MX 93 and PMIC documentation, see Table 37.
Attention: Destruction or malfunction, pin multiplexing
Depending on the configuration, many i.MX 93 pins can provide several different functions.
Please take note of the information concerning the configuration of these pins in the i.MX 93
Reference Manual (1), before integration or start-up of your carrier board / Starterkit.
Improper programming by operating software can cause malfunctions, deterioration or
destruction of the TQMa93xxLA.
The descriptions given in the following tables should be taken note of:
−DNC: These pins must never be connected and have to be left open.
Please contact TQ-Support for details.

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 7
3.1.1.1 Pinout TQMa93xxLA
The TQMa93xxLA has a total of 281 LGA pads. The TQMa93xxLA is soldered and thus permanently connected to the carrier board.
It is not trivial and it is not recommended to remove the TQMa93xxLA.
The following table shows the TQMa93xxLA pad-out, top view through the TQMa93xxLA.
Table 2: Pinout TQMa93xxLA, top view through TQMa93xxLA
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
19
Ground
LVDS_
CLK_P
LVDS_
CLK_N
Ground
LVDS_
D0_P
LVDS_
D0_N
Ground
DSI_CLK
_N
DSI_CLK
_P
Ground
CSI_D0_
N
CSI_D0_
P
CSI_D1_
N
CSI_D1_
P
Ground
USB1_D
P
USB1_D
N
19
18
LVDS_
D3_P
LVDS_
D3_N
Ground
LVDS_
D2_P
LVDS_
D2_N
Ground
DSI_D0_
N
DSI_D0_
P
Ground
DSI_D2_
N
DSI_D2_
P
Ground
CSI_CLK
_N
CSI_CLK
_P
DNC
DNC
Ground
USB2_D
P
USB2_D
N
18
17
ISO_
7816_IO
1
Ground
ISO_
14443_L
B
Ground
LVDS_
D1_P
LVDS_
D1_N
Ground
DSI_D1_
N
DSI_D1_
P
Ground
DSI_D3_
N
DSI_D3_
P
Ground
USB1_
VBUS
Ground
DNC
DNC
Ground
ADC_IN0
17
16
Ground
ISO_
14443_L
A
Ground
ISO_
7816_RS
T
M33_NM
I
Ground
CAN1_R
X
CAN1_T
X
Ground
Tamper1
Tamper0
Ground
USB1_ID
USB2_ID
Ground
USB2_
VBUS
Ground
ADC_IN2
ADC_IN1
16
15
ISO_
7816_CL
K
ISO_
7816_IO
2
Ground
V_LICELL
Ground
TEMP_
EVENT#
Ground
GPIO1_
IO02
CLK1_IN
Ground
ADC_IN3
15
14
Ground
ENET2_
MDIO
RFU
Ground
RTC_
EVENT#
Ground
CLK2_IN
Ground
QSPI_
SCLK
Ground
14
13
ENET2_
MDC
ENET2_R
D0
RFU
RFU
Ground
RFU
Ground
QSPI_
SS0#
QSPI_
DATA0
QSPI_
DATA2
13
12
ENET2_R
D2
ENET2_R
D1
RFU
Ground
GPIO1_
IO06
RFU
RFU
QSPI_
DATA1
Ground
QSPI_
DATA3
12
11
Ground
ENET2_R
D3
Ground
UART1_
TXD
GPIO1_
IO07
Ground
V_SD2
Ground
SPI1_SIN
Ground
11
10
ENET2_
RXC
Ground
I2C1_SC
L
UART1_
RXD
Ground
JTAG_TC
K
Ground
SPI1_PC
S0
SPI1_SO
UT
SPI1_SC
K
10
9
ENET2_T
D0
ENET2_
RX_CTL
I2C1_SD
A
Ground
JTAG_TD
I
JTAG_T
MS
UART6_
TXD
UART5_
TXD
Ground
V_GPIO
9
8
Ground
ENET2_T
D1
Ground
RFU
Ground
JTAG_TD
O
Ground
UART6_
RXD
UART5_
RXD
UART5_
CTS
UART5_
RTS
8
7
ENET2_T
D3
Ground
ENET2_T
D2
Ground
RFU
Ground
ONOFF
Ground
Ground
GPIO2_
IO06
Ground
Ground
Ground
7
6
ENET2_T
XC
ENET2_
TX_CTL
Ground
Ground
PMIC_RS
T#
V_3V3_S
D
Ground
PMIC_
WDOG_I
N#
Ground
WDOG_
ANY
Ground
RFU
RFU
Ground
GPIO2_
IO07
Ground
SPI3_PC
S0
SPI3_SIN
SPI3_SO
UT
6
5
Ground
Ground
Ground
Ground
Ground
Ground
PMIC_
SCLH
PMIC_
SCLL
RESET_
OUT#
Ground
CAN2_R
X
CAN2_T
X
GPIO2_
IO24
I2C5_SD
A
Ground
UART8_
TXD
UART8_
RXD
Ground
SPI3_SC
K
5
4
V_5V_IN
V_5V_IN
V_5V_IN
Ground
Ground
Ground
PMIC_
SDAH
PMIC_
SDAL
Ground
I2C3_SC
L
I2C3_SD
A
Ground
SAI3_TX
FS
I2C5_SC
L
UART3_
TXD
UART3_
RXD
Ground
SD2_
DATA0
Ground
4
3
V_5V_IN
V_5V_IN
V_5V_IN
Ground
Ground
Ground
Ground
ENET1_R
D2
ENET1_
RX_CTL
Ground
ENET1_T
D2
ENET1_
TX_CTL
Ground
SAI3_RX
FS
SAI3_TX
D0
Ground
SD2_
DATA2
SD2_
DATA1
SD2_CM
D
3
2
V_5V_IN
Ground
Ground
CLK4_O
UT
Ground
ENET1_
MDIO
ENET1_R
D0
Ground
ENET1_
RXC
ENET1_T
D0
Ground
ENET1_T
XC
SAI3_RX
D0
Ground
SAI3_RX
C
SAI3_TX
C
SD2_CD
#
Ground
SD2_CLK
2
1
CLK1_O
UT
CLK2_O
UT
CLK3_O
UT
Ground
ENET1_
MDC
ENET1_R
D1
ENET1_R
D3
Ground
ENET1_T
D1
ENET1_T
D3
Ground
V_1V8
V_3V3
Ground
SAI3_MC
LK
SD2_RST
#
SD2_
DATA3
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 8
3.1.1.2 TQMa93xxLA signals
Details about the electrical characteristics of single pins and interfaces are to be taken from the i.MX 93 documentation
(1), (2), (3), as well as the PMIC Data Sheet (4).
Table 3: TQMa93xxLA, signals
TQMa93xxLA-Pad
Signal
Group
Dir.
Level
CPU-
Ball
Comment
W17
ADC_IN0
ADC
I
1.8 V
B19
W16
ADC_IN1
ADC
I
1.8 V
A20
V16
ADC_IN2
ADC
I
1.8 V
B20
W15
ADC_IN3
ADC
I
1.8 V
B21
G16
CAN1_RX
CAN
I
3.3 V
J17
H16
CAN1_TX
CAN
O
3.3 V
G17
L5
CAN2_RX
CAN
I
V_GPIO
W21
M5
CAN2_TX
CAN
O
V_GPIO
V21
U15
CLK1_IN
CLK
I
1.8 V
B17
B1
CLK1_OUT
CLK
O
1.8 V
AA2
T14
CLK2_IN
CLK
I
1.8 V
A18
C1
CLK2_OUT
CLK
O
1.8 V
Y3
D1
CLK3_OUT
CLK
O
1.8 V
U4
D2
CLK4_OUT
CLK
O
1.8 V
V4
G7
ONOFF
Config
I
1.8 V
A19
J5
RESET_OUT#
Config
O
OD
-
Open-Drain
(up to 5.5 V)
E6
PMIC_RST#
Config
I
1.8 V
-
H6
PMIC_WDOG_IN#
Config
I
3.3 V
-
E14
RTC_EVENT#
Config
O
OD
-
Open-Drain
(0.7 V to 5.5 V)
F15
TEMP_EVENT#
Config
O
OD
-
Open-Drain
(0.9 V to 3.6 V)
N18
CSI_CLK_N
CSI
I
1.8 V
D10
P18
CSI_CLK_P
CSI
I
1.8 V
E10
M19
CSI_D0_N
CSI
I
1.8 V
A11
N19
CSI_D0_P
CSI
I
1.8 V
B11
P19
CSI_D1_N
CSI
I
1.8 V
A10
R19
CSI_D1_P
CSI
I
1.8 V
B10
J19
DSI_CLK_N
DSI
O
1.8 V
D6
K19
DSI_CLK_P
DSI
O
1.8 V
E6
G18
DSI_D0_N
DSI
O
1.8 V
A6
H18
DSI_D0_P
DSI
O
1.8 V
B6
H17
DSI_D1_N
DSI
O
1.8 V
A7
J17
DSI_D1_P
DSI
O
1.8 V
B7
K18
DSI_D2_N
DSI
O
1.8 V
A8
L18
DSI_D2_P
DSI
O
1.8 V
B8
L17
DSI_D3_N
DSI
O
1.8 V
A9
M17
DSI_D3_P
DSI
O
1.8 V
B9
F1
ENET_MDC
ENET
O
1.8 V
AA11
F2
ENET_MDIO
ENET
I/O
1.8 V
AA10
G2
ENET_RD0
ENET
I
1.8 V
AA8
G1
ENET_RD1
ENET
I
1.8 V
Y9
H3
ENET_RD2
ENET
I
1.8 V
AA9
H1
ENET_RD3
ENET
I
1.8 V
Y10

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 9
3.1.1.2 TQMa93xxLA signals (continued)
Table 3: TQMa93xxLA, signals (continued)
TQMa93xxLA-Pad
Signal
Group
Dir.
Level
CPU-
Ball
Comment
K2
ENET_TD0
ENET
O
1.8 V
W11
K1
ENET_TD1
ENET
O
1.8 V
T12
L3
ENET_TD2
ENET
O
1.8 V
U12
L1
ENET_TD3
ENET
O
1.8 V
V12
J2
ENET_RXC
ENET
I
1.8 V
AA7
M2
ENET_TXC
ENET
O
1.8 V
U10
J3
ENET_RX_CTL
ENET
I
1.8 V
Y8
M3
ENET_TX_CTL
ENET
O
1.8 V
V10
A13
ENET2_MDC
ENET
O
1.8 V
Y7
B14
ENET2_MDIO
ENET
I/O
1.8 V
AA6
B13
ENET2_RD0
ENET
I
1.8 V
AA4
B12
ENET2_RD1
ENET
I
1.8 V
Y5
A12
ENET2_RD2
ENET
I
1.8 V
AA5
B11
ENET2_RD3
ENET
I
1.8 V
Y6
T8
ENET2_TD0
ENET
O
1.8 V
T8
B8
ENET2_TD1
ENET
O
1.8 V
U8
C7
ENET2_TD2
ENET
O
1.8 V
V8
A7
ENET2_TD3
ENET
O
1.8 V
T10
F10
ENET2_RXC
ENET
I
1.8 V
AA3
A6
ENET2_TXC
ENET
O
1.8 V
U6
A9
ENET2_RX_CTL
ENET
I
1.8 V
Y4
B6
ENET2_TX_CTL
ENET
O
1.8 V
V6
T15
GPIO1_IO02
GPIO
I/O
3.3 V
D20
E12
GPIO1_IO06
GPIO
I/O
3.3 V
F20
E11
GPIO1_IO07
GPIO
I/O
3.3 V
F21
Used as
BOOT_MODE1
at startup.
T7
GPIO2_IO06
GPIO
I/O
V_GPIO
L20
R6
GPIO2_IO07
GPIO
I/O
V_GPIO
L21
N5
GPIO2_IO24
GPIO
I/O
V_GPIO
U21
K6
WDOG_ANY
GPIO
O
3.3 V
J18
E16
M33_NMI
GPIO
I
3.3 V
G18
A17
ISO_7816_IO1
ISO_7816
I/O
3.3 V
-
B15
ISO_7816_IO2
ISO_7816
I/O
3.3 V
-
A15
ISO_7816_CLK
ISO_7816
I
3.3 V
-
D16
ISO_7816_RST
ISO_7816
I
3.3 V
-
B16
ISO_14443_LA
ISO_14443
I/O
3.3 V
-
C17
ISO_14443_LB
ISO_14443
I/O
3.3 V
-
A10
I2C1_SCL
I2C
O
3.3 V
C20
B9
I2C1_SDA
I2C
I/O
3.3 V
C21
K4
I2C3_SCL
I2C
O
V_GPIO
Y21
L4
I2C3_SDA
I2C
I/O
V_GPIO
W20
P4
I2C5_SCL
I2C
O
V_GPIO
U20
P5
I2C5_SDA
I2C
I/O
V_GPIO
U18
C9
JTAG_TDI
JTAG
I
1.8 V
W1
F8
JTAG_TDO
JTAG
O
1.8 V
Y2
E9
JTAG_TMS
JTAG
I
1.8 V
W2
F9
JTAG_TCK
JTAG
I
1.8 V
Y1

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 10
3.1.1.2 TQMa93xxLA signals (continued)
Table 3: TQMa93xxLA, signals (continued)
TQMa93xxLA-Pad
Signal
Group
Dir.
Level
CPU-
Ball
Comment
C19
LVDS_CLK_P
LVDS
O
1.8 V
B3
D19
LVDS_CLK_N
LVDS
O
1.8 V
A3
F19
LVDS_D0_P
LVDS
O
1.8 V
B5
G19
LVDS_D0_N
LVDS
O
1.8 V
A5
E17
LVDS_D1_P
LVDS
O
1.8 V
B4
F17
LVDS_D1_N
LVDS
O
1.8 V
A4
D18
LVDS_D2_P
LVDS
O
1.8 V
B2
E18
LVDS_D2_N
LVDS
O
1.8 V
A2
A18
LVDS_D3_P
LVDS
O
1.8 V
C1
B18
LVDS_D3_N
LVDS
O
1.8 V
B1
G4
PMIC_SDAH
LVLTRL
I/O
3.3 V
-
H4
PMIC_SDAL
LVLTRL
I/O
1.8 V
-
G5
PMIC_SCLH
LVLTRL
I/O
3.3 V
-
H5
PMIC_SCLL
LVLTRL
I/O
1.8 V
-
U13
QSPI_SS0#
QSPI
O
1.8 V
U16
V14
QSPI_SCLK
QSPI
O
1.8 V
V16
V13
QSPI_DATA0
QSPI
I/O
1.8 V
T16
U12
QSPI_DATA1
QSPI
I/O
1.8 V
V14
W13
QSPI_DATA2
QSPI
I/O
1.8 V
U14
W12
QSPI_DATA3
QSPI
I/O
1.8 V
T14
T1
SAI3_MCLK
SAI
O
V_GPIO
R20
R2
SAI3_RXC
SAI
I
V_GPIO
R18
T2
SAI3_TXC
SAI
O
V_GPIO
R21
P3
SAI3_RXFS
SAI
I
V_GPIO
R17
N4
SAI3_TXFS
SAI
O
V_GPIO
V20
N2
SAI3_RXD0
SAI
I
V_GPIO
T20
R3
SAI3_TXD0
SAI
O
V_GPIO
T21
U2
SD2_CD#
SD
I
1.8 / 3.3 V
Y17
U1
SD2_RST#
SD
O
1.8 / 3.3 V
AA17
W2
SD2_CLK
SD
O
1.8 / 3.3 V
AA19
W3
SD2_CMD
SD
I/O
1.8 / 3.3 V
Y19
V4
SD2_DATA0
SD
I/O
1.8 / 3.3 V
Y18
V3
SD2_DATA1
SD
I/O
1.8 / 3.3 V
AA18
U3
SD2_DATA2
SD
I/O
1.8 / 3.3 V
Y20
V1
SD2_DATA3
SD
I/O
1.8 / 3.3 V
AA20
C10
SPI1_PCS0
SPI
O
3.3 V
G21
Used as
BOOT_MODE2
at startup.
U10
SPI1_SIN
SPI
I
3.3 V
G20
V11
SPI1_SOUT
SPI
O
3.3 V
H20
V10
SPI1_SCK
SPI
O
3.3 V
H21
Used as
BOOT_MODE3
at startup.
W5
SPI3_SCK
SPI
O
V_GPIO
N18
U6
SPI3_PCS0
SPI
O
V_GPIO
M20
V6
SPI3_SIN
SPI
I
V_GPIO
M21
W6
SPI3_SOUT
SPI
O
V_GPIO
N17
L16
Tamper0
Tamper
I/O
1.8 V
B16
K16
Tamper1
Tamper
I/O
1.8 V
F14
N16
USB1_ID
USB
I
1.8 V
C11

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 11
3.1.1.2 TQMa93xxLA signals (continued)
Table 3: TQMa93xxLA, signals (continued)
TQMa93xxLA-Pad
Signal
Group
Dir.
Level
CPU-
Ball
Comment
P17
USB1_VBUS
USB
P
5 V
F12
U19
USB1_DP
USB
I/O
3.3 V
B14
V19
USB1_DN
USB
I/O
3.3 V
A14
P16
USB2_ID
USB
I
1.8 V
E12
T16
USB2_VBUS
USB
P
5 V
E14
V18
USB2_DP
USB
I/O
3.3 V
B15
W18
USB2_DN
USB
I/O
3.3 V
A15
W10
UART1_TXD
UART
O
3.3 V
E21
Used as
BOOT_MODE0
at startup.
D11
UART1_RXD
UART
I
3.3 V
E21
R4
UART3_TXD
UART
O
V_GPIO
P20
T4
UART3_RXD
UART
I
V_GPIO
P21
D10
UART5_TXD
UART
O
V_GPIO
J21
U9
UART5_RXD
UART
I
V_GPIO
J20
U8
UART5_CTS
UART
I
V_GPIO
K20
V8
UART5_RTS
UART
O
V_GPIO
K21
W8
UART6_TXD
UART
O
V_GPIO
L17
T9
UART6_RXD
UART
I
V_GPIO
L18
T5
UART8_TXD
UART
O
V_GPIO
N20
U5
UART8_RXD
UART
I
V_GPIO
N21
M6, N6, E7, D8, C12, F12, T12,
C13, D13, F13, C14
RFU
-
-
-
-
Reserved for
future use
T17, U17, R18, T18
DNC
-
-
-
-
N1
V_1V8
Power
P
1.8 V
-
Power-Output
(max. 500 mA)
P1
V_3V3
Power
P
3.3 V
-
Power-Output
(max. 500 mA)
A2
V_5V_IN
Power
P
5 V
-
Power-Input
A3
V_5V_IN
Power
P
5 V
-
Power-Input
B3
V_5V_IN
Power
P
5 V
-
Power-Input
C3
V_5V_IN
Power
P
5 V
-
Power-Input
A4
V_5V_IN
Power
P
5 V
-
Power-Input
B4
V_5V_IN
Power
P
5 V
-
Power-Input
C4
V_5V_IN
Power
P
5 V
-
Power-Input
W9
V_GPIO
Power
P
1.8 / 3.3 V
N15,
N16
Power-Input
F6
V_3V3_SD
Power
P
3.3 V
-
Power-Output
(max. 400 mA)
T11
V_SD2
Power
P
1.8 / 3.3 V
-
Power-Output
(max. 75 mA)
D15
V_LICELL
Power
P
3 V
-
Power-Input
E1, J1, M1, R1, B2, C2, E2, H2, L2,
P2,V2, D3, E3, F3, G3, K3,N3, T3,
D4, E4, F4, J4, M4, U4, W4, A5, B5,
C5, D5, E5, F5, K5, R5, V5, C6, D6,
G6, J6, L6, P6, T6, B7, D7, F7, H7,
R7, U7, V7, W7, A8, C8, E8, G8, D9,
V9, B10, E10, T10, A11, C11, F11,
U11, W11, D12, V12, E13, T13,
A14, D14, F14, U14, W14,C15,
E15, G15, V15, A16, C16, F16, J16,
M16, R16, U16, B17, D17, G17,
K17, N17, R17, V17, C18, F18, J18,
M18, U18, B19, E19, H19, L19,
T19
Ground
Power
P
0 V
-

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 12
3.1.1.2 TQMa93xxLA signals (continued)
Table 3: TQMa93xxLA, signals (continued)
TQMa93xxLA-Pad
Signal
Group
Dir.
Level
CPU-
Ball
Comment
A1, W1, J7, K7, L7, M7, N7, P7, H8,
J8, K8, L8, M8, N8, P8, R8, G9, H9,
J9, K9, L9, M9, N9, P9, R9, G10,
H10, J10, K10, L10, M10, N10,
P10, R10, G11, H11, J11, K11, L11,
M11, N11, P11, R11, G12, H12,
J12, K12, L12, M12, N12, P12,
R12, G13, H13, J13, K13, L13,
M13, N13, P13, R13, G14, H14,
J14, K14, L14, M14, N14, P14,
R14, H15, J15, K15, L15, M15,
N15, P15, R15, A19, W19
-
Not
available
-
-
-
Not available
3.2 System components
3.2.1 i.MX 93
3.2.1.1 i.MX 93 derivatives
Depending on the TQMa93xxLA version, one of the following i.MX 93 derivatives is assembled.
Table 4: i.MX 93 derivatives
TQMa93xxLA version
i.MX 93 derivative
i.MX 93 clocks
Temperature range
TQMa9352LA
i.MX 9352
2 x A55: 1.5 GHz, M33: 250 MHz, NPU
40
TQMa9351LA
i.MX 9351
1 x A55: 1.5 GHz, M33: 250 MHz, NPU
TQMa9332LA
i.MX 9332
2 x A55: 1.5 GHz, M33: 250 MHz
TQMa9331LA
i.MX 9331
1 x A55: 1.5 GHz, M33: 250 MHz
3.2.1.2 i.MX 93 errata
Attention: Destruction or malfunction, i.MX 93 errata
Please take note of the current i.MX 93 errata (5).
3.2.1.3 Boot modes
The i.MX 93 has a ROM with integrated boot loader. After the release of PMIC_POR# the System Controller (SCU) boots from
the internal ROM and then loads the program image from the selected boot device. For example, the integrated eMMC or the
optional QSPI NOR Flash can be selected as the default boot device. The following boot sources are supported by TQMa93xxLA:
•eMMC (SD1)
•QSPI/FlexSPI NOR Flash (SD1 + SD3)
•SD card (SD2)
•Serial Download (USB1)
Alternatively, an image can be loaded into the internal RAM using the serial downloader.
More information about the boot flow can be found in the Reference Manual (1), and the Data Sheet (2) of i.MX 93.

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 13
3.2.1.4 Boot configuration
This section provides information on boot mode configuration pads allocation and boot device interface allocation. The i.MX 93
uses four BOOT_MODE signals provided on the TQMa93xxLA's LGA pads. These require pull-up/pull-down (4.7 / 100 )
wiring to 3.3 V and Ground. However, the BOOT_MODE signals are not dedicated to this function, but have other functionalities
in normal operation. The boot mode is initialized by sampling the BOOT_MODE[3:0] inputs when the reset is deactivated and are
to be set high or low according to the desired boot source at the time of readout. After these inputs are sampled, their
subsequent state does not affect the contents of the BOOT_MODE internal register.
The exact boot source configuration can be seen in the following table.
Table 5: Boot configuration i.MX 93
Boot source
Boot Core
BOOT_MODE3
BOOT_MODE2
BOOT_MODE1
BOOT_MODE0
Boot from eFuse
A55
0
0
0
0
Serial Downloader (USB1)
0
0
0
1
Boot from eMMC 5.1
(USDHC1, 8-bit))
0
0
1
0
Boot from SD 3.0 card
(USDHC2, 4-bit)
0
0
1
1
Boot from FlexSPI Serial NOR
0
1
0
0
Boot from FlexSPI NAND 2K
(not supported)
0
1
0
1
Boot from eFuse
M33
1
0
0
0
Serial Downloader (USB1)
1
0
0
1
Boot from eMMC 5.1
(USDHC1, 8-bit)
1
0
1
0
Boot from SD 3.0 card
(USDHC2, 4-bit)
1
0
1
1
Boot from FlexSPI Serial NOR
1
1
0
0
Boot from FlexSPI Serial
NAND 2K (not supported)
1
1
0
1
BOOT_MODE3 is used to distinguish between Low Power Boot (LPB - start of the M33 core) and Single Boot (start of the A55
core).
In LPB, only the M33 ROM is running after Power-On Reset (POR); the A55 core is expected to be kicked off by M33 firmware in
some use cases.
In Single Boot, the Cortex-A55 ROM loads both the Cortex-A55 firmware image and the Cortex-M33 firmware image (if exists). If
the container set has the Cortex-M33 firmware image, the Cortex-A55 ROM will read and place it in the Shared RAM (Cortex-M33
TCM). The Cortex-M33 BootROM is not involved in the Single Boot Flow. Once the Cortex-A55 loads the Cortex-M33 firmware
image to the Cortex-M33 TCM, the Cortex-A55 ROM will issue a message that kick off the Cortex-M33 core, and continues the
Cortex-A55 boot process, with Cortex-M33 & Cortex-A55 boot running in parallel.

Preliminary User's Manual l TQMa93xxLA UM 0003 l © 2023, TQ-Systems GmbH Page 14
3.2.2 Memory
3.2.2.1 LPDDR4 SDRAM
The memory interface of the i.MX 93 supports LPDDR4 and LPDDR4X memory (16 bit bus) with a maximum clock rate of 1866
MHz, which meets JEDEC LPDDR4-3733 standard. 1 GByte is the standard configuration, a maximum of 2 Gbyte of LPDDR4
SDRAM is supported.
3.2.2.2 eMMC
An eMMC is provided on the TQMa93xxLA for boot loader, operating system and application software. It is connected to the
i.MX 93 via SD1-interface. A maximum transfer rate of 400 MB/s is supported (HS400 mode). Resets have to be done via software.
i.MX 93
eMMC 5.1
SD1_CLK
SD1_CMD CLK
CMD
SD1_DATA[7:0] DATA[7:0]
RST#
SD1_STROBE STROBE
VCC
VCCQ
1.8 V 3.3 V
NP
1.8 V
Figure 3: Block diagram eMMC
The boot configuration is described in chapter 3.2.1.3
3.2.2.3 QSPI NOR Flash / NAND Flash
QSPI NOR flash can optionally be assembled on the TQMa93xxLA. Because a separation of the signal paths is not possible, these
LGA pads must not be wired when equipped with NOR Flash. With unpopulated NOR Flash the signals of the SD3 interface can
be used outside the module.
The NOR flash signals use a part of the NAND pins of the i.MX 93. All other NAND pins of the i.MX 93 are used from the
TQMa93xxLA for the eMMC as SD1 boot source and for the SD-Card (SD2).
Table 6: QSPI signals
Signal
i.MX 93
TQMa93xxLA
Power group
QSPI_DATA0
T16
V13
1,8 V
QSPI_DATA1
V14
U12
QSPI_DATA2
U14
W13
QSPI_DATA3
T14
W12
QSPI_SCLK
V16
V14
QSPI_SS0#
U16
U13