
erase blocks respectively. The small 4 KB sectors allow for greater flexibility in applications that require data and
parameter storage.
The W25Q32BV supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad out-
put as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (WP), and
I/O3 (/HOLD). SPI clock frequencies of up to 104 MHz are supported, providing equivalent clock rates of 208
MHz (104 MHz x 2) for Dual I/O and 320 MHz (80 MHz x 4) for Quad I/O when using Fast Read Dual/Quad
I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories.
The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to
read a 24-bit address, allowing true XIP (execute in place) operation.
Automotive Audio Bus A2B Transceiver (AD2410)
The Automotive Audio Bus (A2B™) provides a multi-channel, I2S/TDM link over distances of up to 10 meters
between nodes. It embeds bi-directional synchronous data (for example digital audio), clock and synchronization
signals onto a single differential wire pair. A2B supports a direct point-to-point connection and allows multiple, dai-
sy chained nodes at different locations to contribute or consume time division multiplexed channel content. A2B is a
single-master, multiple-slave system where the transceiver chip at the host controller is the master. It generates clock,
synchronization and framing for all slave nodes. The master A2B chip is programmable over a control bus (I2C) for
configuration and read back. An extension of this control bus is embedded in the A2B data stream allowing direct
access of registers and status information on slave transceivers as well as I2C-to-I2C communication over distance.
12 Channel, High Performance, 192kHz, 24-Bit DAC
(ADAU1962A)
The ADAU1962A is a high performance, single-chip digital-to-analog converter (DAC) that provides 12 DACs
with differential or single-ended output using the Analog Devices, Inc., patented multibit sigma-delta (Σ-Δ) archi-
tecture. A serial peripheral interface (SPI)/I2C port is included, allowing a micro-controller to adjust volume and
many other parameters. The ADAU1962A operates from 2.5 V digital and 3.3 V analog supplies. A linear regulator
is included to generate the digital supply voltage from the analog supply voltage.
The ADAU1962A is designed for low EMI. This consideration is apparent in both the system and circuit design
architectures. By using the on-board PLL to derive the internal master clock from an external LRCLK, the
ADAU1962A can eliminate the need for a separate high frequency master clock and can be used with or without a
bit clock. The DACs are designed using the latest Analog Devices continuous time architectures to further minimize
EMI.
Quad ADC with Diagnostics (ADAU1977)
The ADAU1977 incorporates four high performance analog-todigital converters (ADCs) with direct-coupled inputs
capable of 10 V rms. The ADC uses multibit sigma-delta (Σ-Δ) architecture with continuous time front end for low
Automotive Audio Bus A2B Transceiver (AD2410)
ADSP-SC573 EZ-KIT ® Manual 2–7
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