ASRock Industrial SBC-261J Service manual

Jumpers and Headers Setting Guide
SBC-261J
The terms HDMI® and HDMI High-Denition
Multimedia Interface, and the HDMI logo are
trademarks or registered trademarks of HDMI
Licensing LLC in the United States and other
countries.
Revision History
Date Description
August 31, 2023 First Release
Top: Bottom:
12
9
2
5
6
7
8
10
15
16
13
14
17
21
22
18
20
2324
27
25
26
30
28
29
3
11
1
4
19
Industrial
1
DC-IN1
DDR5_A1
1
CPU_FAN1
1
HEATER1
HDLED RESET
PWRBTN
PLED
1
1
1
1
11
1
1
1
11
111
1
1111
COM1 COM2 COM3 COM4
1
1
1
1
1
HDMIDP
USB 3.2 Gen2
Top: USB3_4
Bottom: USB3_3
USB 3.2 Gen2
Top: USB3_2
Bottom: USB3_1
LAN1
LAN2
BLT_VOL1
SATA_PWR1
SATA3_0
BLT_PWR1
BKT_PWR1
PNL_PWR1
BLT_PWM1
BLT_PWM2
BIOS
ROM
1
1
BUZZ2
LVDS1
1
M2_E1M2_M1
SIO_AT1CI1
CLRMOS1CLRMOS2
PANEL1
DACC1
JGPIO1
USB2_6_7
SPEAKER1
JGPIO_SET1
HD_AUDIO1
31
R
SBC-261J
M2_E1
1
BAT1
32
1
34 33
BUZZ1
ESPI11
Pin Signal Name Signal Name Pin
1 LCD_VCC LCD_VCC 2
3 N/A N/A 4
5 N/A N/A 6
7 N/A GND 8
9 EDP_TX1# EDP_TX1 10
11 GND EDP_TX0# 12
13 EDP_TX0 GND 14
15 N/A N/A 16
17 GND EDP_AUXN 18
19 EDP_AUXP GND 20
21 N/A N/A 22
23 GND N/A 24
25 N/A GND 26
27 N/A N/A 28
29 DPLVDD_EN N/A 30
31 N/A GND 32
33 N/A N/A 34
35 GND CON_LBKLT_EN 36
37 CON_LBKLT_CTL LCD_BLT_VCC 38
39 LCD_BLT_VCC LCD_BLT_VCC 40
1 : 4-pin DC-in PWR Connector
(Input +12V) (DC-IN1)
14
2 : CPU FAN Connector (+12V) (CPU_FAN1)
1
4
3 : Heater Header (HEATER1)
1
3
4 : Backlight Volume Control (BLT_VOL1)
1
7
5 : SATA Power Output Connector
(SATA_PWR1)
1
4
6 : SATA3 Connector (SATA3_0)
7
1
8 : Backlight Power Select
(LCD_BLT_VCC) (BKT_PWR1)
1-2 : LCD_BLT_VCC: +5V (Default)
2-3 : LCD_BLT_VCC: +12V
11 : Brightness Control Mode (BLT_PWM1)
1-2 : From eDP PWM to CON_LBKLT_CTL
2-3 : From LVDS PWM to CON_LBKLT_CTL
(Default)
•
Please set to 1-2 when adjusting brightness
by Brightness Control bar under OS.
•
Please set to 2-3 when adjusting brightness
by BLT_VOL1.
7 : Inverter Power Control Wafer (BLT_PWR1)
1
Pin Signal Name
1 GND
2 GND
3 BL CTL
4 BL EN
5 LCD_BLT_VCC
6 LCD_BLT_VCC
6
9 : Panel Power Select
(LCD_VCC) (PNL_PWR1)
1-2 : +3V (Default)
2-3 : +5V
3-4 : +5V
4-5 : +12V
1 3
1 5
10 : LVDS Panel Connector (LVDS1)
Pin Signal Name Signal Name Pin
1 LCD_VCC LCD_VCC 2
3+3.3V N/A 4
5 N/A LVDS_A_DATA0# 6
7 LVDS_A_DATA0 GND 8
9 LVDS_A_DATA1# LVDS_A_DATA1 10
11 GND LVDS_A_DATA2# 12
13 LVDS_A_DATA2 GND 14
15 LVDS_A_DATA3# LVDS_A_DATA3 16
17 GND LVDS_A_CLK# 18
19 LVDS_A_CLK GND 20
21 LVDS_B_DATA0# LVDS_B_DATA0 22
23 GND LVDS_B_D
ATA1# 24
25 LVDS_B_DATA1 GND 26
27 LVDS_B_DATA2# LVDS_B_DATA2 28
29 DPLVDD_EN LVDS_B_DATA3# 30
31 LVDS_B_DATA3 NC 32
33 LVDS_B_CLK# LVDS_B_CLK 34
35 GND CON_LBKLT_EN 36
37 CON_LBKLT_CTL LCD_BLT_VCC 38
39 LCD_BLT_VCC LCD_BLT_VCC 40
1
39 40
2
1
2
39
40
• eDP by pass mode
pin denition:
1
3
12 : CON_LBKLT_CTL Voltage Level
(BLT_PWM2)
1-2 : 3V Level (Default)
2-3 : 5V Level
1
3
Pin Signal Name Signal Name Pin
1 GND +3.3V 2
3 GND +3.3V 4
5 NA NA 6
7 NA NA 8
9 GND SATA_LED 10
11 NA +3.3V 12
13 NA +3.3V 14
15 GND +3.3V 16
17 NA +3.3V 18
19 NA NA 20
21 GND NA 22
23 NA NA 24
25 NA NA 26
27 GND NA 28
29 NA NA 30
31 NA NA 32
33 GND NA 34
35 NA NA 36
37 NA NA 38
39 GND NA 40
41 PERn0/SATA-B+ NA 42
43 PERp0/SATA-B- NA 44
45 GND NA 46
47 PETn0/SATA-A- NA 48
49 PETp0/SATA-A+ PERST# 50
51 GND CLKREQ# 52
53 PEFCLKn NA 54
55 PEFCLKp NA 56
57 GND NA 58
67 NA NA 68
69 PEDET +3.3V 70
71 GND +3.3V 72
73 GND +3.3V 74
75 GND
14 : M.2 Key-M Socket (M2_M1)
13 : Buzzer Header (BUZZ2)
1 2
Pin Signal Name
1 Heater PWR
2 GND
3 NCT
Pin Signal Name
1 GND
2 +12V
3 CPU_FAN_SPEED
4 FAN_SPEED_CONTROL
Pin Signal Name
1 GND
2 DC Input
3 DC Input
4 GND
Pin Signal Name
1 +5V
2 GND
3 GND
4 +12V
Pin Signal Name
1 GPP_E7
2 GPP_E3
3 PWRDN
4 BRIGHTNESS_UP
5 BRIGHTNESS_DW
6 GND
7 GND
Pin Signal Name
1 GND
2 SATA-A+
3 SATA-A-
4 GND
5 SATA-B-
6 SATA-B+
7 GND
Pin Signal Name
1 BUZZ+
2 BUZZ-

Installation of ROM Socket
• Do not apply force to the actuator cover after IC inserted.
• Do not apply force to actuator cover when it is opening over 120
degrees. Otherwise, the actuator cover may be broken.
• The yellow dot (Pin1) on the ROM must be installed at Pin1 position
of the socket (white arrow area).
• Make sure the white dot on the ROM is installed outwards of the
socket.
• For further details of how to install ROM, please refer to ASRI website.
Warning: If the installation does not follow as the picture, then it
may cause severe damage to chipset & MB.
Top: Bottom:
12
9
2
5
6
7
8
10
15
16
13
14
17
21
22
18
20
2324
27
25
26
30
28
29
3
11
1
4
19
Industrial
1
DC-IN1
DDR5_A1
1
CPU_FAN1
1
HEATER1
HDLED RESET
PWRBTN
PLED
1
1
1
1
11
1
1
1
11
111
1
1111
COM1 COM2 COM3 COM4
1
1
1
1
1
HDMIDP
USB 3.2 Gen2
Top: USB3_4
Bottom: USB3_3
USB 3.2 Gen2
Top: USB3_2
Bottom: USB3_1
LAN1
LAN2
BLT_ VOL1
SATA_PWR1
SATA3_0
BLT_PWR1
BKT_PWR1
PNL_PWR1
BLT_PWM1
BLT_PWM2
BIOS
ROM
1
1
BUZZ2
LVDS1
1
M2_E1M2_M1
SIO_AT1CI1
CLRMOS1CLRMOS2
PANEL1
DACC1
JGPIO1
USB2_6_7
SPEAKER1
JGPIO_SET1
HD_AUDIO1
31
R
SBC-261J
M2_E1
1
BAT1
32
1
34 33
BUZZ1
ESPI11
Pin RS232 RS422 RS485
1 DCD TX- RTX-
2 RXD TX+ RTX+
3 TXD RX+ N/A
4 DTR RX- N/A
5 GND GND GND
6 DSR N/A N/A
7RTS N/A N/A
8 CTS N/A N/A
9 N/A N/A N/A
* This motherboard supports RS232/422/485 on COM1 port. Please refer to the
table below for the pin denition. In addition, COM1 port (RS232/422/485) can
be adjusted in BIOS setup utility > Advanced Screen > Super IO Conguration.
You may refer to our user manual for details.
COM1 Port Pin Denition
16 : Chassis Intrusion Header (CI1)
Open : Normal (Default)
Short : Active Case Open
1
2
17 : ATX/AT Mode Jumper (SIO_AT1)
Open : ATX Mode (Default)
Short : AT Mode
1
2
18 : Clear CMOS Headers
CLRMOS1 :
1-2 : Normal (Default)
2-3 : Clear CMOS
CLRMOS2 :
Open : Normal (Default)
Short : Auto Clear CMOS
when AC Power On
1 3
1 2
19 : System Panel Header (PANEL1)
1
2
9
10
20 : DACC1
Open : No ACC
Short : ACC (Default)
• Auto clear CMOS when system boot improperly.
1 2
21 : COM Port Headers
COM1 (RS232/422/485)*
COM2~COM4 (RS232)
1
2
9
10
22 : Digital Input/Output Pin Header (JGPIO1)
1
2
9
10
23 : USB 2.0 Connectors (USB2_6_7)
1
2
9
10
24 : 2W Audio AMP Output Wafer (SPEAKER1)
1 4
25 : GPIO Default Setting (JGPIO_SET1)
1-2 : Pull-High (Default)
2-3 : Pull-Low 1 3
27 : Front Panel Audio Header (HD_AUDIO1)
Pin Signal Name Signal Name Pin
1 MIC1_L GND 2
3 MIC1_R 4
5 OUT2_R MIC1_RET 6
7J_SENSE 8
9 OUT2_L OUT_RET 10
Pin Signal Name Signal Name Pin
1 USB_PWR USB_PWR 2
3 P- P- 4
5 P+ P+ 6
7 GND GND 8
9 DUMMY 10
Pin Signal Name Signal Name Pin
1 GPP_A14 GPP_B15 2
3 GPP_A15 GPP_E1 4
5 GPP_A16 GPP_E2 6
7 GPP_A17 GPP_E13 8
9 +3V GND 10
Pin Signal Name Signal Name Pin
1 DDCD#1 RRXD1 2
3 TTXD1 DDTR#1 4
5 GND DDSR#1 6
7 RRTS#1 CCTS#1 8
9 RRI#1 10
Pin Signal Name Signal Name Pin
1 HDLED+ PLED+ 2
3 HDLED- PLED- 4
5 GND PWRBTN# 6
7 RESET# GND 8
9 DUMMY 10
1
9
2
10
28 : RJ45 1G LAN Port (LAN2)
29 : RJ45 1G LAN Port (LAN1)
30 : USB 3.2 Gen2 Ports (USB3_1_2)
31 : USB 3.2 Gen2 Ports (USB3_3_4)
32 : Top : DisplayPort (DP)
Bottom : HDMI Port (HDMI)
Backside :
33 : ESPI Connector (ESPI1)
34 : Buzzer (BUZZ1)
15 : M.2 Key-E Socket (M2_E1)
Pin Signal Name Signal Name Pin
1 GND +3.3V 2
3 USB_D+ +3.3V 4
5 USB_D- NA 6
7 GND NA 8
9 CNV_WGR_D1- CNV_RF_RESET 10
11 CNV_WGR_D1+ NA 12
13 GND MODEM_
CLKREQ 14
15 CNV_WGR_D0- NA 16
17 CNV_WGR_D0+ GND 18
19 GND NA 20
21 CNV_WGR_CLK- CNV_BRI_RSP 22
23 CNV_WGR_CLK+
CNV_BGI_DT 32
33 GND CNV_RGI_RSP 34
35 PETp CNV_BRI_DT 36
37 PETn NA 38
39 GND NA 40
41 PERp NA 42
43 PERn NA 44
45 GND NA 46
47 PEFCLKp NA 48
49 PEFCLKn SUSCLK 50
51 GND PERST0# 52
53 CLKREQ# W_DISABLE1# 54
55 NA W_DISABLE2# 56
57 GND SMB_DATA 58
59 CNV_WT_D1- SMB_CLK 60
61 CNV_WT_D1+ NA 62
63 GND NA 64
65 CNV_WT_D0- NA 66
67 CNV_WT_D0+ NA 68
69 GND NA 70
71 CNV_WT_CLK- +3.3V 72
73 CNV_WT_CLK+ +3.3V 74
75 GND
Pin Signal Name
1SPK L-
2 SPK L+
3 SPK R+
4 SPK R-
Pin Signal Name
1 GND
2 C_ESPI_CLK
3 GND
4 C_ESPI_CS#
5 DEBUG_RESET
6 GND
7 +3V
8 GND
9 SMB_CLK_MAIN
10 SMB_DATA_MAIN
11 C_ESPI_IO0
12 C_ESPI_IO1
13 C_ESPI_IO2
14 C_ESPI_IO3
15 GND
16 +3VSB
17 N/A
18 N/A
19 C_ESPI_ALERT#
20 GND
20 1
26 : Battery Connector (BAT1)
Pin Signal Name
1 +BAT
2 GND
BAT1
2 1