AVerMedia
®
Technologies, Inc. Product Guide
8
GPIO Expand J14) Pin Descriptions
Wafer type : PI REX Tech_ 212-92-20GBEL
Pin
Signal Name Device Directly
Connected to Signal
Associated Jetson
Module Pin Name Usage/Description Type/
Direction
GPI Max
Drive or Power
Pin Current
Capability
Notes
1 +3V3_SYSTEM TPS51220 3.3V Supply
- Main 3.3V Supply Power 1A 1
2 +5V_SYSTEM TPS51220 5V Supply - Main 5.0V Supply Power 1A 1
3 I2C_ P0_DATA_3V3 2SK3019 I2C_ P0_DATA eneral I2C #0 Data (3.3V) Bidir/OD 3.3mA 2
4 +5V_SYSTEM TPS51220 5V Supply - Main 5.0V Supply Power 1A 1
5 I2C_ P0_CLK_3V3 2SK3019 I2C_ P0_CLK eneral I2C #0 Clock (3.3V) Bidir/OD 3.3mA 2
6 ND - - round round -
7 I2S_3V3_MCK TXB0108 AUDIO_MCLK Audio Master Clock (1.8/3.3V) Bidir 20uA
3
8 UART0_TX_3V3 TXB0108 UART0_TX UART #0 Transmit Output 20uA
3
9 ND - - round round -
10 UART0_RX_3V3 TXB0108 UART0_RX UART #0 Receive Input 20uA
11 UART0_RTS_3V3 TXB0108 UART0_RTS# UART #0 Request to Send Output 20uA
3
12 I2S0_3V3_BCLK TXB0108
I2S0_SCLK Audio I2S #0 Clock Bidir 20uA
3
13 AUDIO_CODEC_3V3_IRQ TXB0108
PIO_PE6 Audio Codec Interrupt Bidir 20uA
3
14 ND - - round round -
15 PIO_EXP_P17_3V3 PCA9539A - From PIO Expander (P17) Bidir -10mA Hi /
25mA Lo
5
16 AO_DMIC_IN_3V3_DAT TXB0108 AO_DMIC_IN_DAT Digital Mic Input Input 20uA 8
17 +3V3_SYSTEM TPS51220 3.3V Supply
- Main 3.3V Supply Power 1A 1
18 MDM_WAKE_3V3_AP TXB0108
PIO16_MDM_WAK
E_AP
Modem Wake AP PIO Input 20uA
3,8
19 SPI1_3V3_MOSI TXB0108
SPI1_MOSI SPI #1 Master Out/Slave In
(1.8/3.3V)
Bidir 20uA
3
20 ND - - round round -
21 SPI1_3V3_MISO TXB0108 SPI1_MISO SPI #1 Master In/Slave Out
(1.8/3.3V)
Bidir 20uA 3
22 PIO_EXP_P16_3V3 PCA9539A - From PIO Expander (P16) Bidir -10mA Hi /
25mA Lo
5
23 SPI1_3V3_CLK TXB0108 SPI1_CLK SPI #1 Shift Clock (1.8/3.3V) Bidir 20uA
3
24 SPI1_3V3_CS0 TXB0108 SPI1_CS0# SPI #1 Chip Select #0 (1.8/3.3V)
Bidir 20uA
3
25 ND - - round round -
26 SPI1_3V3_CS1 TXB0108 SPI1_CS1# SPI #1 Chip Select #1 (1.8/3.3V)
Bidir 20uA 3
27 I2C_ P1_DATA_3V3M Tegra I2C_ P1_DAT eneral I2C #1 Data (3.3V) Bidir/OD 6
28 I2C_ P1_CLK_3V3M Tegra I2C_ P1_CLK eneral I2C #1 Clock (3.3V) Bidir/OD 6
29 AUDIO_CODEC_3V3_RST TXB0108 PIO19_AUD_RST Audio Reset (1.8/3.3V) Output 20uA 3,8
30 ND - - round round -
31 MOTION_3V3_INT TXB0108 PIO9_MOTION_INT
Motion Interrupt (3.3V) Input/OD 20uA
3
32 AO_DMIC_IN_3V3_CLK TXB0108 AO_DMIC_IN_CLK Digital Mic Clock Output 20uA
3,8
33 AP_WAKE_3V3_BT TXB0108 PIO11_AP_WAKE_
BT
AP Wake Bt PIO Bidir 20uA
3,8
34 ND - - round round -
35 I2S0_3V3_LRCK TXB0108 I2S0_LRCLK AUDIO I2S #0 Left/Right Clock
Bidir 20uA
3
36 UART0_CTS_3V3 TXB0108 UART0_CTS# UART #0 Clear to Send Input 20uA
37 ALS_PROX_3V3_INT TXB0108 PIO8_ALS_PROX_I
NT
(3.3V) Output/OD 20uA
3
38 I2S0_3V3_DIN TXB0108 I2S0_SDIN Audio I2S #0 Data in Input 20uA
3,8
39 ND - - round round -
40 I2S0_3V3_DOUT TXB0108 I2S0_SDOUT Audio I2S #0 Data Out Output 20uA 3,8
Notes:
1. This is current capability per power pin.
2. These pins are connected to Tegra signals through either an I2C or FET level shifter.
3. Due to the design of these level translators the output drivers are very weak so they can be overdriven by another connected
device output for bidirectional support.
4. The buffer is powered at 3.3V on the Expansion Header side. (Not use)
5. These signals come from the GPIO expanders.
6. These pins are directly connected to Tegra. The max drive that meets full Data Sheet VOL/VOH is 1mA. 2mA drive is supported at
restricted VOL/VOH levels. See the associated OEM Product Design Guide Pads section for details.
7. In the Type/Dir column Output is to Expansion Module. Input is from Expansion Module. Bidir is for Bidirectional signals.
8. The direction indicated matches that indicated in the reference design schematics. These signals can be bidirectional.
