Epson S1R72U16 User manual

Rev.1.10
S1R72U16
Evaluation Board Manual

NOTICE
No part of this material may be reproduced or duplicated in any form or by any means without the written
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material
or due to its application or use in any product or circuit and, further, there is no representation that this material is
applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any
intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that
anything made in accordance with this material will be free from any patent or copyright infringement of a third
party. This material or portions thereof may contain technology or the subject relating to strategic products
under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license
from the Ministry of Economy, Trade and Industry or other approval from another government agency.
All other product names mentioned herein are trademarks and/or registered trademarks of their respective
companies.
©SEIKO EPSON CORPORATION 2007, All rights reserved.

Scope
This document applies to the “S1R72U16” IDE device - USB 2.0 host bridge LSI.
Notice
Before using the S1R72U16, carefully read the sections “Special use case for S1R72U16” and
“S1R72U16 Errata.”

S1R72U16 Evaluation Board Manual (Rev1.10) EPSON i
Table of Contents
1. Overview............................................................................................................................................ 1
2. Connector Connections ................................................................................................................... 2
3. Switches ............................................................................................................................................ 3
4. LEDs................................................................................................................................................... 4
5. Jumper Pins ...................................................................................................................................... 5
6. Product Code .................................................................................................................................... 6
7. Appendix............................................................................................................................................ 7
7.1 Connection Example 1 (IDE I/F Connection Example) ............................................................... 7
7.2 Connection Example 2 (CPUIF Connection Example) ............................................................... 8
7.3 Connection Example 3 (CPUIF System Connection Example)................................................... 9
7.4 JP and SW Settings.................................................................................................................. 10
7.5 Circuit Diagram......................................................................................................................... 11
7.6 Component Chart ..................................................................................................................... 11
7.7 Dimensional Diagram ............................................................................................................... 11

1. Overview
S1R72U16 Evaluation Board Manual (Rev1.10) EPSON 1
1. Overview
This board is an evaluation board for the S1R72U16. This manual describes how to use the board.

2. Connector Connections
2 EPSON S1R72U16 Evaluation Board Manual (Rev1.10)
2. Connector Connections
The connectors provided on this board are shown below.
Connector No. Usage
CN1 Connects to main CPU system
CN2 Connects to PORT00 to PORT02 (not included)
CN3 Monitors PORT10 to PORT17 (not included)
CN4 For S1R72U16 maintenance (not included)
CN5 USB connecto
r
CN6 Power supply connecto
r
CN7 RS232 connecto
r
CN1
Use Connector CN1 to connect the board to the main CPU system.
Pin assignment conforms to the IDE bus when connecting in IDE mode, enabling use of a
commercially-available IDE bus 40-pin cable. The cable should support at least ATA100.
The same cable may be used when connecting in CPU mode. Check the pin assignment when connecting.
In either case, avoid using long cables in which the individual signal wires are not guarded by GND, since
degraded signal quality or incorrect operations may result.
CN6
The power supply to the board should be connected to connector CN6 as shown below. Note that the power
should be turned on only after connecting to the main CPU and making the settings described further below.
1pin +5V
2pin 0V
3pin N.C.
4pin N.C.
CN7
Use Connector CN7 for RS-232 connections to a PC. Commercially-available RS-232 cross cables may be
used.

3. Switches
S1R72U16 Evaluation Board Manual (Rev1.10) EPSON 3
3. Switches
Set the S1R72U16 operating mode using the DIP switches (SW1) provided on the board.
SW1 (Factory default settings shown shaded)
Function selection Remarks
ON ATA mode PORT00 pin = High
OFF ATAPI mode PORT00 pin = Low (Pull Down)
ON Two-device mode PORT01 pin = High
OFF One-device mode PORT01 pin = Low (Pull Down)
ON CPU mode PORT02 pin = High
OFF IDE mode PORT02 pin = Low (Pull Down)
ON Not used Not used
OFF Not used Not used
No.4
Command system setting
Connected device number
settin
g
Interface setting
Not used
Switch
No.1
No.2
No.3
On/Off is as shown in the diagram below.
O N
1 2 3 4
ON
OFF
Note:
The pins of CN2 (not mounted) are connected to PORT00 to PORT02. When using these pins, set the
corresponding position on SW1 to Off, and set the input signal level to CN2 to the same as for IOVDD.
SW2 is for resetting the S1R7U16 chip.

4. LEDs
4 EPSON S1R72U16 Evaluation Board Manual (Rev1.10)
4. LEDs
The LEDs provided on the board allow the output status of the S1R72U16’s PORT10 to PORT17 to be
checked. The LEDs illuminate when the PORT output is High (1). The LEDs and PORTs correspond as
shown below.
LED No. S1R72U16 Description Remarks (see note below)
Storage device connection/disconnection
detection interrupt CN3/1pin
1: -, 0: Connection/disconnection detected
Storage device 0 detection CN3/2pin
1: -, 0: Detected
Storage device 1 detection CN3/3pin
1: -, 0: Detected
PLL oscillation start CN3/4pin
1: Oscillation started, 0: No oscillation
Unsupported Device CN3/5pin
1: Error, 0: -
Too Many Devices CN3/6pin
1: Error, 0: -
Too Many Hubs CN3/7pin
1: Error, 0: -
VBUS Over Current CN3/8pin
1: Error, 0: -
LED7 PORT16
(ComplianceErr2)
LED8 PORT17
(ComplianceErr3)
LED5 PORT14
(ComplianceErr0)
LED6 PORT15
(ComplianceErr1)
LED3 PORT12
(XCD1)
LED4 PORT13
(PLL_Locked)
LED1 PORT10
(XChgInt)
LED2 PORT11
(XCD0)
Note:
The pins of CN3 (not mounted) are connected directly to each PORT of the S1R72U16 as shown in the table
above. These can be probed to monitor the signals for PORT10 to PORT 17. The output level will be the
level supplied to the IOVDD pin.

5. Jumper Pins
S1R72U16 Evaluation Board Manual (Rev1.10) EPSON 5
5. Jumper Pins
The jumpers on the board are set as shown below. Factory default settings are shown shaded.
JP1 must be used as Short (CSEL = Low) when using the LSI in two-device mode
JP3 should be used as 1-2 Short when using the interface settings in IDE mode.
JP4 to JP10 are soldered jumpers and normally do not need to be changed.
No. Details
Short CSEL = Low ( IDE Master )
Open CSEL = High ( IDE Slave )
1-2: IOVDD = 3.3V
2-3: IOVDD = 1.8V
Short For 12MHz
Open For 24MHz
Short Normal
Open Not permited
1-2: MAX8586-ENRESET pin = High
1-3: MAX8586-ENRESET pin = Low
1-2: Located at MAX8586-OUT pin
1-3: Located at MAX8586-IN pin
Setting (Factory default settings shown shaded)
JP1
JP3
JP4
JP5-JP8
JP9
JP10
“CSEL” level selection
Power supply for interface with main CPU
Clock selection
Current consumption measurement jumper
(normally used shorted)
MAX8586 automatic restart function selection
(Refer to Maxim data sheet for details)
USB host VBUS output 122 [uF] layout selection
JP2

6. Product Code
6 EPSON S1R72U16 Evaluation Board Manual (Rev1.10)
6. Product Code
The product code for the board is as follows:
S5U1R72U16F0100

7. Appendix
S1R72U16 Evaluation Board Manual (Rev1.10) EPSON 7
7. Appendix
7.1 Connection Example 1 (IDE I/F Connection Example)
S1R72U16MainCPU
CSEL_T
HCS_T[1:0]
HDD_T[15:0]
XHDASP_T
HDA_T[2:0]
S1R72U16 Evaluation Board
XHDMACK_T
HDMARQ_T
HINTRQ_T
XHIOR_T
HIORDY_T
XHIOW_T
XHPDIAG_T
XHRESET_T
82Ω
CSEL
CS[1:0]-
DD[15:0]
DASP-
DA[2:0]
DMACK-
DMARQ
INTRQ
DIOR-
HIORDY
DIOW-
PDIAG-
RESET-
10kΩ
33Ω
10kΩ
1.0kO
SystemBoard
CSEL
CS[1:0]-
DD[15:0]
DASP-
DA[2:0]
DMACK-
DMARQ
INTRQ
DIOR-
HIORDY
DIOW-
PDIAG-
RESET-
CS[1:0]-
DD[15:0]
DASP-
DA[2:0]
DMACK-
DMARQ
INTRQ
DIOR-
HIORDY
DIOW-
PDIAG-
RESET-
82Ω
82Ω
22Ω
22Ω
22Ω
82Ω
82Ω
82Ω33Ω
22Ω
82Ω
22Ω
82Ω
10kO
82Ω
5.6kΩ
22Ω
33Ω
33Ω
33Ω
5.6kΩ
DD7
only
Cable
10kΩ
CSEL_TConnect to connector if using with cable select.
The cables and connectors described here should be replaced by circuit board wiring if the S1R72U16 is mounted on
the system board (board designed by user).
10kΩ
1.0kΩ

7. Appendix
8 EPSON S1R72U16 Evaluation Board Manual (Rev1.10)
7.2 Connection Example 2 (CPUIF Connection Example)
S1R72U16MainCPU
CSEL
XCS, CA[3]
CD[15:0]
-
CA[2:0]
S1R72U16 Evaluation Board
XDACK
XDREQ
XINT
XRD
-
XWR
-
XHRESET
82Ω
CSEL
CS[1:0]-
DD[15:0]
DASP-
DA[2:0]
DMACK-
DMARQ
INTRQ
DIOR-
HIORDY
DIOW-
PDIAG-
RESET-
10kΩ
33Ω
10kΩ
SystemBoard
open
/CS, A[4]
D[15:0]
open
A[3:1]
/ACK
/REQ
/INT
/RD
open
/WR
open
GPIO
/CS, A[4]
D[15:0]
A[3:1]
/ACK
/REQ
/INT
/RD
/WR
GPIO
82Ω
82Ω
22Ω
22Ω
22Ω
82Ω
82Ω
82Ω
Cable
10kΩ
/CS, A[4]
D[15:0]
A[3:1]
/ACK
/REQ
/INT
/RD
/WR
GPIO
S1R72U16 addresses are word addresses. The addresses should be offset as necessary for connection.
Add pull-up/pull-down resistors as necessary.
S1R72U16 addresses are word addresses. The addresses should be offset as necessary for connection.
Connect to negative logic ACK signal when using main CPU DMAC.
Connect to negative logic REQ signal when using main CPU DMAC.
Connect to interrupt signal.
Connect to negative logic read strobe signal.
Connect to negative logic write strobe signal.
Bus can be reset by connecting to regular output port.
Bus can be reset by connecting to general porpuse output port.

7. Appendix
S1R72U16 Evaluation Board Manual (Rev1.10) EPSON 9
7.3 Connection Example 3 (CPUIF System Connection Example)
S1R72U16MainCPU
CSEL_T
XCS, CA[3]
CD[15:0]
-（XHDASP_T）
CA[2:0]
XDACK
XDREQ
XINT
XRD
-（HIORDY_T）
XWR
-（XHPDIAG_T）
XHRESET
/CS, A[4]
D[15:0]
A[3:1]
/ACK
/REQ
/INT
/RD
/WR
GPIO
SystemBoard
/CS, A[4]
D[15:0]
A[3:1]
/ACK
/REQ
/INT
/RD
/WR
GPIO
-（XHDASP_T）
-（HIORDY_T）
-（XHPDIAG_T）
S1R72U16 addresses are word addresses. The addresses should be offset as necessary for connection.
Add pull-up/pull-down resistors as necessary.
S1R72U16 addresses are word addresses. The addresses should be offset as necessary for connection.
Connect to negative logic ACK signal when using main CPU DMAC.
Connect to negative logic REQ signal when using main CPU DMAC.
Connect to interrupt signal.
Connect to negative logic read strobe signal.
Connect to negative logic write strobe signal.
Bus can be reset by connecting to regular output port.
Pulled up inside LSI. Set to open.
Pulled up inside LSI. Set to open.
Pulled up inside LSI. Set to open.
CSELConnection example when used as master.

7. Appendix
10 EPSON S1R72U16 Evaluation Board Manual (Rev1.10)
7.4 JP and SW Settings
The factory default settings are shown below.
CN1
JP1
12
JP8
JP7
JP6
JP5
+3.3V
HV DD
LVDD
+1.8V
CN7
JP3
13
CN5
CN6
14
JP4
CLKSEL
OUT
IN
JP10
GND
JP9
+5.0V
EP
SW1
O
N
1
2
3
4
SW2
RESET
SEIKO EPSON CORP.
S1R72U16_EVA_QFP BOARD
1-2:IOVDD+3.3V
2-3:IOVDD+1.8V
IOVDDSELECT

7. Appendix
S1R72U16 Evaluation Board Manual (Rev1.10) EPSON 11
7.5 Circuit Diagram
Refer to the diagram included at the end of this document.
7.6 Component Chart
Refer to the chart included at the end of this document.
7.7 Dimensional Diagram
CN1
JP1
12
JP8
JP7
JP6
JP5
+3.3V
HV DD
LVDD
+1.8V
CN7
JP3
13
CN5
CN6
14
JP4
CLKSEL
OUT
IN
JP10
GND
JP9
+5.0V
EP
SW1
O
N
1
2
3
4
SW2
RESET
SEIKO EPSON CORP.
S1R72U16_EVA_QFP BOARD
1-2:IOVDD+3.3V
2-3:IOVDD+1.8V
IOVDDSELECT
4.00
80.00
4.00
80.00
4.004.00

Revision History
Revision History
Revision details
Date Rev. Page Type Details
06/06/2007 1.00 All New Newly established
10/15/2007 1.10 Scope Add Added “notice.”

S1R72U16 QFP EVA BOARD RoHS Parts List
Attention： A red letter of 'Reference' is nonimplement.
PartName Quantity Maker Value Rating Tolerance Reference
GRM188R11H104JA01 12 Murat
a
0.1u 50
V
5% C1,C2,C3,C4,C5,C12
,C13,
C19,C20,C21,C23,
C27
GRM1882C1H150JZ01 2 Murat
a
15p 50
V
5% C14,C15
EMVA160ADA220MD55
G
1 NIPPON CHEMI-CON 22u 16
V
20% C22
GRM188F11A105ZA01 11 Murat
a
1u 10
V
-400 C6,C7,C8,C9,C10,
C11,C16,C17,C18,
C24,C25
EEEV1VA101X
P
1 Panasoni
c
100u 35
V
20% C26
HIF3FC-40PA-2.54DSA(86
)
1 HIROSE CN1
WL-8-8 1 MAC8 CN3
WL-8-4 2 MAC8 CN2,CN
4
DUSB-ARA42-T11A-F
A
1 DDK CN5
171825-
4
1
A
MP CN6
17LE-23090-27(D3BB)-F
A
1 DDK CN7
FA-128(24MHz
)
1 EPSON TOYOCOM 24MH
z
CL=10p
F
±50ppm CR1
1SS35
5
1 ROHM D1
HRW0202B 1 RENESAS DM1
M51957BF
P
1 RENESAS IC1
S1R72U16F14E10
0
1 EPSON IC2
MAX8586ETA
+
1 Maxi
m
IC3
ST3232CD 1 STMicro IC4
S1F78B20M18000
R
1 EPSON IC5
S1F78B20M33000
R
1 EPSON IC6
XJ8C-0211 1 OMRON JP1
XJ8D-0311 1 OMRON JP3
JP-2-L 5 No_make
r
JP4,JP5,JP6,JP7,
JP8
JP-3-L 2 No_make
r
JP9,JP10
DLW21SN900SQ2L 1 Murat
a
90 L1
BLM21PG600SN1 2 Murat
a
60 L2,L
3
SML-310MTT86 8 ROHM LED1,LED2,LED3,
LED4,LED5,LED6,
LED7,LED8
UMH2N 4 ROHM QM1,QM2,QM3,QM
4
MCR03EZHJ221 8 ROHM 220 1/16W 5% R1,R2,R3,R4,R40,
R41,R42,R4
3
MCR03EZHJ000 7 ROHM 0 1/16W 5% R6,R7,R8,R72,R73,
R75,R78
MCR03EZHJ330 17 ROHM 33 1/16W 5% R10,R11,R12,R13,
R14,R15,R16,R17,
R18,R19,R20,R21,
R22,R23,R24,R25,
R70
RR0816Q-220-D 3 SSM 22 1/16W 0.50% R26,R29,R31
MCR03EZHJ820 9 ROHM 82 1/16W 5% R9,R27,R28,R30,R3
2
,R33,R34,R35,R3
6
MCR03EZHJ104 22 ROHM 100
k
1/16W 5% R39,R45,R46,R47,
R48,R49,R50,R51
,
R52,R53,R54,R55
,
R56,R57,R58,R59
,
R60,R61,R6
2
,R67,
R71,R77
MCR03EZHJ103 7 ROHM 10
k
1/16W 5% R37,R38,R44,R63,
R64,R65,R6
9
MCR03EZHJ471 1 ROHM 470 1/16W 5% R66
RR0816P-622-
D
1 SSM 6.2
k
1/16W 0.50% R68
MCR03EZHJ393 1 ROHM 39
k
1/16W 5% R74
CHS-04MB 1 COPAL SW1
SKHHAJ 1
A
LPS SW2
LC-33-S-Blac
k
4 MAC8 TP2,TP3,TP4,TP5
LC-33-S-Yello
w
3 MAC8 TP1,TP14,TP15
ROUND_PATTERN 5 No_make
r
TP16,TP19,TP20,
TP21,TP22
LC-33-S-Re
d
1 MAC8 TP17
A
VRL161A6R8GB
A
2 TDK ZD1,ZD2
RSB6.8S 1 ROHM ZD3
XJ8A-0211 2 OMRON JP1, JP3

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Telex: 65542 EPSCO HX
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14F, No. 7, Song Ren Road,
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SEIKO EPSON CORPORATION
KOREA OFFICE
50F, KLI 63 Bldg., 60 Yoido-dong
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Phone: [phone] FAX: [phone]
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2F, Grand B/D, 457-4 Songjeong-dong,
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SEIKO EPSON CORPORATION
SEMICONDUCTOR OPERATIONS DIVISION
IC Sales Dept.
IC International Sales Group
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: [phone] FAX: [phone]
Document Code: 411137301
First Issue July 2007
Printed November 2007 in JAPAN ○
C