Freescale Semiconductor TWR-K60N512 User manual

Freescale Semiconductor Inc.
TWR-K60N512 Tower Module
User's Manual
Rev. 1.0
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TWR-K60N512 Tower Module User's Manual Page 2 of 17
Table of Contents
1TWR-K60N512 and TWR-K60N512-KIT Overview .....................................................................4
1.1 Contents..................................................................................................................................................................................4
1.2 Features..................................................................................................................................................................................5
1.3 Getting Started.....................................................................................................................................................................6
1.4 Reference Documents.......................................................................................................................................................6
2Hardware Description ...........................................................................................................................6
2.1 K60N512 Microcontroller...............................................................................................................................................7
2.2 Clocking ..................................................................................................................................................................................8
2.3 System Power.......................................................................................................................................................................8
2.3.1 RTC VBAT ..............................................................................................................................................................................................8
2.4 Debug Interface ...................................................................................................................................................................9
2.4.1 OSJTAG....................................................................................................................................................................................................9
2.4.2 Cortex Debug+ETM Connector.....................................................................................................................................................9
2.5 Infrared Port......................................................................................................................................................................10
2.6 Accelerometer...................................................................................................................................................................10
2.7 Potentiometer, Pushbuttons, LEDs ..........................................................................................................................10
2.8 General Purpose Tower Plug-in (TWRPI) Socket...............................................................................................10
2.9 Touch Interface.................................................................................................................................................................11
2.10 Ethernet ............................................................................................................................................................................12
2.11 USB......................................................................................................................................................................................13
2.12 Secure Digital Card Slot..............................................................................................................................................13
2.13 External Bus Interface –FlexBus............................................................................................................................13
3Jumper Table..........................................................................................................................................13
4Input/Output Connectors and Pin Usage Table.........................................................................14
5Tower Elevator Connections ............................................................................................................15
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List of Figures
Figure 1. Freescale Tower System Overview .............................................................................................. 4
Figure 2. Callouts on front side of the TWR-K60N512................................................................................ 5
Figure 3. Callouts on back side of the TWR-K60N512 ................................................................................ 6
Figure 4. TWR-K60N512 Block Diagram...................................................................................................... 7
Figure 5. Infrared Port Implementation ................................................................................................... 10
List of Tables
Table 1. Cortex Debug+ETM Connector Pinout.......................................................................................... 9
Table 2. General Purpose TWRPI socket pinout ....................................................................................... 11
Table 3. Touch TWRPI socket pinout ........................................................................................................ 12
Table 4. Ethernet operation jumper settings ........................................................................................... 12
Table 5. TWR-K60N512 Jumper Table ...................................................................................................... 13
Table 6. I/O Connectors and Pin Usage Table........................................................................................... 14
Table 7. TWR-K60N512 Primary Connector Pinout .................................................................................. 16
Revision History
Revision
Date
Changes
1.0
Nov 9, 2010
Initial Release for PWA 700-26548 Rev A
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1TWR-K60N512 and TWR-K60N512-KIT Overview
The TWR-K60N512 is a Tower Controller Module compatible with the Freescale Tower System. It can
function as a stand-alone, low-cost platform for the evaluation of the Kinetis K10, K20 and K60 family
of microcontroller (MCU) devices. The TWR-K60N512 features the Kinetis K60 low-power
microcontroller based on the ARM® Cortex™-M4 architecture with USB 2.0 full-speed OTG controller
and 10/100 Mbps Ethernet MAC.
The TWR-K60N512 is available as a stand-alone product or as a kit (TWR-K60N512-KIT) with the Tower
Elevator Modules (TWR-ELEV) and the Tower Serial Module (TWR-SER). The TWR-K60N512 can also be
combined with other Freescale Tower peripheral modules to create development platforms for a wide
variety of applications. 0 provides an overview of the Freescale Tower System.
Figure 1. Freescale Tower System Overview
1.1 Contents
The TWR-K60N512 contents include:
TWR-K60N512 board assembly
3ft USB cable
Interactive DVD with software installers and documentation
Quick Start Guide
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The TWR-K60N512-KIT contains:
TWR-K60N512 MCU module
TWR-ELEV –Primary and Secondary Elevator Modules
TWR-SER –Serial module including USB host/device/OTG, Ethernet, CAN, RS232 and RS485
1.2 Features
Figure 2 and Figure 3 show the TWR-K60N512 with some of the key features called out. The following
list summarizes the features of the TWR-K60N512 Tower MCU Module:
Tower compatible microcontroller module
MK60N512VMD100: K60N512 in a 144 MAPBGA with 100MHz operation
Touch Tower Plug-in Socket
General purpose Tower Plug-in (TWRPI) socket
On-board JTAG debug circuit (OSJTAG) with virtual serial port
Three axis accelerometer (MMA7660)
Four (4) user-controllable LEDs
Four (4) capacitive touch pads
Two (2) user pushbutton switches
Potentiometer
Battery Holder for 20mm lithium battery (e.g. 2032, 2025)
SD Card slot
Figure 2. Callouts on front side of the TWR-K60N512
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Figure 3. Callouts on back side of the TWR-K60N512
1.3 Getting Started
Follow the Quick Start Guide found printed in the TWR-K60N512 box or the interactive DVD for the list
of recommended steps for getting started. There are also lab walk-through guides available on the
tool support page for the TWR-K60N512: http://www.freescale.com/TWR-K60N512.
1.4 Reference Documents
The documents listed below should be referenced for more information on the Kinetis family, Tower
System, and MCU Modules. These can be found in the documentation section of freescale.com/TWR-
K60N512 or freescale.com/kinetis.
TWR-K60N512-QSG: Quick Start Guide
TWR-K60N512-SCH: Schematics
TWR-K60N512-PWA: Design Package
TWRPI-SLCD-SCH: Schematics
TWRPI-SLCD-PWA: Design Package
K60 Family Product Brief
K60 Family Reference Manual
Kinetis Quick Reference User Guide (QRUG)
Tower Configuration Tool
2Hardware Description
The TWR-K60N512 is a Tower Controller Module featuring the MK60N512VMD100—an ARM Cortex-
M4 based microcontroller with segment LCD and USB 2.0 full-speed OTG controllers in a 144 MAPBGA
package with a maximum core operating frequency of 100MHz. It is intended for use in the Freescale
Tower System but can operate stand-alone. An on-board debug circuit, OSJTAG, provides a JTAG
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debug interface and a power supply input through a single USB mini-AB connector. Figure 4 shows a
block diagram of the TWR-K60N512. The following sections describe the hardware in more detail.
OSJTAG
JTAG, Power, SCI K60N512
144 MAPBGA
Tower Elevator Expansion Connectors
SDHC, I2S, SPI, I2C, ADC, USB, DAC, PWM, UARTs, Flexbus, Ethernet
50 MHz OSC
SCI
Freescale Device External Connectors Interface Circuits Power
MMA7660
Infrared Port
IR Output
I2C
Comparator
GPIO / Interrupts
ADC
Reset LED
JTAG
32.768 KHz XTAL
3.3V5.0V
General Purpose
Tower Plug-in
(TWRPI)
SPI, I2C, ADC, GPIO
Touch Tower Plug-in
(TWRPI)
TSI, GPIO Capacitive
Touch
Pads
LED
LED
LED
SD Card Slot
SDHC
USB
Mini-B
Battery
Holder VBAT (RTC)
5.0V
Figure 4. TWR-K60N512 Block Diagram
2.1 K60N512 Microcontroller
The TWR-K60N512 module features the MK60N512VMD100. The K60 microcontroller family is part of
the Kinetis portfolio of devices built around an ARM Cortex-M4 core. Refer to the K60 Family Product
Brief and the K60 Family Reference Manual for comprehensive information on the MK60N512VMD100
device. The key features are listed here:
32-bit ARM Cortex-M4 core with DSP instructions
100MHz maximum core operating frequency
144 MAPBGA, 13mm x 13mm, 1.0mm pitch package
1.71V –3.6V operating voltage input range
256 Kbytes of program flash, 64 Kbytes of static RAM
FlexMemory consisting of 256 Kbytes of FlexNVM (non-volatile flash memory that can be used
as program flash, data flash, backup EEPROM of variable endurance and size) and 4 Kbytes of
FlexRAM (RAM memory that can be used as traditional RAM, as high-endurance EEPROM
storage, or flash programming acceleration RAM)
External bus interface
Power management controller with 10 different power modes
Multi-purpose clock generator with PLL and FLL operation modes
16-bit SAR ADC, 12-bit DAC
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High-speed analog comparator with 6-bit DAC
Programmable voltage reference
USB full-speed/low-speed OTG/Host/Device controller with device charge detect
10/100 Mbps Ethernet MAC
SPI, I2C (w/ SMBUS support), UART (w/ ISO7816 and IrDA), CAN, I2S
SD Host Controller (SDHC)
GPIO with pin interrupt support, DMA request capability, digital glitch filtering
Capacitive touch sensing inputs (TSI)
Debug interfaces: JTAG, cJTAG, SWD
Trace: TPIO, FPB, DWT, ITM, ETM, ETB
2.2 Clocking
The Kinetis MCUs start up from an internal digitally controlled oscillator (DCO). Software can enable
one or two external oscillators if desired. The external oscillator for the Multipurpose Clock Generator
(MCG) module can range from 32.768 KHz up to a 32 MHz crystal or ceramic resonator. The external
oscillator for the Real Time Clock (RTC) module accepts a 32.768 kHz crystal.
The EXTAL pin of the main external oscillator can also be driven directly from an external clock source.
The TWR-K60N512 features a 50 MHz on-board clock oscillator as seen in sheet 4 of the schematics.
However, when the K60 Ethernet MAC is operating in RMII mode, synchronization of the MCU input
clock and the 50 MHz RMII transfer clock is important. In this mode, the MCU input clock must be kept
in phase with the 50 MHz clock supplied to the external PHY. Therefore, the TWR-K60N512 provides
the option (see description for J6 in Table 5) to select the clock input to the MCU from 1) the on-board
50MHz source or 2) an external clock from the CLKIN0 pin on the Primary Connector. When the K60 is
operating in Ethernet RMII mode, the Tower peripheral module implementing the RMII PHY device
should drive a 50 MHz clock on the CLKIN0 signal that is kept in phase with the clock supplied to the
RMII PHY. Refer to section 2.10 “Ethernet”for more information.
2.3 System Power
In stand-alone operation, the main power source for the TWR-K60N512 module is derived from the
5.0V input from either the USB mini-B connector, J13, or the debug header, J11, when a shunt is placed
on jumper J12. A low-dropout regulator provides a 3.3V supply from the 5.0V input voltage. Refer to
sheet 5 of the TWR-K60N512 schematics for more details.
When installed into a Tower System, the TWR-K60N512 can be powered from either an on-board
source or from another source in the assembled Tower System. If both the on-board and off-board
sources are available, the TWR-K60N512 will default to the off-board source.
The 3.3V power supplied to the MCU is routed through a jumper, J8. The jumper shunt can be removed
to allow for either 1) alternate MCU supply voltages to be injected or 2) the measurement of power
consumed by the MCU.
2.3.1 RTC VBAT
The Real Time Clock (RTC) module on the K60 has two modes of operation, system power-up and
system power-down. During system power-down, the RTC is powered from the backup power supply,
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VBAT. The TWR-K60N512 provides a battery holder for a coin cell battery that can be used as the VBAT
supply. The holder can accept common 20mm diameter 3V lithium coin cell batteries (e.g. 2032,
2025). Refer to the description J9 in Table 5 “TWR-K60N512 Jumper Table”for more information.
2.4 Debug Interface
There are two debug interface options provided: the on-board OSJTAG circuit and an external Cortex
Debug+ETM connector.
2.4.1 OSJTAG
An on-board MC9S08JM60 based Open Source JTAG (OSJTAG) circuit provides a JTAG debug interface
to the K60N512. A standard USB A male to Mini-B male cable (provided) can be used for debugging via
the USB connector, J16. The OSJTAG interface also provides a USB to serial bridge. Drivers for the
OSJTAG interface are provided in the P&E Micro Kinetis Tower Toolkit (available on the included DVD).
Note: The port pins connected to the OSJTAG USB-to-serial bridge (PTD6 and PTD7) are also connected
to the infrared interface. Refer to Table 6 “I/O Connectors and Pin Usage Table” and Table 5 “TWR-
K60N512 Jumper Table” for more information.
2.4.2 Cortex Debug+ETM Connector
The Cortex Debug+ETM connector is a 20-pin (0.05") connector providing access to the SWD, SWV,
JTAG, cJTAG, EzPort and ETM trace (4-bit) signals available on the K60 device. The pinout and K60 pin
connections to the debug connector, J14, is shown in Table 1Table 1.
Table 1. Cortex Debug+ETM Connector Pinout
Pin
Function
TWR-K60N512 Connection
1
VTref
3.3V MCU supply (P3V3_MCU)
2
TMS / SWDIO
PTA3/SCI0_RTS_b/FTM0_CH0/JTAG_MS/SWD_DIO
3
GND
GND
4
TCK / SWCLK
PTA0/SCI0_CTS_b/FTM0_CH5/JTAG_CLK/SWD_CLK/EZP_CLK
5
GND
GND
6
TDO / SWO
PTA2/SCI0_TX/FTM0_CH7/JTAG_DO/TRACE_SWO/EZP_DO
7
Key
―
8
TDI
PTA1/SCI0_RX/FTM0_CH6/JTAG_DI/EZP_DI
9
GNDDetect
PTA4/FTM0_CH1/MS/NMI_b/EZP_CS_b
10
nRESET
RESET_b
11
Target Power
5V supply (via J12)
12
TRACECLK
PTA6/FTM0_CH3/TRACE_CLKOUT
13
Target Power
5V supply (via J12)
14
TRACEDATA[0]
PTA10/FTM2_CH0/FTM2_QD_PHA/TRACE_D0
15
GND
GND
16
TRACEDATA[1]
PTA9/FTM1_CH1/FTM1_QD_PHB/TRACE_D1
17
GND
GND
18
TRACEDATA[2]
PTA8/FTM1_CH0/FTM1_QD_PHA/TRACE_D2
19
GND
GND
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Pin
Function
TWR-K60N512 Connection
20
TRACEDATA[3]
PTA7/FTM0_CH4/TRACE_D3
Note: Many of the trace signals connected to the debug connector are also connected elsewhere on
the TWR-K60N512. Refer to Table 6 “I/O Connectors and Pin Usage Table” and Table 7 “TWR-K60N512
Primary Connector Pinout” for more information.
2.5 Infrared Port
An infrared transmit and receive interface is implemented as shown in Figure 5 below. The CMT_IRO
pin directly drives an infrared diode. The receiver uses an infrared phototransistor connected to an on-
chip analog comparator through a low-pass filter. Internal to the K60 device, the output of the analog
comparator can be routed to a UART module for easier processing of the incoming data stream.
C5
0.1UF
Default: no shunt
(Disable IRDA)
Q3
QTLP610CPD
1 2
R24
1.54K
D3
QTLP610CIR
2 1
R25
1.0K
P3V3
R23
33
J6 HDR 1X2 TH
1 2
PTC6CMP0_IN0IRDA_SEN
CMT_IROPTD7 IRDARIRDAJ
Figure 5. Infrared Port Implementation
2.6 Accelerometer
An MMA7660 digital accelerometer is connected to the K60 MCU through an I2C interface and a
GPIO/IRQ signal. Refer to Table 6 “I/O Connectors and Pin Usage Table” for connection details.
2.7 Potentiometer, Pushbuttons, LEDs
The TWR-K60N512 features two pushbutton switches connected to GPIO/interrupt signals, one
pushbutton connected to the master reset signal, four capacitive touch pad electrodes, four user-
controllable LEDs, and a potentiometer connected to an ADC input signal. Refer to Table 6 “I/O
Connectors and Pin Usage Table” for information about which port pins are connected to these
features.
2.8 General Purpose Tower Plug-in (TWRPI) Socket
The TWR-K60N512 features a socket that can accept a variety of different Tower Plug-in modules
featuring sensors, RF transceivers, and more. The General Purpose TWRPI socket provides access to
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I2C, SPI, IRQs, GPIOs, timers, analog conversion signals, TWRPI ID signals, reset, and voltage supplies.
The pinout for the TWRPI Socket is defined in Table 2.
Refer to Table 6 “I/O Connectors and Pin Usage Table” for the specific K60 pin connections to the
General Purpose TWRPI socket.
Table 2. General Purpose TWRPI socket pinout
Left-side 2x10 Connector
Right-side 2x10 Connector
Pin
Description
1
5V VCC
2
3.3 V VCC
3
GND
4
3.3V VDDA
5
VSS (Analog GND)
6
VSS (Analog GND)
7
VSS (Analog GND)
8
ADC: Analog 0
9
ADC: Analog 1
10
VSS (Analog GND)
11
VSS (Analog GND)
12
ADC: Analog 2
13
VSS (Analog GND)
14
VSS (Analog GND)
15
GND
16
GND
17
ADC: TWRPI ID 0
18
ADC: TWRPI ID 1
19
GND
20
Reset
Pin
Description
1
GND
2
GND
3
I2C: SCL
4
I2C: SDA
5
GND
6
GND
7
GND
8
GND
9
SPI: MISO
10
SPI: MOSI
11
SPI: SS
12
SPI: CLK
13
GND
14
GND
15
GPIO: GPIO0/IRQ
16
GPIO: GPIO1/IRQ
17
GPIO: GPIO2
18
GPIO: GPIO3
19
GPIO: GPIO4/Timer
20
GPIO: GPIO5/Timer
2.9 Touch Interface
The touch sensing input (TSI) module of the Kinetis MCUs provides capacitive touch sensing detection
with high sensitivity and enhanced robustness. Each TSI pin implements the capacitive measurement of
an electrode.
The TWR-K60N512 provides two methods for evaluating the TSI module. There are four individual
electrodes on-board the TWR-K60N512 that simulate pushbuttons. Additionally, twelve TSI signals are
connected to a Touch Tower Plug-in (TWRPI) socket that can accept Touch TWRPI daughter cards that
may feature keypads, rotary dials, sliders, etc.
The pinout for the Touch TWRPI socket is defined in Table 3. Refer to Table 6 “I/O Connectors and Pin
Usage Table” for the specific K60 pin connections to the Touch TWRPI socket.
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Table 3. Touch TWRPI socket pinout
Pin
Description
1
5V VCC
2
3.3 V VCC
3
Electrode 0
4
3.3V VDDA
5
Electrode 1
6
VSS (Analog GND)
7
Electrode 2
8
Electrode 3
9
Electrode 4
10
Electrode 5
11
Electrode 6
12
Electrode 7
13
Electrode 8
14
Electrode 9
15
Electrode 10
16
Electrode 11
17
ADC: TWRPI ID 0
18
ADC: TWRPI ID 1
19
GND
20
Reset
2.10 Ethernet
The K60N512 features a 10/100 Mbps Ethernet MAC with MII and RMII interfaces. The TWR-K60N512
routes the RMII interface signals from the K60 MCU to the Primary Connector, allowing the connection
to an external Ethernet PHY device on a Tower peripheral module.
When the K60 Ethernet MAC is operating in RMII mode, synchronization of the MCU clock and the 50
MHz RMII transfer clock is important. The MCU input clock must be kept in phase with the 50 MHz
clock supplied to the external PHY. Therefore, the TWR-K60N512 provides the option (see description
for J6 in Table 5) to clock the MCU from an external clock from the CLKIN0 pin on the Primary
Connector. The Tower peripheral module implementing the RMII PHY device should drive a 50 MHz
clock on the CLKIN0 pin that is kept in phase with the clock supplied to the RMII PHY.
The TWR-SER module that comes as part of the TWR-K60N512-KIT provides a 10/100 Ethernet PHY
that can operate in either MII or RMII mode. By default the PHY is boot strapped to operate in MII
mode; therefore jumper configuration changes may be required. Table 4 shows the settings for proper
interoperability between the Ethernet interface on the TWR-SER and the TWR-K60N512.
Table 4. Ethernet operation jumper settings
Tower Module
Jumper
Setting
TWR-K60N512
J6
2-3
TWR-SER
J2
3-4
TWR-SER
J3
2-3
TWR-SER
J12
9-10
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2.11 USB
The K60N512 features a USB full-speed/low-speed OTG/Host/Device controller with built-in
transceiver. The TWR-K60N512 routes the USB D+ and D- signals from the K60 MCU to the Primary
Connector, allowing the connection to external USB connectors or additional circuitry on a Tower
peripheral module.
The TWR-SER module included as part of the TWR-K60N512-KIT provides a USB OTG/Host/Device
interface with a mini-AB USB connector. There are many configuration options that can be selected to
evaluate different USB modes of operation. By default, the TWR-SER is configured for USB Device
operation. Please refer to the documentation included with the TWR-SER for more information on the
configuration options.
2.12 Secure Digital Card Slot
A Secure Digital (SD) card slot is available on the TWR-K60N512 connected to the SD Host Controller
(SDHC) signals of the K60 MCU. This slot will accept SD memory cards as well as Secure Digital Input
Output (SDIO) cards. Refer to Table 6 “I/O Connectors and Pin Usage Table” for the SDHC signal
connection details.
2.13 External Bus Interface –FlexBus
The K60 device features a multi-function external bus interface called the FlexBus interface controller
capable of interfacing to slave-only devices. The FlexBus interface is not used directly on the TWR-
K60N512. Instead, a subset of the FlexBus is connected to the Primary Connector so that the external
bus can access devices on Tower peripheral modules. Refer to Table 7 “TWR-K60N512 Primary
Connector Pinout”and sheet 8 of the TWR-K60N512 schematics for more details.
3Jumper Table
There are several jumpers on the TWR-K60N512 that provide configuration selection and signal
isolation. Refer to the following table for details. The default installed jumper settings are shown in
bold with asterisks.
Table 5. TWR-K60N512 Jumper Table
Jumper
Option
Setting
Description
J1
USB VREGIN Power
Connection
*ON*
Connect USB0_VBUS from Primary Elevator (A57) to
VREGIN
OFF
Disconnect VREGIN from Primary Elevator
J2
Infrared Transmitter
Connection
ON
Connect PTD7/CMT_IRO/UART0_TX to IR Transmitter (D1)
*OFF*
Disconnect PTD7/CMT_IRO/UART0_TX from IR Transmitter
(D1)
J6
Clock Input Source
Selection
*1-2*
Connect main EXTAL to on-board 50 MHz clock
2-3
Connect EXTAL to CLKIN0 signal on Primary Elevator (B24)
J8
MCU Power Connection
*ON*
Connect on-board 3.3V supply to MCU
OFF
Isolate MCU from power supply (allows for external supply
or power measurements)
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J9
VBAT Power Selection
*1-2*
Connect VBAT to on-board 3.3V supply
2-3
Connect VBAT to the higher voltage between on-board 3.3V
supply or coin-cell supply
J10
OSJTAG Mode Selection
ON
OSJTAG bootloader mode (OSJTAG firmware
reprogramming)
*OFF*
Debugger mode
J12
JTAG Power Connection
ON
Connect on-board 5V supply to JTAG port (supports
powering board from external JTAG probe)
*OFF*
Disconnect on-board 5V supply from JTAG port
4Input/Output Connectors and Pin Usage Table
The following table provides details on which K60N512 pins are using to communicate with the LEDs,
switches, and other I/O interfaces onboard the TWR-K60N512.
Note: Some port pins are used in multiple interfaces on-board and many are potentially connected to
off-board resources via the Primary and Secondary Connectors. Take care to avoid attempted
simultaneous usage of mutually exclusive features.
Table 6. I/O Connectors and Pin Usage Table
Feature
Connection
Port Pin
Pin Function
OSJTAG USB-to-serial
Bridge
OSJTAG Bridge RX Data
PTE9
UART5_RX
OSJTAG Bridge TX Data
PTE8
UART5_TX
SD Card Slot
SD Clock
PTE2
SDHC0_DCLK
SD Command
PTE3
SDHC0_CMD
SD Data0
PTE1
SDHC0_D0
SD Data1
PTE0
SDHC0_D1
SD Data2
PTE5
SDHC0_D2
SD Data3
PTE4
SDHC0_D3
SD Card Detect
PTE28
PTE28
SD Write Protect
PTE27
PTE27
Infrared Port
IR Transmit
PTD7
CMT_IRO
IR Receive
PTC6
CMP0_IN0
Pushbuttons
SW1 (IRQ0)
PTA19
PTA19
SW2 (IRQ1)
PTE26
PTE26
SW3 (RESET)
RESET_b
RESET_b
Touch Pads
E1 / Touch
PTA4
TSI0_CH5
E2 / Touch
PTB3
TSI0_CH8
E3 / Touch
PTB2
TSI0_CH7
E4 / Touch
PTB16
TSI0_CH9
LEDs
E1 / Orange LED
PTA11
PTA11
E2 / Yellow LED
PTA28
PTA28
E3 / Green LED
PTA29
PTA29
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Feature
Connection
Port Pin
Pin Function
E4 / Blue LED
PTA10
PTA10
Potentiometer
Potentiometer (R71)
―
ADC1_DM1
Accelerometer
I2C SDA
PTD9
I2C0_SDA
I2C SCL
PTD8
I2C0_SCL
IRQ
PTD10
PTD10
General Purpose
TWRPI Socket
TWRPI AN0 (J4 Pin 8)
―
ADC0_DP0/ADC1_DP3
TWRPI AN1 (J4 Pin 9)
―
ADC0_DM0/ADC1_DM3
TWRPI AN2 (J4 Pin 12)
―
ADC1_DP0/ADC0_DP3
TWRPI ID0 (J4 Pin 17)
―
ADC0_DP1
TWRPI ID1 (J4 Pin 18)
―
ADC0_DM1
TWRPI I2C SCL (J5 Pin 3)
PTD8
I2C0_SCL
TWRPI I2C SDA (J5 Pin 4)
PTD9
I2C0_SDA
TWRPI SPI MISO (J5 Pin 9)
PTD14
SPI2_SIN
TWRPI SPI MOSI (J5 Pin 10)
PTD13
SPI2_SOUT
TWRPI SPI SS (J5 Pin 11)
PTD15
SPI2_PCS0
TWRPI SPI CLK (J5 Pin 12)
PTD12
SPI2_SCK
TWRPI GPIO0 (J5 Pin 15)
PTD10
PTD10
TWRPI GPIO1 (J5 Pin 16)
PTB8
PTB8
TWRPI GPIO2 (J5 Pin 17)
PTB9
PTB9
TWRPI GPIO3 (J5 Pin 18)
PTA19
PTA19
TWRPI GPIO4 (J5 Pin 19)
PTE26
PTE26
Touch Pad / Segment
LCD TWRPI Socket
Electrode 0 (J3 Pin 3)
PTB0
TSI0_CH0
Electrode 1 (J3 Pin 5)
PTB1
TSI0_CH6
Electrode 2 (J3 Pin 7)
PTB2
TSI0_CH7
Electrode 3 (J3 Pin 8)
PTB3
TSI0_CH8
Electrode 4 (J3 Pin 9)
PTC0
TSI0_CH13
Electrode 5 (J3 Pin 10)
PTC1
TSI0_CH14
Electrode 6 (J3 Pin 11)
PTC2
TSI0_CH15
Electrode 7 (J3 Pin 12)
PTA4
TSI0_CH5
Electrode 8 (J3 Pin 13)
PTB16
TSI0_CH9
Electrode 9 (J3 Pin 14)
PTB17
TSI0_CH10
Electrode 10 (J3 Pin 15)
PTB18
TSI0_CH11
Electrode 11 (J3 Pin 16)
PTB19
TSI0_CH12
TWRPI ID0 (J3 Pin 17)
―
ADC1_DP1
TWRPI ID1 (J3 Pin 18)
―
ADC1_SE16
5Tower Elevator Connections
The TWR-K60N512 features two expansion card-edge connectors that interface to the Primary and
Secondary Elevator boards in a Tower system. The Primary Connector (comprised of sides A and B) is
utilized by the TWR-K60N512 while the Secondary Connector (comprised of sides C and D) only makes
connections to the GND pins. Table 7 provides the pinout for the Primary Connector.
Downloaded from Elcodis.com electronic components distributor

TWR-K60N512 Tower Module User's Manual Page 16 of 17
Table 7. TWR-K60N512 Primary Connector Pinout
Pin #
Side B
Pin #
Side A
Name
Usage
Name
Usage
B1
5V
5.0V Power
A1
5V
5.0V Power
B2
GND
Ground
A2
GND
Ground
B3
3.3V
3.3V Power
A3
3.3V
3.3V Power
B4
ELE_PS_SENSE
Elevator Power Sense
A4
3.3V
3.3V Power
B5
GND
Ground
A5
GND
Ground
B6
GND
Ground
A6
GND
Ground
B7
SDHC_CLK / SPI1_CLK
PTE2
A7
SCL0
PTD8
B8
SDHC_D3 / SPI1_CS1_b
A8
SDA0
PTD9
B9
SDHC_D3 / SPI1_CS0_b
PTE4
A9
GPIO9 / CTS1
PTC19
B10
SDHC_CMD / SPI1_MOSI
PTE1
A10
GPIO8 / SDHC_D2
PTE5
B11
SDHC_D0 / SPI1_MISO
PTE3
A11
GPIO7 / SD_WP_DET
PTE27
B12
ETH_COL
A12
ETH_CRS
B13
ETH_RXER
PTA5
A13
ETH_MDC
PTB1
B14
ETH_TXCLK
A14
ETH_MDIO
PTB0
B15
ETH_TXEN
PTA15
A15
ETH_RXCLK
B16
ETH_TXER
A16
ETH_RXDV
PTA14
B17
ETH_TXD3
A17
ETH_RXD3
B18
ETH_TXD2
A18
ETH_RXD2
B19
ETH_TXD1
PTA17
A19
ETH_RXD1
PTA12
B20
ETH_TXD0
PTA16
A20
ETH_RXD0
PTA13
B21
GPIO1 / RTS1
PTC18
A21
SSI_MCLK
PTE6
B22
GPIO2 / SDHC_D1
PTE0
A22
SSI_BCLK
PTE12
B23
GPIO3
PTE28
A23
SSI_FS
PTE11
B24
CLKIN0
PTA18
A24
SSI_RXD
PTE7
B25
CLKOUT1
PTE26
A25
SSI_TXD
PTE10
B26
GND
Ground
A26
GND
Ground
B27
AN7
PTB7
A27
AN3
PGA0_DP/ADC0_DP0/ADC1_DP3
B28
AN6
PTB6
A28
AN2
PGA0_DM/ADC0_DM0/ADC1_DM3
B29
AN5
PTB5
A29
AN1
PGA1_DP/ADC1_DP0/ADC0_DP3
B30
AN4
PTB4
A30
AN0
PGA1_DM/ADC1_DM0/ADC0_DM3
B31
GND
Ground
A31
GND
Ground
B32
DAC1
DAC1_OUT
A32
DAC0
DAC0_OUT
B33
TMR3
A33
TMR1
PTA9
B34
TMR2
PTD6
A34
TMR0
PTA8
B35
GPIO4
PTB8
A35
GPIO6
PTB9
B36
3.3V
3.3V Power
A36
3.3V
3.3V Power
B37
PWM7
PTA2
A37
PWM3
PTA6
B38
PWM6
PTA1
A38
PWM2
PTC3
B39
PWM5
PTD5
A39
PWM1
PTC2
B40
PWM4
PTA7
A40
PWM0
PTC1
B41
CANRX0
PTE25
A41
RXD0
PTE25
B42
CANTX0
PTE24
A42
TXD0
PTE24
B43
1WIRE
A43
RXD1
PTC16
B44
SPI0_MISO
PTD14
A44
TXD1
PTC17
B45
SPI0_MOSI
PTD13
A45
VSS
VSSA
B46
SPI0_CS0_b
PTD11
A46
VDDA
VDDA
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TWR-K60N512 Tower Module User's Manual Page 17 of 17
Pin #
Side B
Pin #
Side A
Name
Usage
Name
Usage
B47
SPI0_CS1_b
PTD15
A47
VREFA1
VREFH
B48
SPI0_CLK
PTD12
A48
VREFA2
VREFL
B49
GND
Ground
A49
GND
Ground
B50
SCL1
PTD8
A50
GPIO14
B51
SDA1
PTD9
A51
GPIO15
B52
GPIO5 / SD_CARD_DET
PTE28
A52
GPIO16
B53
USB0_DP_PDOWN
A53
GPIO17
B54
USB0_DM_PDOWN
A54
USB0_DM
USB0_DM
B55
IRQ_H
PTA24
A55
USB0_DP
USB0_DP
B56
IRQ_G
PTA24
A56
USB0_ID
B57
IRQ_F
PTA25
A57
USB0_VBUS
VREGIN
B58
IRQ_E
PTA25
A58
TMR7
B59
IRQ_D
PTA26
A59
TMR6
B60
IRQ_C
PTA26
A60
TMR5
B61
IRQ_B
PTA27
A61
TMR4
B62
IRQ_A
PTA27
A62
RSTIN_b
RESET_b
B63
EBI_ALE / EBI_CS1_b
PTD0
A63
RSTOUT_b
RESET_b
B64
EBI_CS0_b
PTD1
A64
CLKOUT0
PTC3
B65
GND
Ground
A65
GND
Ground
B66
EBI_AD15
PTB18
A66
EBI_AD14
PTC0
B67
EBI_AD16
PTB17
A67
EBI_AD13
PTC1
B68
EBI_AD17
PTB16
A68
EBI_AD12
PTC2
B69
EBI_AD18
PTB11
A69
EBI_AD11
PTC4
B70
EBI_AD19
PTB10
A70
EBI_AD10
PTC5
B71
EBI_R/W_b
PTC11
A71
EBI_AD9
PTC6
B72
EBI_OE_b
PTB19
A72
EBI_AD8
PTC7
B73
EBI_D7
PTB20
A73
EBI_AD7
PTC8
B74
EBI_D6
PTB21
A74
EBI_AD6
PTC9
B75
EBI_D5
PTB22
A75
EBI_AD5
PTC10
B76
EBI_D4
PTB23
A76
EBI_AD4
PTD2
B77
EBI_D3
PTC12
A77
EBI_AD3
PTD3
B78
EBI_D2
PTC13
A78
EBI_AD2
PTD4
B79
EBI_D1
PTC14
A79
EBI_AD1
PTD5
B80
EBI_D0
PTC15
A80
EBI_AD0
PTD6
B81
GND
Ground
A81
GND
Ground
B82
3.3V
3.3V Power
A82
3.3V
3.3V Power
Downloaded from Elcodis.com electronic components distributor