Fujitsu SPARC M12 User manual

Manual Code: C120-0050-06EN
March 2018
Fujitsu SPARC M12
Quick Guide

Preface
This document describes the basic specifications and system configurations that users
need to be familiar with when using the Fujitsu SPARC M12 (hereinafter, referred to as
"SPARC M12").The document also provides an overview of the SPARC M12 and indicates
the reference manuals for different work phases or purposes.
Document configuration
1. Understanding an Overview of the System
This chapter describes the SPARC M12 lineup and features.
2. External Views of the Chassis
This chapter shows external views of the chassis for each model.
3. System Specifications
This chapter describes the server and processor hardware specifications.
For details on firmware and software, see "Chapter 1 Understanding an Overview of the SPARC
M12/M10" in the Fujitsu SPARC M12 and Fujitsu M10/SPARC M10 System Operation and
Administration Guide.
4. Document Map Reference Guide (by Phase/Purpose)
This chapter shows the reference manuals for each work item from SPARC M12 installation to
operation/administration and system expansion.
5. Document List
This chapter shows a list of documents related to the SPARC M12.
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Text conventions
•This document uses the following fonts and symbols to express specific types of information.
Related documentation
•Sun Oracle software-related documents (Oracle Solaris, etc.)
http://docs.oracle.com/en/
•For a list of documents related to the SPARC M12, see "5. Document List."
Document feedback
•If you have any comments or requests regarding this document, please take a moment to share
them with us by indicating the manual code, manual title, and page, and stating your points
specifically through the following sites:
•Global site
http://www.fujitsu.com/global/contact/
•Japanese site
http://www.fujitsu.com/jp/products/computing/servers/unix/sparc/contact/
Copyright © 2017, 2018 Fujitsu Limited. All rights reserved.
Oracle and/or its affiliates provided technical input and review on portions of this material.
Font/Symbol Meaning Example
Italic Indicates the name of a reference manual. See the Fujitsu SPARC M12-2S Installation Guide.
" " Indicates the name of a chapter, section,
item, button, or menu.
See "Chapter 2 Network Connection."
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1. Understanding an Overview
of the System
The SPARC M12 is a UNIX server system that is designed with the
high-performance, high-reliability SPARC64 XII processor and runs
the Oracle Solaris operating system.
The system can support system configurations that meet the
purpose and scale of business, by using CPU Activations and
server connections through the building block (BB) method.
The database server processing of the core system has been
accelerated, with the aim of streamlining tasks and suppressing
investment costs, revolutionizing the businesses of customers.

1.1 Lineup
▍Server
SPARC M12-1
•This entry-level server packs high performance and high
reliability in a small 1 RU form factor, and is ideal for
any purpose.
SPARC M12-2
•The compact chassis of this mid-range server, optimal for data
center system integration, provides high performance and high
reliability along with flexible scalability.
SPARC M12-2S
•Providing excellent performance and high scalability, this flagship
server achieves high performance, high reliability, and world-class
scalability through building block connections.
▍Expansion Options
PCI expansion unit
•The SPARC M12 offers a PCI expansion unit for I/O slot expansion.
All the available server models support the PCI expansion unit,
which supports PCI Express (PCIe).
1. Understanding an Overview of the System
SPARC M12-2
SPARC M12-2S
PCI expansion unit
SPARC M12-1
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1.2 SPARC M12 Features
▍High Performance
•The SPARC M12 is equipped with a new processor, the SPARC64 XII with improved CPU core performance.
In addition to the adopted high-speed DDR4 memory improving memory access performance, the SPARC M12
has the Software On Chip function that incorporates part of software processing into the processor to
accelerate database processing.
▍Scalability
•CPU Activations and the building block method enable step-by-step expansion in units of one CPU core to up
to the maximum configuration of 384 CPU cores (16BB).
▍Flexibility
•You can flexibly configure a system, such as one emphasizing isolation or resource availability, by using
various virtualization functions.
▍Reliability
•Starting with a new processor, the SPARC64 XII with mainframe-class reliability, and through high-reliability
technologies such as data protection, redundancy, and dynamic degradation, the SPARC M12 thoroughly
pursues reliability.
Performance guarantee and continuous operation through alternative CPU cores are functions unique to the
SPARC M12.
▍Safety
•The adopted OS is Oracle Solaris, a UNIX OS compliant with international standards.
You can configure a highly reliable and secure system environment.
▍Ecology
•The SPARC M12 supports low power consumption to save energy through power-saving design and energy-
saving management.
1. Understanding an Overview of the System
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1.2.1 High Performance
Acceleration of database server processing
•The improved CPU core performance can increase business performance and suppress
investment costs in the entire system.
•The SPARC M12 provides Software On Chip (SWoC) for accelerating the processing of
databases, such as Oracle Database.
•The SPARC M12 adopts high-speed DDR4 memory for accelerating in-memory processing,
and expands the memory bandwidth.
▍SPARC64 XII
1. Understanding an Overview of the System
The new processor, the SPARC64 XII, has substantially improved CPU core performance.
Business performance increases, which streamlines tasks, optimizing investment costs.
•Designed with state-of-the-art 20 nm technology, the processor
is capable of highly parallel processing of 8 threads per CPU
core and up to 12 CPU cores/96 threads per CPU chip.
•Secondary cache memory is divided in units of CPU cores and
high-capacity tertiary cache memory is added, resulting in
accelerated data processing and an optimized balance
between the speed and capacity of all cache memory.
•The maximum frequency is 4.25 GHz.
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▍VLLC (Vapor and Liquid Loop Cooling)
Technology mounted in the SPARC M12-2/M12-2S to strongly cool the CPU in
order to achieve high CPU core performance
•Used in addition to hybrid cooling with LLC, evaporative cooling takes heat away when
liquid changes into vapor.
•VLLC can exhibit the maximum cooling capacity as a liquid-cooled module that forcibly
circulates refrigerant with a driving force, rather than using surface tension, natural
convection, or gravity to circulate refrigerant.
1. Understanding an Overview of the System
Pump
Radiator
Cooling plate
In principle Implementation
CPU
Phase change
of liquid
Radiator
Pump
Liquid
Vapor+Liquid
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1.2.2 Scalability
▍CPU Activation
•By using the CPU Activation function, you can add CPU resources in the unit of CPU
cores, which has finer granularity than the unit of CPU chips.
•You can add and register CPU core resources at any time.
•You can move resources by moving a CPU Activation key between SPARC M12 servers
of the same model type.
1. Understanding an Overview of the System
Resource shortage solved Resources moved between systems
Normal times
Domain 1
CPU
core
CPU Activation
resource pool
CPU
core
CPU
core
CPU
core
Domain 2
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Disaster occurs
at operating
site
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Backup site (Osaka)
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Operating site (Tokyo)
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Backup site (Osaka)
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Operating site (Tokyo)
CPU
Activation key
moved
Sudden
load
increase
CPU Activation assigned
Domain assigned
CPU
core CPU
core
CPU Activation assigned
No domain assigned
Exceptional times
Domain 1
CPU
core
CPU Activation
resource pool
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Domain 2
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
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▍Building Block Configuration
•You can adjust the number of SPARC M12-2S connections according to the
performance required. The building block method enables expansion to up to the
16BB configuration/32 CPUs/384 cores.
•A physical partition (hardware partition) can consist
of multiple connected SPARC M12-2S units.
1. Understanding an Overview of the System
Can expand to up to 16 BBs
(32 CPUs)
Additional
expansion
Additional
expansion
At initial installation More CPUsMore CPU cores
12 CPU cores
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
4 CPU cores
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
12 CPU cores
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
8 CPU cores
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Configured
cores
easily
added
Activated CPU core
CPU
core CPU
core Non-activated CPU core
Continuous
use
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