Fujitsu SPARC M12 User manual

Manual Code: C120-0050-06EN
March 2018
Fujitsu SPARC M12
Quick Guide

Preface
This document describes the basic specifications and system configurations that users
need to be familiar with when using the Fujitsu SPARC M12 (hereinafter, referred to as
"SPARC M12").The document also provides an overview of the SPARC M12 and indicates
the reference manuals for different work phases or purposes.
Document configuration
1. Understanding an Overview of the System
This chapter describes the SPARC M12 lineup and features.
2. External Views of the Chassis
This chapter shows external views of the chassis for each model.
3. System Specifications
This chapter describes the server and processor hardware specifications.
For details on firmware and software, see "Chapter 1 Understanding an Overview of the SPARC
M12/M10" in the Fujitsu SPARC M12 and Fujitsu M10/SPARC M10 System Operation and
Administration Guide.
4. Document Map Reference Guide (by Phase/Purpose)
This chapter shows the reference manuals for each work item from SPARC M12 installation to
operation/administration and system expansion.
5. Document List
This chapter shows a list of documents related to the SPARC M12.
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Text conventions
•This document uses the following fonts and symbols to express specific types of information.
Related documentation
•Sun Oracle software-related documents (Oracle Solaris, etc.)
http://docs.oracle.com/en/
•For a list of documents related to the SPARC M12, see "5. Document List."
Document feedback
•If you have any comments or requests regarding this document, please take a moment to share
them with us by indicating the manual code, manual title, and page, and stating your points
specifically through the following sites:
•Global site
http://www.fujitsu.com/global/contact/
•Japanese site
http://www.fujitsu.com/jp/products/computing/servers/unix/sparc/contact/
Copyright © 2017, 2018 Fujitsu Limited. All rights reserved.
Oracle and/or its affiliates provided technical input and review on portions of this material.
Font/Symbol Meaning Example
Italic Indicates the name of a reference manual. See the Fujitsu SPARC M12-2S Installation Guide.
" " Indicates the name of a chapter, section,
item, button, or menu.
See "Chapter 2 Network Connection."
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1. Understanding an Overview
of the System
The SPARC M12 is a UNIX server system that is designed with the
high-performance, high-reliability SPARC64 XII processor and runs
the Oracle Solaris operating system.
The system can support system configurations that meet the
purpose and scale of business, by using CPU Activations and
server connections through the building block (BB) method.
The database server processing of the core system has been
accelerated, with the aim of streamlining tasks and suppressing
investment costs, revolutionizing the businesses of customers.

1.1 Lineup
▍Server
SPARC M12-1
•This entry-level server packs high performance and high
reliability in a small 1 RU form factor, and is ideal for
any purpose.
SPARC M12-2
•The compact chassis of this mid-range server, optimal for data
center system integration, provides high performance and high
reliability along with flexible scalability.
SPARC M12-2S
•Providing excellent performance and high scalability, this flagship
server achieves high performance, high reliability, and world-class
scalability through building block connections.
▍Expansion Options
PCI expansion unit
•The SPARC M12 offers a PCI expansion unit for I/O slot expansion.
All the available server models support the PCI expansion unit,
which supports PCI Express (PCIe).
1. Understanding an Overview of the System
SPARC M12-2
SPARC M12-2S
PCI expansion unit
SPARC M12-1
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1.2 SPARC M12 Features
▍High Performance
•The SPARC M12 is equipped with a new processor, the SPARC64 XII with improved CPU core performance.
In addition to the adopted high-speed DDR4 memory improving memory access performance, the SPARC M12
has the Software On Chip function that incorporates part of software processing into the processor to
accelerate database processing.
▍Scalability
•CPU Activations and the building block method enable step-by-step expansion in units of one CPU core to up
to the maximum configuration of 384 CPU cores (16BB).
▍Flexibility
•You can flexibly configure a system, such as one emphasizing isolation or resource availability, by using
various virtualization functions.
▍Reliability
•Starting with a new processor, the SPARC64 XII with mainframe-class reliability, and through high-reliability
technologies such as data protection, redundancy, and dynamic degradation, the SPARC M12 thoroughly
pursues reliability.
Performance guarantee and continuous operation through alternative CPU cores are functions unique to the
SPARC M12.
▍Safety
•The adopted OS is Oracle Solaris, a UNIX OS compliant with international standards.
You can configure a highly reliable and secure system environment.
▍Ecology
•The SPARC M12 supports low power consumption to save energy through power-saving design and energy-
saving management.
1. Understanding an Overview of the System
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1.2.1 High Performance
Acceleration of database server processing
•The improved CPU core performance can increase business performance and suppress
investment costs in the entire system.
•The SPARC M12 provides Software On Chip (SWoC) for accelerating the processing of
databases, such as Oracle Database.
•The SPARC M12 adopts high-speed DDR4 memory for accelerating in-memory processing,
and expands the memory bandwidth.
▍SPARC64 XII
1. Understanding an Overview of the System
The new processor, the SPARC64 XII, has substantially improved CPU core performance.
Business performance increases, which streamlines tasks, optimizing investment costs.
•Designed with state-of-the-art 20 nm technology, the processor
is capable of highly parallel processing of 8 threads per CPU
core and up to 12 CPU cores/96 threads per CPU chip.
•Secondary cache memory is divided in units of CPU cores and
high-capacity tertiary cache memory is added, resulting in
accelerated data processing and an optimized balance
between the speed and capacity of all cache memory.
•The maximum frequency is 4.25 GHz.
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▍VLLC (Vapor and Liquid Loop Cooling)
Technology mounted in the SPARC M12-2/M12-2S to strongly cool the CPU in
order to achieve high CPU core performance
•Used in addition to hybrid cooling with LLC, evaporative cooling takes heat away when
liquid changes into vapor.
•VLLC can exhibit the maximum cooling capacity as a liquid-cooled module that forcibly
circulates refrigerant with a driving force, rather than using surface tension, natural
convection, or gravity to circulate refrigerant.
1. Understanding an Overview of the System
Pump
Radiator
Cooling plate
In principle Implementation
CPU
Phase change
of liquid
Radiator
Pump
Liquid
Vapor+Liquid
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1.2.2 Scalability
▍CPU Activation
•By using the CPU Activation function, you can add CPU resources in the unit of CPU
cores, which has finer granularity than the unit of CPU chips.
•You can add and register CPU core resources at any time.
•You can move resources by moving a CPU Activation key between SPARC M12 servers
of the same model type.
1. Understanding an Overview of the System
Resource shortage solved Resources moved between systems
Normal times
Domain 1
CPU
core
CPU Activation
resource pool
CPU
core
CPU
core
CPU
core
Domain 2
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Disaster occurs
at operating
site
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Backup site (Osaka)
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Operating site (Tokyo)
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Backup site (Osaka)
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Operating site (Tokyo)
CPU
Activation key
moved
Sudden
load
increase
CPU Activation assigned
Domain assigned
CPU
core CPU
core
CPU Activation assigned
No domain assigned
Exceptional times
Domain 1
CPU
core
CPU Activation
resource pool
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Domain 2
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
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▍Building Block Configuration
•You can adjust the number of SPARC M12-2S connections according to the
performance required. The building block method enables expansion to up to the
16BB configuration/32 CPUs/384 cores.
•A physical partition (hardware partition) can consist
of multiple connected SPARC M12-2S units.
1. Understanding an Overview of the System
Can expand to up to 16 BBs
(32 CPUs)
Additional
expansion
Additional
expansion
At initial installation More CPUsMore CPU cores
12 CPU cores
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
4 CPU cores
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
12 CPU cores
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
8 CPU cores
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
CPU
core
Configured
cores
easily
added
Activated CPU core
CPU
core CPU
core Non-activated CPU core
Continuous
use
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▍Dynamic Reconfiguration of Physical Partitions (PPAR DR)
•In the SPARC M12-2S, PPAR DR is a function that can add or remove hardware
resources including CPUs, memory, and I/O devices in a physical partition without
stopping a job.
•With this function, you can add resources (active addition) in a timely manner as required
to add a new job, expand a job, etc. You can also perform active maintenance on
hardware.
1. Understanding an Overview of the System
Active maintenance of hardware
CPU
core
CPU
core
Job A
Memory I/O
CPU
core
CPU
core
Job B Job C
CPU
Activation assignment
Memory I/O
CPU
core
CPU
core
SPARC M12-2S dynamically disconnected and planned hardware maintenance performed
Disconnection Maintenance
Addition of resources (active addition)
Job A
Memory
Dynamic
resource
addition
CPU
core
CPU
core
CPU
core
CPU
core
Memory
CPU
core
CPU
core
Physical partition #0
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1.2.3 Flexibility
Physical partition (PPAR)
•A physical partition can be configured with the SPARC M12-2S connected using the
building block method.
So you can create a physically independent and highly reliable system environment
according to the scale of business.
Oracle VM Server for SPARC
•You can have an independent OS run on domains by configuring virtual hardware
environments (domains) in the firmware layer of a server.
Oracle Solaris Zone
•You can virtually divide the OS into zones and flexibly use the zones according to your
business.
1. Understanding an Overview of the System
You can flexibly configure a system by selecting from the following
three choices for a virtual environment, according to your business:
physical partition, Oracle VM Server for SPARC, and Oracle Solaris Zone.
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▍Types of Virtualization Functions
•A wide variety of virtualization functions can achieve high reliability and flexibility in an
optimal balance.
•You can flexibly configure a system, such as one emphasizing isolation or resource
availability.
1. Understanding an Overview of the System
Hardware layer Hypervisor layer OS layer (Independent kernel)
Oracle Solaris Zone
(All SPARC M12 models)
Divided
in Layers
Physical partition
(SPARC M12-2S)
Function
Name
(Target Model)
Configuration
Diagram
Feature Strong failure isolation High flexibility (Resource availability)
Oracle VM Server for SPARC
(All SPARC M12 models)
Job A Job B Job A Job A Job BJob B
OS OS OS OS
Firmware Firmware
Hardware
resources
Hardware
resources Hardware resources
Firmware
Hardware resources
Firmware
OS
Job A Job B
Firmware
Hardware resources
OS
Zone Zone
Kernel zone Kernel zone
OS layer (Shared kernel)
Can be isolated in units of application (*1)
Can be isolated in units of OS (*1)
Can be isolated in units of hardware (*1)
Failure
Resistance
*1 This can limit the scope of a failure by stopping or isolating the respective unit where the failure occurred.
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1.2.4 Reliability
1. Understanding an Overview of the System
The SPARC M12 is equipped with data protection, redundancy,
dynamic degradation, and other such high-reliability technologies.
Hardware as whole
■Dual power feed
■Redundant configuration of LAN
(by Oracle Solaris functions)
CPU
■Dynamic degradation of CPU
(in units of cache ways or CPU cores)
■●RAS functions (ECC, parity, retry, etc.)
PCIe card
■Redundant configuration
(when in multipath configuration)
*1 For an HDD, it is when a software RAID/hardware RAID is configured. For an SSD, it is when a software RAID is configured.
XSCF
■●Log collection
■●Monitoring function
Legend:
■Technology minimizing
shutdowns due to failure
●Technology minimizing
maintenance shutdowns
Memory
■Memory mirror
■Memory patrol
■Dynamic degradation of
memory (in units of pages)
■Extended ECC
Fan unit
■Redundant configuration
●Active replacement
Built-in storage
■Redundant configuration
(when RAID (*1) is configured)
●Active replacement (when
RAID (*1) is configured)
Power supply unit
■Redundant configuration
●Active replacement
▍SPARC M12-1
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1. Understanding an Overview of the System
Fan unit
■Redundant configuration
●Active replacement
Hardware as whole
■Protection between CPUs by CRC (*1)
■Dual power feed
■Redundant configuration of pump
■XSCF unit, console path, and path between domain and XSCF:
Redundant configuration (in SPARC M12-2S 2BB configuration
or larger)
■Redundant configuration of LAN (by Oracle Solaris functions)
■Redundant configuration of SAS controller
●Active addition and removal of SPARC M12-2S
Memory
■Memory mirror
■Memory patrol
■Dynamic degradation of memory
(in units of pages)
■Extended ECC
Built-in storage
■Redundant configuration
(when RAID (*2) is configured)
●Active replacement
(when RAID (*2) is configured)
PCIe card
■Redundant configuration
(when in multipath configuration)
●Active replacement
*1 Stands for Cyclic Redundancy Check.
The function mainly checks for errors in serial interface access such as reading or writing.
*2 For an HDD, it is when a software RAID/hardware RAID is configured. For an SSD, it is when a software RAID is configured.
Power supply unit
■Redundant configuration
●Active replacement
XSCF
■●Log collection
■●Monitoring function
●Active replacement
(XSCF unit in SPARC M12-2S
2BB configuration or larger)
Legend:
■Technology minimizing
shutdowns due to failure
●Technology minimizing
maintenance shutdowns
NEW
NEW
CPU
■Dynamic degradation of CPU
(in units of cache ways or CPU cores)
■●RAS functions (ECC, parity, retry, etc.)
▍SPARC M12-2/M12-2S
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Active addition and removal of the SPARC M12-2S
•In a building block configuration connecting multiple SPARC M12-2S units, you can expand and
reduce hardware without stopping the system.
Active replacement of the XSCF unit (in the SPARC M12-2S 2BB configuration
or larger)
•In a building block configuration, you can replace the XSCF unit without stopping the system.
Redundant configuration of the SAS controller
•The SPARC M12-2/M12-2S further improves reliability by the duplication of disks via different SAS
controllers with a software RAID.
1. Understanding an Overview of the System
The SPARC M12 supports active addition and removal of hardware and newly supports
other methods, such as active replacement of the XSCF unit.
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1.2.5 Safety
Integrated security facility for system protection
•The SPARC M12 supports the security functions provided by Oracle Solaris, such as ZFS and
verified boot.
Data encryption function of the Oracle Solaris ZFS file system
•You can encrypt (encode) business data and file system metadata by using the encryption framework
of Oracle Solaris.
Encryption function of Software On Chip (SWoC) (*1)
•The function is capable of high-speed encryption without using a dedicated adapter for encryption
processing, so there is neither an additional cost nor performance degradation.
1. Understanding an Overview of the System
You can configure a highly reliable and secure system environment
by using Oracle Solaris.
The SPARC64 XII processor is equipped with an encryption function.
*1 The SPARC64 XII processor is equipped with SWoC.
Oracle Solaris
Application
Software On Chip encryption
ZFS data encryption
Secure system
environment
with Oracle Solaris
- 16 -

1.2.6 Ecology
Power Capping function that sets an upper limit on power consumption
•The function can set an upper limit on system power consumption according to the customer's electric
power conditions.
•After exceeding the set value and a certain period of time (grace period) has elapsed, the system is
suppressed to the maximum power consumption, with the frequency automatically controlled.
Power Saving function that suppresses the power consumption of hardware that
has a low usage rate
•The function suppresses operation of hardware that has a low usage rate and reduces power
consumption by switching to power saving mode.
1. Understanding an Overview of the System
The power savings of the device have been achieved with a new implementation
technology. The SPARC M12 supports low power consumption to save energy through
power-saving design and energy-saving management.
Grace period
Power Capping
setting value
Electric power
Time
Power consumption
at normal times
Power consumption when
Power Capping enabled
- 17 -

2. External Views of the Chassis
This chapter shows external views of the chassis for each model.

2.1 SPARC M12-1
2. External Views of the Chassis
Front view Rear view
Disk drive
Operation panel
USB port POWER switch
Mode switch Power supply unit
XSCF-LAN port
SAS port
10GbE LAN port
PCI Express slot
USB port
XSCF USB port
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