Intel BX80580Q9400 - Core 2 Quad 2.66 GHz... User manual

Document Number: 320503-001
Intel®CoreTM 2 Duo Processor
and Intel®GS45 Express Chipset
(with DDR3 System Memory)
Development Kit User’s Manual
September 2008

2 Development Kit User’s Manual
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Development Kit User’s Manual 3
Contents
1About This Manual ............................................................................................8
1.1 Content Overview...................................................................................8
1.2 Text Conventions ...................................................................................9
1.3 Glossary of Terms and Acronyms............................................................10
1.4 Development Kit Technical Support.........................................................14
1.4.1 Online Support........................................................................14
1.4.2 Additional Technical Support .....................................................14
1.5 Related Documents...............................................................................15
1.5.1 Ordering Hard Copies of Documents...........................................15
2Getting Started...............................................................................................17
2.1 Overview ............................................................................................17
2.2 Development Kit Contents .....................................................................17
2.3 Additional Required Hardware (Not Included in the Development Kit)...........18
2.4 Additional Required Software (Not included in the Development Kit) ............19
2.5 Workspace Preparation..........................................................................20
2.6 System Setup and Power-Up..................................................................21
2.6.1 Using the AC to DC Power Supply (Mobile Power Mode) ................22
2.7 Power Down ........................................................................................23
2.8 System BIOS .......................................................................................23
2.8.1 Configuring the BIOS ...............................................................23
2.8.2 Programming BIOS Using a Bootable USB Device.........................24
3Development Board Features ............................................................................26
3.1 Block Diagram .....................................................................................26
3.2 Mechanical Form Factor.........................................................................26
3.3 Development Board Key Features ...........................................................26
3.4 Software Key Features ..........................................................................30
3.4.1 AMI BIOS ...............................................................................30
3.5 Thermal Management ...........................................................................31
3.6 System Features and Operation..............................................................31
3.6.1 Processor Support ...................................................................31
3.6.2 Processor Voltage Regulators ....................................................32
3.6.3 Front-Side Bus (FSB) ...............................................................32
3.6.4 Processor Power Management ...................................................32
3.6.5 Processor Active Cooling...........................................................32
3.6.6 Manual Processor Voltage ID (VID) Support ................................32
3.6.7 Chipset ..................................................................................33
3.6.8 System Memory ......................................................................33
3.6.9 Video Display..........................................................................34
3.6.10 PCIe Slots ..............................................................................34
3.6.11 PCI Slots................................................................................35
3.6.12 On-Board LAN.........................................................................35
3.6.13 Serial Peripheral Interface (SPI) ................................................36
3.6.14 Soft Audio/Soft Modem ............................................................36

4 Development Kit User’s Manual
3.6.15 SATA Storage .........................................................................36
3.6.16 USB Connectors ......................................................................37
3.6.17 LPC Super I/O (SIO)/LPC Slot ...................................................38
3.6.18 Serial, IrDA ............................................................................38
3.6.19 Intel® 82802 Firmware Hub Device Support ...............................38
3.6.20 System Management Controller (SMC)/Keyboard Controller (KBC)..39
3.6.21 Clocks ...................................................................................39
3.6.22 Real Time Clock ......................................................................39
3.6.23 Thermal Monitoring .................................................................39
3.6.24 Power Supply Solution .............................................................40
3.6.25 Manual VID support for Graphics VR...........................................40
3.6.26 Debug Interfaces.....................................................................41
3.6.27 Board Form-Factor ..................................................................41
3.7 Power Management ..............................................................................41
3.7.1 Power Management States........................................................41
3.8 Testability ...........................................................................................42
3.9 Power Measurement Support..................................................................42
3.10 Power Supply Usage and Recommendation ..............................................47
4Development Board Physical Reference ..............................................................48
4.1 Board Components ...............................................................................48
4.2 Connectors..........................................................................................51
4.2.1 Back Panel Connectors .............................................................51
4.3 Configuration Settings...........................................................................53
4.3.1 Configuration Jumpers/Switches ................................................53
4.3.2 BSEL Jumper Settings ..............................................................56
4.4 Power and Reset Push Buttons ...............................................................56
4.5 Net Detect Button ................................................................................57
4.6 LEDs ..................................................................................................58
4.7 Other Headers .....................................................................................59
4.7.1 H8 Programming Headers.........................................................59
4.7.2 Sideband and Test Headers.......................................................60
Appendix A Add-In Cards..................................................................................................61
A.1 Port 80-83 Add-in Card (Included) ..........................................................61
A.2 PCI Expansion Card (Thimble Peak 2) (Included) ......................................62
A.3 HDMI and Display Port Video Interface Add-In Card (Eaglemont) (Included) .62
A.3.1 Rework to change Eaglemont Card from HDMI to Display Port........63
A.3.2 AUX Pull Down Rework.............................................................65
A.4 Intel® High Definition Audio Interposer Card (Mott Canyon 4) (Not Included)66
A.4.1 Mott Canyon 4 Jumper Settings .................................................67
A.5 ExpressCard Module Interposer (Duck Bay 3) (Not Included) ......................69
A.6 PCI Express mini card Interposer (Upham IV) (Not Included)......................70
A.7 Docking Connector Card (Saddlestring II) (Not Included) ...........................71
Appendix B Rework Instructions ........................................................................................74
B.1 Internal HDMI Enabling .........................................................................74
B.2 Enabling the Integrated Trusted Platform Module (iTPM) ............................74
B.3 Enabling External HDMI.........................................................................75
B.4 Support for Upham 4 ............................................................................75
B.5 Low Voltage High-Definition (HD) Audio Rework .......................................75

Development Kit User’s Manual 5
Appendix C Programming System BIOS Using a Flash Programming Device .............................77
Appendix D CPU Thermal Solution (Heatsink) Installation ......................................................78
Figures
Figure 1. Fern Hill Block Diagram ......................................................................26
Figure 2. Fern Hill Development Board Components .............................................49
Figure 3. Back Panel Connectors .......................................................................51
Figure 4. D-Connector to Component Video Cable................................................52
Figure 5. D-Connector to Composite Video Cable .................................................52
Figure 6. D-Connector to S-Video Cable .............................................................52
Figure 7. Location of the Configuration Jumpers/Switches .....................................53
Figure 8. Power On and Reset Buttons ...............................................................57
Figure 9. Net Detect Button ..............................................................................57
Figure 10. Port 80-83 Interposer Card................................................................61
Figure 11. PCI Expansion Card (Thimble Peak 2) .................................................62
Figure 12. Eaglemont Add-in Card .....................................................................63
Figure 13. Location of Resistors for Rework (before Rework) .................................64
Figure 14. Location of Resistors for Rework (after Rework)....................................64
Figure 15. Location of Resistors for Rework.........................................................65
Figure 16. AUX Pull-Down Rework .....................................................................66
Figure 17. Mott Canyon 4 Interposer Card ..........................................................67
Figure 18. Duck Bay 3 Interposer Card...............................................................69
Figure 19. Upham IV Interposer Card.................................................................70
Figure 20. Saddlestring II Docking Connector......................................................72
Figure 21. iHDMI Rework Instruction 1...............................................................74
Figure 22. iHDMI Rework Instruction 2...............................................................74
Figure 23. Low Voltage HD Audio Rework (Always Rail) ........................................75
Figure 24. Low Voltage HD Audio Rework (Sus Rail).............................................76
Figure 25. Step 4 - Backplate Pins .....................................................................79
Figure 26. Step 6 - Applying the Thermal Grease.................................................80
Figure 27. Step 7 - Squeezing Activation Arm .....................................................81
Figure 28. Step 8 - Installing the Heatsink..........................................................82
Figure 29. Step 9 - Plugging in the Fan ..............................................................83
Figure 30. Step 10 - Completed Assembly ..........................................................84

6 Development Kit User’s Manual
Tables
Table 1. Text Conventions ..................................................................................9
Table 2. Definitions of Terms ............................................................................10
Table 3. Acronyms .........................................................................................11
Table 4. Related Documents .............................................................................15
Table 5. Intel Literature Centers........................................................................15
Table 6. Fern Hill Feature Set Summary .............................................................27
Table 7. TV–Out Connections ............................................................................34
Table 8. PCI Express Ports................................................................................35
Table 9. Selection of I/O Voltage for the High Definition Audio...............................36
Table 10. SATA Ports.......................................................................................37
Table 11. USB Ports mapping............................................................................38
Table 12. System Power Management States ......................................................41
Table 13. System Power Management M-States...................................................42
Table 14. Digital Multi-Meter Comparison ...........................................................43
Table 15. System Voltage Rails .........................................................................43
Table 16. Development Board Components.........................................................50
Table 17. Configuration Jumpers and Switches Settings........................................54
Table 18. BSEL Jumper Settings........................................................................56
Table 19. Power-On and Reset Push buttons .......................................................56
Table 20. LEDs ...............................................................................................58
Table 21. H8 Programming Jumpers ..................................................................60
Table 22. Mott Canyon 4 Configuration Jumper/Switches Settings ..........................68
Table 23. Upham IV default Jumper/Switches Settings .........................................71
Table 24. Board Rework to Support Display Port on Saddlestring ...........................73

Development Kit User’s Manual 7
Revision History
Document
Number Revision Number Description Revision Date
320503 001 Public launch release Sept. 2008
§

About This Manual
8 Development Kit User’s Manual
1About This Manual
This user’s manual describes the use of the Intel®CoreTM 2 Duo Processor (LV and
ULV) and Intel®GS45 Express Chipset development kit with DDR3 SDRAM system
memory. This manual has been written for OEMs, system evaluators, and embedded
system developers. This document defines all jumpers, headers, LED functions, and
their locations on the development board, along with features of the board’s
subsystems. This manual assumes basic familiarity with installing and configuring
hardware and software in a personal computer system.
The differences between the Fern Hill (GS45, DDR3), Pillar Rock (GM45, DDR2) and
Silver Cascade (GM45, DDR3) User Manuals are in these sections:
•System Memory Section 3.6.8
•Development Board Feature Set Summary Table (Table 6)
•Configuration Jumpers and Switches Settings Table (Table 17),
•BSEL Jumper Settings Table (Table 18)
All other components and references are the same between boards.
For the latest information about the Intel®CoreTM 2 Duo processor and Intel®GS45
Express Chipset Development Kit, visit:
http://developer.intel.com/design/intarch/devkits/index.htm
For design documents related to the Intel®CoreTM 2 Duo processor and Intel®GS45
Express Chipset please visit:
Processor: http://developer.intel.com/design/intarch/core2duo/tech_docs.htm
Chipset: http://www.intel.com/products/embedded/chipsets.htm
1.1 Content Overview
Chapter 1.0, “About This Manual” — This chapter contains a description of conventions
used in this manual. The last few sections explain how to obtain literature and contact
customer support.
Chapter 2.0, “Getting Started”— Describes the contents of the development kit. This
chapter explains the basics steps necessary to get the board running. This chapter
also includes information on how to update the BIOS.
Chapter 3.0, “Development Board Features” — This chapter provides details on the
hardware features of the development board. It explains the Power Management and
Testability features.

About This Manual
Development Kit User’s Manual 9
Chapter 4.0, “Development Board Physical Reference”— This chapter provides a list of
major board components and connectors. It gives a description of jumper settings
and functions. The chapter also explains the use of the programming headers.
Appendix A, “Add-In Cards” – This appendix contains information on add-in cards
available from Intel that can be used with the development board.
Appendix B, “Rework Instructions” – This appendix contains rework instructions for
the development board and for some of the add-in cards to enable additional
supported features and functionality.
Appendix C, “Programming System BIOS Using a Flash Programming Device” — This
appendix provides step by step instructions on programming the flash using a flash
programming device
Appendix D, “CPU Thermal Solution (Heatsink) Installation Instructions” — This
appendix gives detailed installation instructions for the Intel®CoreTM 2 Duo processor
heatsink.
1.2 Text Conventions
The notations listed in Table 1 may be used throughout this manual.
Table 1. Text Conventions
Notation Definition
# The pound symbol (#) appended to a signal name indicates that the signal
is active low. (e.g., PRSNT1#)
Variables Variables are shown in italics. Variables must be replaced with correct
values.
Instructions Instruction mnemonics are shown in uppercase. When you are
programming, instructions are not case-sensitive. You may use either
uppercase or lowercase.
Numbers Hexadecimal numbers are represented by a string of hexadecimal digits
followed by the character H. A zero prefix is added to numbers that begin
with A through F. (For example, FF is shown as 0FFH.) Decimal and binary
numbers are represented by their customary notations. (That is, 255 is a
decimal number and 1111 is a binary number. In some cases, the letter B
is added for clarity.)
Units of Measure
A
GByte
KByte
KΩ
mA
MByte
MHz
ms
mW
ns
pF
W
The following abbreviations are used to represent units of measure:
amps, amperes
gigabytes
kilobytes
kilo-ohms
milliamps, milliamperes
megabytes
megahertz
milliseconds
milliwatts
nanoseconds
picofarads
watts

About This Manual
10 Development Kit User’s Manual
Notation Definition
V
µA
µF
µs
µW
volts
microamps, microamperes
microfarads
microseconds
microwatts
Signal Names Signal names are shown in uppercase. When several signals share a
common name, an individual signal is represented by the signal name
followed by a number, while the group is represented by the signal name
followed by a variable (n). For example, the lower chip-select signals are
named CS0#, CS1#, CS2#, and so on; they are collectively called CSn#.
A pound symbol (#) appended to a signal name identifies an active-low
signal. Port pins are represented by the port abbreviation, a period, and
the pin number (e.g., P1.0).
1.3 Glossary of Terms and Acronyms
Table 2 defines terms used in this document.
Table 2. Definitions of Terms
Term/Acronym Definition
Assisted Gunning
Transceiver Logic+
The front-side bus uses a bus technology called AGTL+, or Assisted
Gunning Transceiver Logic. AGTL+ buffers are open-drain, and require
pull-up resistors to provide the high logic level and termination. AGTL+
output buffers differ from GTL+ buffers with the addition of an active
pMOS pull-up transistor to assist the pull-up resistors during the first clock
of a low-to-high voltage transition.
Asynchronous
GTL+
The processor does not utilize CMOS voltage levels on any signals that
connect to the processor. As a result, legacy input signals such as A20M#,
IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, PWRGOOD, SMI#, SLP#, and
STPCLK# utilize GTL+ input buffers. Legacy output signals (FERR# and
IERR#) and non-AGTL+ signals (THERMTRIP# and PROCHOT#) also
utilize GTL+ output buffers. All of these signals follow the same DC
requirements as AGTL+ signals, however the outputs are not actively
driven high (during a logical 0 to 1 transition) by the processor (the major
difference between GTL+ and AGTL+). These signals do not have setup or
hold time specifications in relation to BCLK[1:0], and are therefore
referred to as “Asynchronous GTL+ Signals”. However, all of the
Asynchronous GTL+ signals are required to be asserted for at least two
BCLKs in order for the processor to recognize them.
Fern Hill The name of the development board that uses Intel®Core™ 2 Duo
processor SU9400 or SL9400 with the Mobile Intel GS45 Express Chipset
(Small Form Factor) and DDR3 SDRAM
Infrared Data
Assoc.
The Infrared Data Association (IrDA) has outlined a specification for serial
communication between two devices via a bi-directional infrared data
port. The development board has such a port and it is located on the rear
of the board between the two USB connectors.
IMVP6+ The Intel Mobile Voltage Positioning specification for the Intel® Core™ 2
Duo Processor. It is a DC-DC converter module that supplies the required
voltage and current to a single processor.