iWave iW-RainboW-G40M Installation manual

i.MX 8M Plus OSM-LF LGA Module Hardware User Guide
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iW-RainboW-G40M
i.MX 8M Plus Quad/Quad Lite/Dual
OSM-Size LF LGA Module
Hardware User Guide

i.MX 8M Plus OSM-LF LGA Module Hardware User Guide
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Document Revision History
Document Number
iW-PRGLZ-UM-01-R2.0-REL0.3-Hardware
Revision
Date
Description
0.1
6thDec 2021
Draft Release Version
0.2
22nd Jul 2021
•Updated Table of Contents
•Updated Block diagram
Table contents and typos updated
0.3
23rd May 2023
Updated Release
PROPRIETARY NOTICE: This document contains proprietary material for the sole use of the intended recipient(s). Do
not read this document if you are not the intended recipient. Any review, use, distribution or disclosure by others is
strictly prohibited. If you are not the intended recipient (or authorized to receive for the recipient), you are hereby
notified that any disclosure, copying distribution or use of any of the information contained within this document is
STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.”

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Disclaimer
iWave Systems reserves the right to change details in this publication including but not limited to any Product
specification without notice.
No warranty of accuracy is given concerning the contents of the information contained in this publication. To the
extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by iWave
Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or
inaccuracies in this document.
SoC and other major components used in this product may have several silicon errata associated with it. Under no
circumstances, iWave Systems shall be liable for the silicon errata and associated issues.
Trademarks
All registered trademarks, product names mentioned in this publication are the property of their respective owners
and used for identification purposes only.
Certification
iWave Systems Technologies Pvt. Ltd. is an ISO 9001:2015 Certified Company.
Warranty & RMA
Warranty support for Hardware: 1 Year from iWave or iWave's EMS partner.
For warranty terms, go through the below web link,
http://www.iwavesystems.com/support/warranty.html
For Return Merchandise Authorization (RMA), go through the below web link,
http://www.iwavesystems.com/support/rma.html
Technical Support
iWave Systems technical support team is committed to provide the best possible support for our customers so that
our Hardware and Software can be easily migrated and used.
For assistance, contact our Technical Support team at,
Email : [e-mail]
Website : www.iwavesystems.com
Address : iWave Systems Technologies Pvt. Ltd.
# 7/B, 29th Main, BTM Layout 2nd Stage,
Bengaluru, Karnataka,
India –560076

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Table of Contents
1. INTRODUCTION ..................................................................................................................................................7
1.1 Purpose.......................................................................................................................................................7
1.2 OSM LGA Module Overview.........................................................................................................................7
1.3 List of Acronyms ..........................................................................................................................................7
1.4 Terminology Description..............................................................................................................................9
1.5 References...................................................................................................................................................9
1.6 Important Note..........................................................................................................................................10
2. ARCHITECTURE AND DESIGN ............................................................................................................................11
2.1 i.MX 8M Plus OSM LGA Module Block Diagram..........................................................................................11
2.2 i.MX 8M Plus OSM Features.......................................................................................................................12
2.3 i.MX 8M Plus SoC.......................................................................................................................................14
2.4 PCA9450C PMIC.........................................................................................................................................15
2.5 Memory.....................................................................................................................................................16
2.5.1 LPDDR4 RAM .........................................................................................................................................16
2.5.2 eMMC Flash...........................................................................................................................................16
2.6 Network and Communiation......................................................................................................................17
2.6.1 Wi-Fi and Bluetooth Interface ................................................................................................................17
2.6.2 RTC Controller........................................................................................................................................18
2.7 OSM LGA Contacts.....................................................................................................................................19
2.7.1 RGMII Interface......................................................................................................................................37
2.7.2 USB3.0 OTG Interface ............................................................................................................................38
2.7.3 USB3.0 Host Interface ............................................................................................................................39
2.7.4 USB 2.0 Host Interface ...........................................................................................................................40
2.7.5 PCIe Interface ........................................................................................................................................41
2.7.6 MIPI CSI Interface...................................................................................................................................42
2.7.7 HDMI TX Interface..................................................................................................................................44
2.7.8 LVDS Display Interface ...........................................................................................................................45
2.7.9 MIPI DSI Interface ..................................................................................................................................46
2.7.10 Audio Interface ......................................................................................................................................47
2.7.11 SPI Interface...........................................................................................................................................47
2.7.12 Data UART.............................................................................................................................................48
2.7.13 SD Interface ...........................................................................................................................................49
2.7.14 CAN Interface.........................................................................................................................................50
2.7.15 I2C Interface ..........................................................................................................................................51
2.7.16 JTAG Interface........................................................................................................................................52
2.7.17 OSM GPIOs ............................................................................................................................................52
2.7.18 Control Signals.......................................................................................................................................53
2.7.19 Boot Select.............................................................................................................................................54
2.7.20 Power and GND .....................................................................................................................................54
2.8 Other Features ..........................................................................................................................................56
2.8.1 FORCE_RECOV# .....................................................................................................................................56

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2.8.2 Programming Header.............................................................................................................................56
2.9 i.MX 8M Plus Pin Multiplexing on OSM LGA ...............................................................................................58
3. TECHNICAL SPECIFICATION...............................................................................................................................65
3.1 Electrical Characteristics............................................................................................................................65
3.1.1 Power Input Requirement ......................................................................................................................65
3.1.2 Power Input Sequencing.........................................................................................................................66
3.1.3 Power Consumption...............................................................................................................................67
3.2 Environmental Characteristics ...................................................................................................................69
3.2.1 Environmental Specification...................................................................................................................69
3.2.2 Heat Sink ...............................................................................................................................................69
3.2.3 RoHS Compliance...................................................................................................................................70
3.2.4 Electrostatic Discharge...........................................................................................................................70
3.3 Mechanical Characteristics ........................................................................................................................71
3.3.1 i.MX 8M Plus OSM LGA Module Mechanical Dimensions ........................................................................71
4. ORDERING INFORMATION................................................................................................................................72
5. APPENDIX-I.......................................................................................................................................................73
5.1 i.MX 8M Plus Pico ITX SBC..........................................................................................................................73
6. APPENDIX-II......................................................................................................................................................74
6.1 Design and Assembly recommendations....................................................................................................74

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List of Figures
Figure 1: i.MX 8M Plus OSM-LF LGA Module Block Diagram ......................................................................................11
Figure 2: i.MX 8M Plus Block Diagram .......................................................................................................................14
Figure 3: Wi-Fi and Bluetooth Antenna Connector ....................................................................................................18
Figure 4: OSM LGA Contacts......................................................................................................................................19
Figure 5: FORCE_RECOV# Push button ......................................................................................................................56
Figure 6: Programming Header .................................................................................................................................57
Figure 7: Power Input Sequencing.............................................................................................................................66
Figure 8: Mechanical dimension of heat Sink.............................................................................................................70
Figure 9: Mechanical dimensions of i.MX 8M Plus OSM LGA Module.........................................................................71
Figure 10: i.MX 8M Plus Pico ITX SBC.........................................................................................................................73
Figure 11: Dimensions of Mounting holes in the Carrier Board..................................................................................74
List of Tables
Table 1: Acronyms & Abbreviations.............................................................................................................................7
Table 2: Terminology ..................................................................................................................................................9
Table 3: i.MX 8M Plus OSM LGA Module Pinouts.......................................................................................................20
Table 4: Programming header Pin assignment...........................................................................................................57
Table 5: i.MX 8M Plus SoC IOMUX for OSM interfaces...............................................................................................58
Table 6: Power Input Requirement............................................................................................................................65
Table 7: Power Consumption ....................................................................................................................................67
Table 8: Environmental Specification ........................................................................................................................69
Table 9: Orderable Product Part Numbers.................................................................................................................72

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1. INTRODUCTION
1.1 Purpose
This document is the Hardware User Guide for the NXP’s i.MX 8M Plus (Quad/Quad Lite/Dual) Application processor
based OSM V1.0 specification compatible LGA module. This board is fully supported by iWave Systems Technologies
Pvt. Ltd. This Guide provides detailed information on the overall design and usage of the i.MX 8M Plus OSM Module
from a Hardware Systems perspective.
1.2 OSM LGA Module Overview
The OSM V1.0 (“Open Standard Modules™”) is a future proof and versatile standard for small size, low-cost embedded
computer modules. Combining the following key characteristics like completely machine processible during soldering,
assembly and testing, LGA package for direct PCB soldering without connector.
The OSM Module definition targeting application that requires low costs, and high performance. The Modules are
used as building blocks for portable and stationary embedded systems. The core SoC and support circuits, including
DRAM, boot flash, power sequencing, SoC power supplies are concentrated on the Module. The Modules are used
with application specific Carrier Boards that implement other features such as audio CODECs, touch controllers,
wireless devices, etc. The modular approach allows scalability, fast time to market and upgradability while still
maintaining low costs, low power and small physical size.
NXP’s i.MX 8M Plus SoC based OSM LGA Module is rich with i.MX 8M Plus features along with on-Board LPDDR4,
eMMC, USB2.0 Hub, Wi-Fi and BT module and comes in compact 45mm x 45mm form factor (Size L). The Module PCB
has 662 contacts which can be mounted as LGA on carrier card.
1.3 List of Acronyms
The following acronyms will be used throughout this document.
Table 1: Acronyms & Abbreviations
Acronyms
Abbreviations
ARM
Advanced RISC Machine
BT
Bluetooth
CAN
Controller Area Network
CODEC
Coder-Decoder
CPU
Central Processing Unit
CSI
Camera Serial Interface
CTS
Clear to Send
DRAM
Dynamic Random Access Memory
DSI
Display Serial Interface
eMMC
Enhanced Multi Media Card

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Acronyms
Abbreviations
FLEXCAN
Flexible Control Area Network
FlexSPI
Flexible Serial Peripheral Interface
GB
Giga Byte
Gbps
Gigabits per sec
GPIO
General Purpose Input Output
GPU
Graphics Processing Unit
HDCP
High-bandwidth Digital Content Protection
HDMI
High-Definition Multimedia Interface
I2C
Inter-Integrated Circuit
I2S
Inter-Integrated Sound
IC
Integrated Circuit
JTAG
Joint Test Action Group
LPDDR4
Low Power Double Data Rate4
LGA
Land Grid Array
MHz
Mega Hertz
MIPI
Mobile Industry Processor Interface
OSM
Open Standard Module
OTG
On-The-Go
PCB
Printed Circuit Board
PCIe
Peripheral Component Interconnect express
PMIC
Power management integrated circuits
RAM
Random Access Memory
RGMI
Reduced gigabit media-independent interface
RoHS
Restriction of Hazardous Substances
RTC
Real Time Clock
RTS
Request to Send
SAI
Serial Audio Interface
SATA
Serial Advanced Technology Attachment
SD
Secure Digital
SDIO
Secure Digital Input Output
SoC
System on Chip
SPDIF
The Sony/Philips Digital Interface
SPI
Serial Peripheral Interface
UART
Universal Asynchronous Receiver/Transmitter
USB
Universal Serial Bus
VPU
Video Processing Unit
Wi-Fi
Wireless Fidelity

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1.4 Terminology Description
In this document, wherever Signal Type is mentioned, below terminology is used.
Table 2: Terminology
Terminology
Description
I
Input Signal
O
Output Signal
IO
Bidirectional Input/output Signal
CMOS
Complementary Metal Oxide Semiconductor Signal
HCSL
High speed Current Steering Logic
LVDS
Low Voltage Differential Signal
HDMI
High-Definition Multimedia Interface Differential Signal
DP
Display Port Differential Signal
GBE
Gigabit Ethernet Signal
PCIe
PCIe differential pair signals
SATA
Serial Advanced Technology Attachment differential pair signals
USB HS
Universal Serial Bus High Speed differential pair signals
USB SS
Universal Serial Bus Super Speed differential pair signals
MIPI
Mobile Industry Processor Interface differential pair signals
OD
Open Drain Signal
OC
Open Collector Signal
Power
Power Pin
PU
Pull Up
PD
Pull Down
NA
Not Applicable
NC
Not Connected
Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and only includes
the pull-ups or pull-downs implemented On-OSM.
1.5 References
•IMX8MPxEC_Rev_x.pdf
•iMX_8M_Plus_RM_Revx.pdf
•OSM Specification V1.0

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1.6 Important Note
In this document, wherever i.MX 8M Plus SoC signal name is mentioned, it is followed as per below format for easy
understanding.
•If SoC pin doesn’t have multiplexing option or used for dedicated functionality then the signal name is
mentioned as functionality name.
“Functionality Name”
Example: ENET1_RGMII_TXC
In this signal, ENET1_RGMII_TXC pad is used for same functionality.
•If SoC pin selected as GPIO function, then the signal name is mentioned as
“Functionality Description (GPIO Number)”
Example: BCONFIG_0(GPIO1_05)
In this signal, BCONFIG_0 is the GPIO functionality and GPIO1_05 is the GPIO number.
Note: The above naming is not applicable for other signals which are not connected to SoC.

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2. ARCHITECTURE AND DESIGN
This section provides detailed information about i.MX 8M Plus OSM-LF LGA Module and Hardware architecture with
high level block diagram.
2.1 i.MX 8M Plus OSM LGA Module Block Diagram
iWave Systems Technologies Pvt. Ltd.
[e-mail]
i.MX 8M Plus
RGMII x 2
LPDDR4(32bit)
LPDDR4-2GB
(Upgradable) ENET1,
ENET_QOS
USB2_3.0 USB3.0 x 1
DDRC
MMC (8bit)
eMMC –16GB
(Upgradable) uSDHC3
I2C
RTC Controller
USB2_2.0
uSDHC1
WiFi-BT
Module
UART1
PMIC
UART x 1
MIPI DSI x 1
SAI3
SAI
iW-RainboW-G40M-i.MX 8M Plus OSM Block Diagram
USB2.0
1:4 Hub
USB2.0 x 1
eCSPI1,
eCSPI2
MIPI_DSI
HDMI x 1
UART4 Debug UART x 1
I2C1
Boot mode
USB[0]
SD1 (4bit)
USB[2]
Wi-Fi
ANT Conn.
HDMI
USB[1]
SPI x 2
LVDS0,
LVDS1 LVDS0 x 2
JTAG JTAG x 1
OSM BGA
Balls
USB3.1 x 1
USB1_2.0,
USB1_3.0
USB[3]
PCIe PCIe x 1
uSDHC2 SDIO x 1
MIPI CSI0,
MIPI CSI1* MIPI CSI x 2
CAN1,
CAN2 CAN x 2
I2C2,
I2C3 I2C x 2
SAI5 I2S x 1
UART2,
UART3, UART x 2
GPIO GPIO x 16
uSDHC1
UART1
GPIO
uSDHC1
UART1
ANT_MAIN
ANT_MAIN
Power to
Peripherals
5V
On-Board
Regulators
PWM PWM x 4
Boot mode
WL_PCIe x 1
WL_PCIe x 1
BT
ANT Conn.
ANT_AUX
*Supported through Vendor Defined pins.
Figure 1: i.MX 8M Plus OSM-LF LGA Module Block Diagram

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2.2 i.MX 8M Plus OSM Features
i.MX 8M Plus OSM LGA Module supports the following features.
SoC
•i.MX 8M Plus Applications Processor1
oi.MX 8M Plus Quad : 4 x Cortex-A53, 1 x Cortex-M7, GPU, VPU, NPU, ISP & HiFi4 Audio DSP
oi.MX 8M Plus Quad Lite : 4 x Cortex-A53, 1 x Cortex-M7 & GPU
oi.MX 8M Plus Dual : 2 x Cortex-A53, 1 x Cortex-M7, GPU, VPU, NPU, ISP & HiFi4 Audio DSP
Power
•PCA9450C PMIC
Memory
•LPDDR4 - 2GB (Expandable up to 8GB)
•eMMC Flash - 16GB (Expandable)2
Other On-Board Features
•IEEE 802.11 a/b/g/n/ac/ax Wi-Fi & BT 5.0 (ax is optional)
•USB 2.0, 4-Port Hub
•RTC Controller
•Programming Header
OSM LGA Interfaces
•RGMII x 2
•SDIO x 1 (4-bit x 1)
•SDIO x 1 (8-bit x 1) (Optional)3
•USB 3.0 x 2
•USB 2.0 x 2
•PCIe Gen3 x 1
•HDMI 2.0 Transmitter x 1
•MIPI DSI 4 lane x 1
•LVDS x 2 Channel
•SAI/I2S (Audio Interface) x 1
•SPI x 2 Port
•Data UART (with CTS & RTS) x 2 (1 is optional) 4
•Data UART (without CTS & RTS) x 1
•Debug UART x 1
•OSM GPIOs

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•CAN FD x 2
•I2C x 2
General Specification
•Power Supply : 5V, 2.5A
•Form Factor : 45mm X 45mm (OSM V1.0 Specification)
1. There are six configurations of i.MX 8M Plus SoC supported by NXP, hence in this document i.MX 8M Plus
Q/QL/D/DL/S/SL is used to represent either of one based on SBC Part Number.
2. Memory Size will differ based on iWave’s OSM Product Part Number.
3. In default configuration, If on OSM Wi-Fi module is used, SD1 will not be supported on OSM LGA.
4. In default configuration, UART1 interface of i.MX 8M Plus is connected to on Board Bluetooth module. One more
UART with CTS and RTS can be supported, if Bluetooth is not supported.

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2.3 i.MX 8M Plus SoC
iW-RainboW-G40M OSM LGA Module can support i.MX 8M Plus SoCs from NXP. The i.MX 8M Plus Family consists of
three processors: i.MX 8M Plus Quad, i.MX 8M Plus Quad Lite and i.MX 8M Plus Dual. The major Difference between
i.MX 8M Plus SoCs are:
•i.MX 8M Plus Quad : 4 x Cortex-A53, 1 x Cortex-M7, GPU, VPU, NPU, ISP & HiFi4 Audio DSP
•i.MX 8M Plus Quad Lite : 4 x Cortex-A53, 1 x Cortex-M7 & GPU
•i.MX 8M Plus Dual : 2 x Cortex-A53, 1 x Cortex-M7, GPU, VPU, NPU, ISP & HiFi4 Audio DSP
The i.MX 8M Plus processors along with ARM core supports integrated NPU of 2.3 TOPs, OpenCL 1.2 GPU, Image Signal
Processor, 1080p60 video encode and decode capable VPU, 3 x display controllers, multiple display output options,
including MIPI_DSI, HDMI 2.0, and LVDS. Memory interfaces supporting LPDDR4, Quad SPI/Octal SPI (FlexSPI), eMMC
5.1, SD 3.0 and a wide range of peripheral I/Os such as PCIe Gen3 provide wide flexibility.
Figure 2: i.MX 8M Plus Block Diagram
Note: The i.MX 8M Plus processor offers numerous advanced features, please refer the latest i.MX 8M Plus Datasheet
and Reference Manual for Electrical characteristics and other information, which may be revised from time to time.

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2.4 PCA9450C PMIC
The i.MX 8M Plus OSM LGA Module uses one PCA9450C PMIC (U3) for module power management. The PCA9450C
features six high efficiency step-down regulators and five linear regulators. It is a high-performance power
management integrated circuit (PMIC) that provides a highly programmable/configurable architecture with fully
integrated power devices and built-in one-time programmable memory stores key start up configurations, drastically
reducing external components typically used to set output voltage and sequence of external regulators. Regulator
parameters are adjustable through high-speed I2C after start up offering flexibility for different system states. The
PCA9450C PMIC comes in 56pin 7x7 QFN package and is placed on the top side of the Module.

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2.5 Memory
2.5.1 LPDDR4 RAM
The i.MX 8M Plus OSM LGA Module supports 2GB LPDDR4 RAM memory by default using 32bit DDR_CH0 channel of
i.MX 8M Plus SoC to support LPDDR4 up to 2GHz. LPDDR4 part U12 is placed on top side of the Module. The RAM size
can be expandable up to maximum of 8GB (if chips are available). To customize the LPDDR4 memory size, contact
iWave.
2.5.2 eMMC Flash
The i.MX 8M Plus OSM LGA Module supports 16GB eMMC as default boot and storage device. This is directly
connected to uSDHC3 controller of the i.MX 8M Plus SoC and operates at 1.8V (I/O supply) and 3.3V (NAND core
supply) voltage levels.
The eMMC flash memory (U2) is physically located on top side of the Module. The memory size of the eMMC Flash
can be customised based on the requirement by contacting iWave Support Team.

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2.6 Network and Communiation
2.6.1 Wi-Fi and Bluetooth Interface
The i.MX 8M Plus OSM LGA Module is integrated with u-blox’s “JODY-W263” or “JODY-W374/JODY-W377” based Wi-
Fi and Bluetooth module. The JODY-W2 series are compact modules based on the NXP 88W8987 AEC-Q100 compliant
chipset and JODY-W3 series are based on the NXP 88W9098 chipset. They enable Wi-Fi, Bluetooth, and Bluetooth low
energy communication.
The JODY-W2 modules can be operated in the following modes:
• Wi-Fi 1x1 802.11a/b/g/n/ac in 2.4 GHz or 5 GHz.
• Dual-mode Bluetooth 5.2, including audio, can be operated fully simultaneous with Wi-Fi.
The JODY-W2 undergoes extended automotive qualification according to ISO 16750-4 and is manufactured in line with
ISO/TS 16949. Connection to a host processor is through SDIO, or High-Speed UART interfaces. The i.MX 8M Plus OSM
LGA Module uses processor’s UART1 interface for Bluetooth and USDHC3 interface for Wi-Fi in a default configuration.
The JODY-W3 modules can be operated in the following modes:
• Wi-Fi 1x1 802.11a/b/g/n/ac/ax in 2.4 GHz and 5 GHz.
• Concurrent Dual Wi-Fi operation with independent MACs, supporting simultaneous Wi-Fi network operation at
two different frequency bands.
• Dual-mode Bluetooth 5.3, can be operated fully simultaneous with Wi-Fi.
JODY-W3 modules undergo extended qualification testing in accordance with u-blox Qualification Policy based on AEC-
Q104 and are manufactured in line with ISO/TS 16949 AEC-Q104. Host processor connections are made through
various interfaces, including PCIe or SDIO for Wi-Fi and highspeed UART for Bluetooth. For 802.11ax, the i.MX 8M Plus
OSM LGA Module uses processor’s PCIe interface for Wi-Fi6.
In the OSM module, antenna pins of JODY-W2/W3 Bluetooth and Wi-Fi are connected to J1, J2 connectors and
optionally connected to A16th and A20th pin of OSM. J3 connector is optionally provided to support Bluetooth
independently in JODY-W3.
Note: In default configuration, 802.11ax (Wi-Fi 6) is not supported, but 802.11ax can be supported by changing Wi-Fi
module from JODY-W2 to JODY-W3 and some additional changes. Contact iWave Support Team for further information.

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Figure 3: Wi-Fi and Bluetooth Antenna Connector
Connector Part Number - : RECE-20449-001E-01 from Taoglas Limited / MM4829-2702RA4 from Murata.
Antenna Part Number - : FXP830.24.0100B from Taoglas Limited / 2042811100 from Molex.
2.6.2 RTC Controller
The i.MX 8M Plus OSM LGA Module by supports external RTC Controller “PCF85263” On-OSM for Real time clock
support. This external RTC Controller is connected to i.MX 8M Plus SoC through I2C3 Interface and operates at 1.8V
voltage level. In OSM power off condition, this device will take power from OSM ball #W17 (VRTC_3V0) coin cell power
and continues to keep the current time.

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2.7 OSM LGA Contacts
OSM LGA (J5) has standard pinout as per OSM Specification V1.0. The interfaces which are available at 662 contacts
are explained in the following sections.
Figure 4: OSM LGA Contacts
Number of contacts - : 662 (Size L)

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Table 3: i.MX 8M Plus OSM LGA Module Pinouts
OSM Pins
Signal
SIZE 0
M18
NC
N18
NC
U19
BOOT_SEL#
AB17
FLEXCAN1_RX(SAI5_RXD2)
AC17
FLEXCAN1_TX(SAI5_RXD1)
AB19
FLEXCAN2_RX(SAI5_MCLK)
AC19
FLEXCAN2_TX(SAI5_RXD3)
V17
CARRIER_PWR_ON
A15
GND
A16
OSM_ANT0
A17
GND
A18
GND
A19
GND
A20
OSM_ANT1
A21
GND
B15
GND
B16
GND
B17
GND
B18
GND
B19
GND
B20
GND
B21
GND
C15
NC
C17
NC
C19
NC
C21
NC
AC18
JTAG_MOD*
F15
NC
E16
NC
R15
ENET_QOS_RGMII_RXC
M15
ENET_QOS_RGMII_RX_CTL
L16
NC
N15
ENET_QOS_RGMII_RD2
P15
ENET_QOS_RGMII_RD3
J15
ENET_QOS_RGMII_TXC
K16
ENET_QOS_RGMII_TX_CTL
H16
ENET_QOS_RGMII_TD2
G16
ENET_QOS_RGMII_TD3
K15
ENET_QOS_RGMII_RD0