iWave iW-RainboW-G27M Installation manual

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i.MX8 SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
iW-RainboW-G27M
i.MX8 QuadMax/QuadPlus
SMARC System On Module
Hardware User Guide

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i.MX8 SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Document Revision History
Document Number
iW-PRFHZ-UM-01-R4.0-REL1.0-Hardware
Revision
Date
Description
1.0
9th Sep 2020
Official Release Version
PROPRIETARY NOTICE: This document contains proprietary material for the sole use of the intended recipient(s). Do
not read this document if you are not the intended recipient. Any review, use, distribution or disclosure by others is
strictly prohibited. If you are not the intended recipient (or authorized to receive for the recipient), you are hereby
notified that any disclosure, copying distribution or use of any of the information contained within this document is
STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.”

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Disclaimer
iWave Systems reserves the right to change details in this publication including but not limited to any Product
specification without notice.
No warranty of accuracy is given concerning the contents of the information contained in this publication. To the
extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by iWave
Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or
inaccuracies in this document.
CPU and other major components used in this product may have several silicon errata associated with it. Under no
circumstances, iWave Systems shall be liable for the silicon errata and associated issues.
Trademarks
All registered trademarks, product names mentioned in this publication are the property of their respective owners
and used for identification purposes only.
Certification
iWave Systems Technologies Pvt. Ltd. is an ISO 9001:2015 Certified Company.
Warranty & RMA
Warranty support for Hardware: 1 Year from iWave or iWave's EMS partner.
For warranty terms, go through the below web link,
http://www.iwavesystems.com/support/warranty.html
For Return Merchandise Authorization (RMA), go through the below web link,
http://www.iwavesystems.com/support/rma.html
Technical Support
iWave Systems technical support team is committed to provide the best possible support for our customers so that
our Hardware and Software can be easily migrated and used.
For assistance, contact our Technical Support team at,
Email : [e-mail]
Website : www.iwavesystems.com
Address : iWave Systems Technologies Pvt. Ltd.
# 7/B, 29th Main, BTM Layout 2nd Stage,
Bengaluru, Karnataka,
India –560076

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Table of Contents
1. INTRODUCTION ............................................................................................................................................7
1.1 Purpose .............................................................................................................................................................7
1.2 SMARC SOM Overview......................................................................................................................................7
1.3 List of Acronyms................................................................................................................................................7
1.4 Terminology Description...................................................................................................................................9
1.5 References ........................................................................................................................................................9
1.6 Important Note ...............................................................................................................................................10
2. ARCHITECTURE AND DESIGN....................................................................................................................... 11
2.1 i.MX8 QM/QP SMARC SOM Block Diagram ....................................................................................................11
2.2 i.MX8 QM/QP SMARC SOM Features .............................................................................................................12
2.3 i.MX8 CPU .......................................................................................................................................................14
2.4 PF8100 PMIC...................................................................................................................................................15
2.5 Memory...........................................................................................................................................................15
2.5.1 LPDDR4 RAM...............................................................................................................................................15
2.5.2 eMMC Flash ................................................................................................................................................15
2.5.3 Micro SD Connector (Optional) ...................................................................................................................15
2.5.4 FlexSPI Flash (Optional)...............................................................................................................................16
2.6 Network & Communiation..............................................................................................................................17
2.6.1 Wi-Fi and Bluetooth Interface.....................................................................................................................17
2.7 SMARC PCB Edge Connector...........................................................................................................................18
2.7.1 Gigabit Ethernet..........................................................................................................................................23
2.7.2 SERDES and MDIO Interface (Optional) ......................................................................................................25
2.7.3 SD Interface.................................................................................................................................................26
2.7.4 USB Interface...............................................................................................................................................26
2.7.5 PCIe Interface ..............................................................................................................................................28
2.7.6 SATA Interface.............................................................................................................................................29
2.7.7 MIPI CSI Camera..........................................................................................................................................29
2.7.8 HDMI/Display Port Interface.......................................................................................................................31
2.7.9 MIPI DSI/LVDS Display Interface .................................................................................................................33
2.7.10 Audio Interface............................................................................................................................................36
2.7.11 SPI Interface ................................................................................................................................................36
2.7.12 Data UART...................................................................................................................................................38
2.7.13 SMARC GPIOs ..............................................................................................................................................39
2.7.14 CAN Interface ..............................................................................................................................................39
2.7.15 I2C Interface................................................................................................................................................40
2.7.16 Control Signals ............................................................................................................................................41
2.7.17 Power and GND...........................................................................................................................................41
2.8 Expansion Connector (Optional).....................................................................................................................43
2.8.1 LVDS Interface (Optional)............................................................................................................................45
2.8.2 CAN Interface (Optional).............................................................................................................................46
2.8.3 USB3.0 Interface (Optional) ........................................................................................................................46

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2.8.4 ESAI Interface (Optional).............................................................................................................................47
2.8.5 SPDIF Interface (Optional)...........................................................................................................................47
2.8.6 MLB Interface (Optional).............................................................................................................................48
2.8.7 MIPI CSI0 (Optional)....................................................................................................................................49
2.8.8 HDMI Receiver (Optional) ...........................................................................................................................49
2.8.9 GPIO (Optional)...........................................................................................................................................50
2.9 Other Features................................................................................................................................................51
2.9.1 Fan Header..................................................................................................................................................51
2.9.2 Debug Header (Optional) ............................................................................................................................52
2.10 i.MX8 Pin Multiplexing on SMARC Edge .........................................................................................................54
2.11 i.MX8 Pin Multiplexing on Expansion Connector............................................................................................60
3. TECHNICAL SPECIFICATION.......................................................................................................................... 63
3.1 Electrical Characteristics .................................................................................................................................63
3.1.1 Power Input Sequencing..............................................................................................................................63
3.1.2 Power Consumption ....................................................................................................................................64
3.2 Environmental Characteristics........................................................................................................................65
3.2.1 Environmental Specification........................................................................................................................65
3.2.2 Heat Sink/ Heat Spreader............................................................................................................................65
3.2.3 RoHS Compliance ........................................................................................................................................67
3.2.4 Electrostatic Discharge................................................................................................................................67
3.3 Mechanical Characteristics .............................................................................................................................68
3.3.1 i.MX8 SMARC SOM Mechanical Dimensions...............................................................................................68
4. ORDERING INFORMATION .......................................................................................................................... 69
5. APPENDIX................................................................................................................................................... 70
5.1 i.MX8 SMARC SOM Development Platform....................................................................................................70

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List of Figures
Figure 1: i.MX8 QM/QP SMARC SOM Block Diagram ..................................................................................................... 11
Figure 2: i.MX8 Block Diagram........................................................................................................................................ 14
Figure 3: Wi-Fi and Bluetooth Antenna Connector......................................................................................................... 17
Figure 4: SMARC Edge Connector................................................................................................................................... 18
Figure 5: SMARC Expansion Connector .......................................................................................................................... 43
Figure 6: Fan Header....................................................................................................................................................... 51
Figure 7: Debug Header .................................................................................................................................................. 52
Figure 8: Power Input Sequencing.................................................................................................................................. 63
Figure 9: Mechanical dimension of Heat Sink................................................................................................................. 66
Figure 10: Mechanical dimension of Heat Spreader....................................................................................................... 66
Figure 11: Mechanical dimensions of i.MX8 SMARC SOM ............................................................................................. 68
Figure 12: i.MX8 SMARC SOM Development Platform................................................................................................... 70
List of Tables
Table 1: Acronyms & Abbreviations.................................................................................................................................. 7
Table 2: Terminology ........................................................................................................................................................ 9
Table 3: SMARC Edge Connector Pinouts ....................................................................................................................... 19
Table 4: Expansion Connector Pinouts ........................................................................................................................... 44
Table 5: FAN Header Pin Assignment.............................................................................................................................. 51
Table 6: Debug Header Pin Assignment.......................................................................................................................... 53
Table 7: i.MX8 CPU IOMUX for SMARC Edge Connector interfaces ............................................................................... 54
Table 8: i.MX8 Pin Multiplexing on Expansion Connector interfaces............................................................................. 60
Table 9: Power Input Requirement................................................................................................................................. 63
Table 10: Power Sequence Timing.................................................................................................................................. 64
Table 11: Power Consumption........................................................................................................................................ 64
Table 12: Environmental Specification ........................................................................................................................... 65
Table 13: Orderable Product Part Numbers ................................................................................................................... 69

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1. INTRODUCTION
1.1 Purpose
This document is the Hardware User Guide for the SMARC V2.1.1 SOM based on the NXP’s i.MX8 QM/QP
(QuadMax/QuadPlus) Application processor. This board is fully supported by iWave Systems Technologies Pvt. Ltd.
This Guide provides detailed information on the overall design and usage of the i.MX8 SMARC SOM from a Hardware
Systems perspective.
1.2 SMARC SOM Overview
The SMARC V2.1.1 (“Smart Mobility ARChitecture version 2.1.1”) is a versatile small form factor computer Module
definition targeting application that require low power, low costs, and high performance. The Modules are used as
building blocks for portable and stationary embedded systems. The core CPU and support circuits, including DRAM,
boot flash, power sequencing, CPU power supplies, GBE and dual channel LVDS/MIPI display transmitter are
concentrated on the Module. The Modules are used with application specific Carrier Boards that implement other
features such as audio CODECs, touch controllers, wireless devices, etc. The modular approach allows scalability, fast
time to market and upgradability while still maintaining low costs, low power and small physical size.
NXP’s i.MX8 SoC based SMARC System on Module is rich with i.MX8 features along with on SOM LPDDR4, eMMC, Dual
Ethernet PHY, USB3.0 Hub, Wi-Fi & BT module and comes in compact 82mm x 50mm form factor. The Module PCB has
314 edge fingers that mate with a low profile 314 pin 0.5mm pitch right angle connector.
1.3 List of Acronyms
The following acronyms will be used throughout this document.
Table 1: Acronyms & Abbreviations
Acronyms
Abbreviations
ARM
Advanced RISC Machine
BT
Bluetooth
CAN
Controller Area Network
CODEC
Coder-Decoder
CPU
Central Processing Unit
CSI
Camera Serial Interface
CTS
Clear to Send
DP
Display Port
DRAM
Dynamic Random Access Memory
DSI
Display Serial Interface
eDP
embedded Display Port
eMMC
Enhanced Multi Media Card

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Acronyms
Abbreviations
EMS
Electronics manufacturing services
ESAI
Enhanced Serial Audio Interface
FIFO
First In First Out
FLEXCAN
Flexible Control Area Network
FlexSPI
Flexible Serial Peripheral Interface
GB
Giga Byte
Gbps
Gigabits per sec
GPIO
General Purpose Input Output
GPU
Graphics Processing Unit
HDCP
High-bandwidth Digital Content Protection
HDMI
High-Definition Multimedia Interface
I2C
Inter-Integrated Circuit
I2S
Inter-Integrated Sound
IC
Integrated Circuit
JTAG
Joint Test Action Group
LPDDR4
Low Power Double Data Rate4
MHz
Mega Hertz
MIPI
Mobile Industry Processor Interface
MLB
Media Local Bus
OTG
On-The-Go
PCB
Printed Circuit Board
PCIe
Peripheral Component Interconnect express
PMIC
Power management integrated circuits
RAM
Random Access Memory
RGMI
Reduced gigabit media-independent interface
RoHS
Restriction of Hazardous Substances
RTC
Real Time Clock
RTS
Request to Send
SAI
Serial Audio Interface
SATA
Serial Advanced Technology Attachment
SD
Secure Digital
SDIO
Secure Digital Input Output
SMARC
Smart Mobility ARChitecture
SoC
System on Chip
SOM
System On Module
SPDIF
The Sony/Philips Digital Interface
SPI
Serial Peripheral Interface
UART
Universal Asynchronous Receiver/Transmitter
USB
Universal Serial Bus
VPU
Video Processing Unit
Wi-Fi
Wireless Fidelity

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1.4 Terminology Description
In this document, wherever Signal Type is mentioned, below terminology is used.
Table 2: Terminology
Terminology
Description
I
Input Signal
O
Output Signal
IO
Bidirectional Input/output Signal
CMOS
Complementary Metal Oxide Semiconductor Signal
HCSL
High speed Current Steering Logic
LVDS
Low Voltage Differential Signal
HDMI
High-Definition Multimedia Interface Differential Signal
DP
Display Port Differential Signal
GBE
Gigabit Ethernet Signal
PCIe
PCIe differential pair signals
SATA
Serial Advanced Technology Attachment differential pair signals
USB HS
Universal Serial Bus High Speed differential pair signals
USB SS
Universal Serial Bus Super Speed differential pair signals
MIPI
Mobile Industry Processor Interface differential pair signals
OD
Open Drain Signal
OC
Open Collector Signal
Power
Power Pin
PU
Pull Up
PD
Pull Down
NA
Not Applicable
NC
Not Connected
Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and only includes
the pull-ups or pull-downs implemented On-SMARC SOM.
1.5 References
•iMX8QMAEC_ Rev. 0.pdf
•iMX8QM_RM_Rev_F.pdf
•SMARC Specification V2.1.1

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1.6 Important Note
In this document, wherever i.MX8 CPU signal name is mentioned, it is followed as per below format for easy
understanding.
•If CPU pin doesn’t have multiplexing option or used for dedicated functionality then the signal name is
mentioned as functionality name.
“Functionality Name”
Example: ENET1_RGMII_TXC
In this signal, ENET1_RGMII_TXC pad is used for same functionality.
•If CPU pin selected as GPIO function, then the signal name is mentioned as
“Functionality Description (GPIO Number)”
Example: BCONFIG_0(GPIO1_05)
In this signal, BCONFIG_0 is the GPIO functionality and GPIO1_05 is the GPIO number.
Note: The above naming is not applicable for other signals which are not connected to CPU.

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2. ARCHITECTURE AND DESIGN
This section provides detailed information about i.MX8 SMARC SOM features and Hardware architecture with high
level block diagram.
2.1 i.MX8 QM/QP SMARC SOM Block Diagram
iW-RainboW-G27M –i.MX8 QM/QP SMARC SOM Block Diagram
Micro SD
Connector
(Optional)
i.MX8
QM/QP
LPDDR4 - 4GB
(Upgradable)
eMMC –16GB
(Upgradable)
MMC(8bit)
DDR CH0
DDR CH1
eMMC0
LPDDR4 (64bit)
uSDHC21
USB OTG1
ENET0
PCIe0, PCIe1
SMARC Edge
Connector
100Pin
Expansion
Connector
(Optional)
Gigabit
Ethernet PHY
PCIe0 x 1
USB3.0
USB_SS3 USB2.0 x 1
RGMII
USB3.0 HUB
(4ports)
USB2.0 USB3.0 x 2
Gigabit Ethernet
uSDHC1 SD x 1
MIPI CSI0 7,
MIPI CSI1
MIPI CSI X 2 (1x2lane, 1x4lane)
MLB x 1
GPIOs GPIOs
MLB
ENET1 Gigabit
Ethernet PHY
RGMII
PCIe2/SATA SATA x 1
USB OTG2
USB Device/OTG x 1
Octa SPI Flash
(Optional)
Octa QSPI x 1 QSPI0A
QSPI0B
FLEXCAN0
FLEXCAN1
CAN x 2
CAN x 1 FLEXCAN2
MIPI Camera x 1 (2lane) MPI CSI07
HDMI RX x 1 HDMI RX
LVDS0 x 2 LVDS0_CH0
LVDS0_CH1
SPI3 SPI x 1
SAI0
SAI1 I2S x 2
ESAI x 1 ESAI1
UART0,
M40/UART12,
UART3,
UART4
UART x 4
CAM I2C x 2
MIPI_CSI0_I2C0
MIPI_CSI1_I2C0
DMA_I2C1 I2C x 1
UART x 2 SCU_UART0,
M41/UART43
20pin Header
(Optional) JTAG SJC
SPDIF/DMA_I2C2* x 1 SPDIF/
DMA_I2C2*
Wi-Fi & BT
Module
UART12
UART
HDMI TX5HDMI x 1
DP x 1
LVDS1_CH0
LVDS1_CH14
MIPI DSI0
MIPI DSI14MIPI DSI x 2
LVDS1 x 2
SD (4bit)
GPIOs GPIO x14
Note:
1. JODY-W2 Wi-Fi is supported by using SDHC2 interface, hence On SOM microSD will be an optional feature. PCIe based Wi-Fi can be supported only with JODY-W3 Modules.
2. In default configuration UART1 interface of i.MX8 is connected to on SOM Bluetooth module. When UART1 is optional near edge connector, M40UART0 can be supported at SMARC Edge connector.
3. Either M41UART0 or UART4 can be supported at JTAG Connector
4. Either LVDS1_CH0 or MIPI DSI0 can be supported, similarly LVDS1_CH1 or MIPI DSI1 canbe supported. In default configuration MIPI DSI 0 &1 are supported at SMARCEdge Connector.
5. Either HDMI or Display Port can be supported. In default configuration HDMI is supported
6.Either i.MX8 SPI2 or QSPIA can be supported. In default configuration SPI2 is supported at SMARC Edge Connector.
7.i.MX8 MIPI CSI0 1st 2 Lanes are input from SMARC Edge Connector and next2 Lanes are input from SOM Expansion Connector.
* Optional
PCIe1 x 1
W_PCIe
W_PCIe
Antenna Conn.
Antenna Conn.
SERDES0
Gigabit Ethernet
SERDES1
USB2.0 x 4
USB3.0 x 2_EXP
USB3.0 x 2_EXP
SPI2/
QSPI1A6
SPI/QSPIA* x 1
Figure 1: i.MX8 QM/QP SMARC SOM Block Diagram

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2.2 i.MX8 QM/QP SMARC SOM Features
i.MX8 QM/QP SMARC SOM supports the following features.
CPU
•i.MX8 QM/QP Processor1:
oi.MX8 QuadMax : 2 x Cortex-A72, 4 x Cortex-A53 & 2 x Cortex-M4F
oi.MX8 QuadPlus : 1 x Cortex-A72, 4 x Cortex-A53 & 2 x Cortex-M4F
Power
•PF8100 PMIC x 2
Memory
•LPDDR4 - 4GB (Expandable up to 8GB)2,3
•eMMC Flash - 16GB (Expandable)3,4
•Micro SD Connector (Optional)5
•FlexSPI Flash (Optional)
Other On-SOM Features
•WiFi 802.11a/b/g/n/ac + BT 5.0 Module5,6
•Gigabit Ethernet PHY Transceiver x 2
•USB 3.0 High Speed 4-Port Hub
•FAN Header
•Debug UART & JTAG Header (Optional)
SMARC PCB Edge Interfaces
•Gigabit Ethernet x 2 Ports (through On-SOM Gigabit Ethernet PHY transceiver)
•SERDES x 2Ports (Optional. Either Gigabit Ethernet or SERDES can be supported)
•SD (4bit) x 1 Port
•USB 2.0 OTG x 1 Port
•USB3.0 Host x 2 Ports (through On-SOM USB Hub)
•USB 2.0 Host x 4Ports (through On-SOM USB Hub)
•PCIe x 2 Ports
•SATA x 1 Port
•MIPI CSI x 2 Channel (1x2lane and 1x4lane)
•HDMI/DP Transmitter x 1 Port7
•LVDS/MIPI DSI x 2 Channel8
•SAI/I2S (Audio Interface) x 2 Port
•SPI x 2 Port

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•Data UART (with CTS & RTS) x 1 Port9
•Data UART (without CTS & RTS) x 2 Port (One port can be used as Debug Port)
•SMARC GPIO x 1410
•CAN x 2 Port
•I2C x 4 Ports
Expansion Connector Interfaces (Optional)
•LVDS x 2 Channel
•CAN x 1 Port
•USB3.0 Host x 2 Ports (through On-SOM USB Hub)
•ESAI x 1 Port
•SPDIF x 1 Port
•MLB x 1 Port
•HDMI Receiver x 1 Port
•GPIOs
General Specification
•Power Supply : 5V, 6A
•Form Factor : 82mm X 50mm (SMARC V2.1.1 Specification)
1. There are two configurations of i.MX8 Processor, hence in this document i.MX8 is used to represent either i.MX8QM
or i.MX8QP based on SOM Part Number.
2. The i.MX8 can support up to 16GB RAM but considering the available LPDDR4 configuration, it can support 8GB
RAM by using two 4GB LPDDR4 chips. If 8GB (64Gb) LPDDR4 chips are available then 16GB RAM can be supported
on Board.
3. Memory Size will differ based on iWave’s SOM Product Part Number.
4. 16GB and 32GB eMMC are already validated on i.MX8 QM platform.
5. JODY-W2 Wi-Fi is supported by using SDIO interface, hence On SOM microSD will be an optional feature.
6. 802.11ax (Wi-Fi 6) can be supported by changing from JODY-W2 to JODY-W3
7. The i.MX8 support HDMI or Display Port through same pins, hence any one can be supported at a time based on
SOM part Number.
8. The i.MX8 support MIPI_DSI and LVDS interface, but in SMARC Specification LVDS and MIPI_DSI interface pins are
multiplexed hence any one can be supported at a time based on SOM part Number.
9. UART1 interface of i.MX8 is connected to on SOM Bluetooth module in the default configuration. One more UART
can be supported with CTS and RTS if Bluetooth is not supported
10. In default configuration 12 GPIOs are supported, SMARC GPIO_12 and SMARC GPIO_13 are Optionally supported.

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2.3 i.MX8 CPU
iW-RainboW-G27M SMARC SOM can support i.MX8 CPUs from NXP. The i.MX 8 Family consists of two processors:
i.MX 8QuadMax & iMX 8QuadPlus. The Major Difference between i.MX8 CPUs are:
•i.MX8 QuadMax : 2 x Cortex-A72 @ 1.6 GHz, 4 x Cortex-A53 @ 1.2 GHz & 2 x Cortex-M4F @ 264 MHz
•i.MX8 QuadPlus : 1 x Cortex-A72 @ 1.6 GHz, 4 x Cortex-A53 @ 1.2 GHz & 2 x Cortex-M4F@ 264 MHz
The i.MX8 QM/QP processors along with ARM core it supports dual 32-core GPU subsystems, 4K, H.265 capable VPU,
and dual failover-ready display controllers, 2× 4K displays, supporting multiple display output options, including MIPI-
DSI, HDMI 2.0, eDP/DP, and LVDS. Memory interfaces supporting LPDDR4, Quad SPI/Octal SPI (FlexSPI), eMMC 5.1, SD
3.0 and a wide range of peripheral I/Os such as PCIe 3.0 provide wide flexibility.
Figure 2: i.MX8 Block Diagram
Note: The i.MX8 QM/QP processor offers numerous advanced features, please refer the latest i.MX8 Datasheet &
Reference Manual for Electrical characteristics and other information, which may be revised from time to time.

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2.4 PF8100 PMIC
i.MX8 QM/QP SMARC SOM uses two PF8100/PF8200 PMIC for SOM Power management. Both the PF8100 PMIC are
programmed with custom Sequence code EP and EQ from NXP.
The PF8100 is a power management integrated circuit (PMIC) features seven high efficiency buck converters and four
linear regulators for powering the processor, memory and miscellaneous peripherals. Built-in one-time programmable
memory stores key start up configurations, drastically reducing external components typically used to set output
voltage and sequence of external regulators. Regulator parameters are adjustable through high-speed 3.4 MHz I2C
after start up offering flexibility for different system states. The PF8100 PMIC U6 (EP) & U3 (EQ) comes in 56pin 8x8
QFN Packages and are placed on the Top side of the SOM.
2.5 Memory
2.5.1 LPDDR4 RAM
The i.MX8 QM/QP SMARC SOM supports 4GB RAM using two 32bit 2GB LPDDR4 IC connected to DDR_CH0 and
DDR_CH1 channels of CPU to support LPDDR4 up to 1.6 GHz. Both the LPDDR4 parts U5 and U9 are placed on Top side
of the SOM. LPDDR4 memory size can be customised based on the requirement by contacting iWave support team.
2.5.2 eMMC Flash
The i.MX8 QM/QP SMARC SOM supports 16GB eMMC as default boot and storage device. This is connected to eMMC0
version 5.1 controller of the i.MX8 CPU and operates at 1.8V (I/O supply) and 3.3V (NAND core supply) Voltage levels.
The eMMC flash (U39) memory is physically located on bottom side of the SMARC SOM. The memory size of the eMMC
Flash can be customised based on the requirement by contacting iWave Support Team.
2.5.3 Micro SD Connector (Optional)
The i.MX8 QM/QP SMARC SOM optionally supports Micro SD connector which can be used to connect Micro SD card
as optional boot device as well as Mass storage device. Micro SD card connector (J4) is connected to the USDHC2
controller of the i.MX8 CPU. The main power to Micro SD Card Connector is 3.3 Voltage. The i.MX8 SMARC SOM
supports configurable I/O voltage levels for USDHC2 lines through LDO2OUT of PMIC1/PMIC2. The I/O voltage level of
USDHC2 lines can be set 1.8V or 3.3V based on PMIC configuration. And the micro SD Connector is physically located
on Top side of the i.MX8 SMARC SOM.
Note: In default configuration USDHC2 is used for on board Wi-Fi module. Contact iWave Support team if microSD
feature is required or refer Application Note: “AN2703-i.MX8 QM SMARC SOM-Enabling On SOM Micro SD Support-
Application Note-R4.0-REL1.0.pdf”

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2.5.4 FlexSPI Flash (Optional)
The i.MX8 QM/QP SMARC SOM optionally supports FlexSPI using Micron’s 512MB Xccela™ Flash Memory as a storage
and can be used as optional boot device. FlexSPI is connected to QSPI0 controller of the i.MX8 processor and operates
at 1.8V Voltage levels. The Xccela™ Flash (U37) memory is physically located on Bottom side of the SMARC SOM. The
FlexSPI can be supported with customised memory size based on the requirement by contacting iWave Support Team.
Note: If FlexSPI Flash feature is required, contact iWave Support Team or refer Application Note: “AN2706-i.MX8 QM
SMARC SOM-Enabling On SOM Octa SPI Support-Application Note-R4.0-REL1.0 .pdf”

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2.6 Network & Communiation
2.6.1 Wi-Fi and Bluetooth Interface
The i.MX8 QM/QP SMARC SOM is integrated with u-blox’s “JODY-W263” based Wi-Fi & Bluetooth module. The JODY-
W2 series are compact modules based on the Marvell 88W8987 AEC-Q100 compliant chipset. They enable Wi-Fi,
Bluetooth, and Bluetooth low energy communication. The JODY-W2 modules can be operated in the following modes:
• Wi-Fi 1x1 802.11a/b/g/n/ac in 2.4 GHz or 5 GHz
• Dual-mode Bluetooth 5, including audio, can be operated fully simultaneous with Wi-Fi
The JODY-W2 undergoes extended automotive qualification according to ISO 16750-4 and is manufactured in line with
ISO/TS 16949. Connection to a host processor is through SDIO, or High-Speed UART interfaces. The i.MX8 SMARC SOM
uses processor’s UART1 interface for Bluetooth and USDHC2 interface for Wi-Fi in a default configuration.
In i.MX8 QM/QP SMARC SOM, antenna pins of JODY-W263 Bluetooth and Wi-Fi are connected to J6 and J7 connector
respectively.
Figure 3: Wi-Fi and Bluetooth Antenna Connector
Connector Part Number - : MM4829-2702RA4 from Murata Electronics.
Antenna Part Number - : 2042811100 from Molex / FXP830.24.0100B from Taoglas Limited
Note: In default configuration 802.11ax (Wi-Fi 6) is not supported, but 802.11ax can be supported by changing Wi-Fi
module from JODY-W2 to JODY-W3, contact iWave Support Team for further information.
Wi-Fi ANT
CONN. (J7)
Bluetooth
ANT CONN. (J6)

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2.7 SMARC PCB Edge Connector
SMARC PCB edge connector (J1) has standard pinout as per SMARC Specification V2.1.1. The interfaces which are
available at 314pin SMARC Edge connector are explained in the following sections.
Figure 4: SMARC Edge Connector
Number of Pins - : 314
Connector Part - : Not Applicable (On Board PCB Edge connector)
Mating Connector - : 91782-3140M-001 from Aces
SMARC PCB Edge Connector (J1)

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Table 3: SMARC Edge Connector Pinouts
Signal
SMARC Pin
(Top)
SMARC Pin
(Bottom)
Signal
SMB_ALERT(GPIO0_16)
P1
S1
MIPI_CSI1_I2C0_SCL
GND
P2
S2
MIPI_CSI1_I2C0_SDA
MIPI_CSI1_CLK_P
P3
S3
GND
MIPI_CSI1_CLK_N
P4
S4
NC
NC
(Note: Optionally GBE1_PPS_SDP)
P5
S5
MIPI_CSI0_I2C0_SCL
NC
(Note: Optionally GBE0_PPS_SDP)
P6
S6
MIPI_CSI0_MCLK_OUT
MIPI_CSI1_DATA0_P
P7
S7
MIPI_CSI0_I2C0_SDA
MIPI_CSI1_DATA0_N
P8
S8
MIPI_CSI0_CLK_P
GND
P9
S9
MIPI_CSI0_CLK_N
MIPI_CSI1_DATA1_P
P10
S10
GND
MIPI_CSI1_DATA1_N
P11
S11
MIPI_CSI0_DATA0_P
GND
P12
S12
MIPI_CSI0_DATA0_N
MIPI_CSI1_DATA2_P
P13
S13
GND
MIPI_CSI1_DATA2_N
P14
S14
MIPI_CSI0_DATA1_P
GND
P15
S15
MIPI_CSI0_DATA1_N
MIPI_CSI1_DATA3_P
P16
S16
GND
MIPI_CSI1_DATA3_N
P17
S17
GBE1_MDI0+
GND
P18
S18
GBE1_MDI0-
GBE0_MDI3-
P19
S19
GBE1_LINK100#
GBE0_MDI3+
P20
S20
GBE1_MDI1+
GBE0_LINK100#
P21
S21
GBE1_MDI1-
GBE0_LINK1000#
P22
S22
GBE1_LINK1000#
GBE0_MDI2-
P23
S23
GBE1_MDI2+
GBE0_MDI2+
P24
S24
GBE1_MDI2-
GBE0_LINK_ACT#
P25
S25
GND
GBE0_MDI1-
P26
S26
GBE1_MDI3+
GBE0_MDI1+
P27
S27
GBE1_MDI3-
VPHY0_DVDDL
P28
S28
VPHY1_DVDDL
GBE0_MDI0-
P29
S29
NC
(Note: Optionally SERDES0_TX+)
GBE0_MDI0+
P30
S30
NC
(Note: Optionally SERDES0_TX-)
SPI3_CS1
P31
S31
GBE1_LINK_ACT#
GND
P32
S32
NC
(Note: Optionally SERDES0_RX+)
GPIO_SDC1_WP(GPIO1_22)
P33
S33
NC
(Note: Optionally SERDES0_RX+)
USDHC1_CMD
P34
S34
GND

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Signal
SMARC Pin
(Top)
SMARC Pin
(Bottom)
Signal
GPIO_SDC1_CD(GPIO1_23)
P35
S35
USB_HUB4OUT_DP
USDHC1_CLK
P36
S36
USB_HUB4OUT_DM
GPIO_SDC1_PWR_EN(GPIO1_19)
P37
S37
NC
GND
P38
S38
MCLK_OUT0
USDHC1_DATA0
P39
S39
SAI1_TXFS
USDHC1_DATA1
P40
S40
SAI1_TXD
USDHC1_DATA2
P41
S41
SAI1_RXD
USDHC1_DATA3
P42
S42
SAI1_TXC
SPI3_CS0
P43
S43
NC
SPI3_SCLK
P44
S44
NC
SPI3_MISO
P45
S45
NC
(Note: Optionally SMARC_MDIO_CLK)
SPI3_MOSI
P46
S46
NC
(Note: Optionally SMARC_MDIO_DATA)
GND
P47
S47
GND
PCIE_SATA0_TX0_P
P48
S48
DMA_I2C1_SCL
PCIE_SATA0_TX0_N
P49
S49
DMA_I2C1_SDA
GND
P50
S50
AUD_SAI0_TXFS(SPI2_CS1)
PCIE_SATA0_RX0_P
P51
S51
AUD_SAI0_TXD
PCIE_SATA0_RX0_N
P52
S52
AUD_SAI0_RXD
GND
P53
S53
AUD_SAI0_TXC
SPI2_CS0
(Note: Optionally QSPI1A_SS0)
P54
S54
SATA_ACT#(GPIO1_18)
QSPI1A_SS1
P55
S55
NC
SPI2_SCLK
(Note: Optionally QSPI1A_SCLK)
P56
S56
QSPI1A_DATA2
SPI2_MIS0
(Note: Optionally QSPI1A_DATA0)
P57
S57
QSPI1A_DATA3
SPI2_MOSI
(Note: Optionally QSPI1A_DATA1)
P58
S58
QSPI1A_RESET(GPIO4_22)
GND
P59
S59
NC
USB_OTG1_DP
P60
S60
NC
USB_OTG1_DM
P61
S61
GND
USB_OTG1_PWR(GPIO4_03)
P62
S62
USB3_HUB2_TXP
VBUS_OTG1
P63
S63
USB3_HUB2_TXM
USB_OTG_ID
P64
S64
GND
USB_HUB3OUT_DP
P65
S65
USB3_HUB2_RXP
USB_HUB3OUT_DM
P66
S66
USB3_HUB2_RXM
USB_HUB3_OC
P67
S67
GND
GND
P68
S68
USB_HUB2OUT_DP
USB_HUB1OUT_DP
P69
S69
USB_HUB2OUT_DM