Table of Contents
1. INTRODUCTION ............................................................................................................................................7
1.1 Purpose .............................................................................................................................................................7
1.2 OSM LGA Module Overview .............................................................................................................................7
1.3 List of Acronyms................................................................................................................................................7
1.4 Terminology Description...................................................................................................................................8
1.5 References ........................................................................................................................................................9
1.6 Important Note ...............................................................................................................................................10
2. ARCHITECTURE AND DESIGN....................................................................................................................... 11
2.1 STM32MP13x OSM LGA Module Block Diagram ............................................................................................11
2.2 STM32MP13x OSM Features ..........................................................................................................................12
2.3 STM32MP13x MPU .........................................................................................................................................14
2.4 STPMIC1EPQR PMIC........................................................................................................................................15
2.5 Memory...........................................................................................................................................................15
2.5.1 DDR3L..........................................................................................................................................................15
2.5.2 QSPI.............................................................................................................................................................15
2.6 OSM LGA/BGA Balls ........................................................................................................................................16
2.6.1 RGMII Interface...........................................................................................................................................22
2.6.2 USB 2.0 OTG & Host Interface.....................................................................................................................24
2.6.3 Audio Interface............................................................................................................................................25
2.6.4 SPI Interface ................................................................................................................................................26
2.6.5 Data UART...................................................................................................................................................27
2.6.6 Console UART..............................................................................................................................................27
2.6.7 CAN Interface ..............................................................................................................................................28
2.6.8 SDIO Interface .............................................................................................................................................29
2.6.9 ADC Interface ..............................................................................................................................................31
2.6.10 I2C Interface................................................................................................................................................31
2.6.11 PWM Interface ............................................................................................................................................32
2.6.12 JTAG.............................................................................................................................................................32
2.6.13 OSM GPIOs ..................................................................................................................................................33
2.6.14 TAMPER.......................................................................................................................................................34
2.6.15 Control Signals ............................................................................................................................................34
2.6.16 Boot Selection..............................................................................................................................................35
2.6.17 Vendor defined............................................................................................................................................35
2.6.18 Reserved......................................................................................................................................................35
2.6.19 Power and GND...........................................................................................................................................36
2.7 STM32MP13x Pin Multiplexing on OSM BGA.................................................................................................37
3. TECHNICAL SPECIFICATION.......................................................................................................................... 45
3.1 Electrical Characteristics .................................................................................................................................45
3.1.1 Power Input Requirement ...........................................................................................................................45
3.1.2 Power Consumption ....................................................................................................................................46