iWave iW-RainboW-G27D Installation manual

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i.MX8 SMARC Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
iW-RainboW-G27D
i.MX8 QuadMax/QuadPlus
SMARC Development Platform
Hardware User Guide

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i.MX8 SMARC Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Document Revision History
Document Number
iW-PRFGD-UM-01-R1.0-REL1.0-Hardware-i.MX8-DevKit
Revision
Date
Description
1.0
26th Sep 2019
Initial Release Version
PROPRIETARY NOTICE: This document contains proprietary material for the sole use of the intended recipient(s). Do
not read this document if you are not the intended recipient. Any review, use, distribution or disclosure by others is
strictly prohibited. If you are not the intended recipient (or authorized to receive for the recipient), you are hereby
notified that any disclosure, copying distribution or use of any of the information contained within this document is
STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.”

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i.MX8 SMARC Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Disclaimer
iWave Systems reserves the right to change details in this publication including but not limited to any Product
specification without notice.
No warranty of accuracy is given concerning the contents of the information contained in this publication. To the
extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by iWave
Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or
inaccuracies in this document.
CPU and other major components used in this product may have several silicon errata associated with it. Under no
circumstances, iWave Systems shall be liable for the silicon errata and associated issues.
Trademarks
All registered trademarks, product names mentioned in this publication are the property of their respective owners
and used for identification purposes only.
Certification
iWave Systems Technologies Pvt. Ltd. is an ISO 9001:2015 Certified Company.
Warranty & RMA
Warranty support for Hardware: 1 Year from iWave or iWave's EMS partner.
For warranty terms, go through the below web link,
http://www.iwavesystems.com/support/warranty.html
For Return Merchandise Authorization (RMA), go through the below web link,
http://www.iwavesystems.com/support/rma.html
Technical Support
iWave Systems technical support team is committed to provide the best possible support for our customers so that
our Hardware and Software can be easily migrated and used.
For assistance, contact our Technical Support team at,
Email : [e-mail]
Website : www.iwavesystems.com
Address : iWave Systems Technologies Pvt. Ltd.
# 7/B, 29th Main, BTM Layout 2nd Stage,
Bengaluru, Karnataka,
India –560076

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i.MX8 SMARC Development Platform Hardware User Guide
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Table of Contents
1. INTRODUCTION ............................................................................................................................................8
1.1 PURPOSE.............................................................................................................................................................. 8
1.2 OVERVIEW ........................................................................................................................................................... 8
1.3 LIST OF ACRONYMS................................................................................................................................................ 8
1.4 TERMINOLOGY DESCRIPTION .................................................................................................................................10
1.5 REFERENCES ....................................................................................................................................................... 10
2. ARCHITECTURE AND DESIGN....................................................................................................................... 11
2.1 I.MX8 QM/QP SMARC DEVELOPMENT PLATFORM BLOCK DIAGRAM........................................................................ 11
2.2 I.MX8 QM/QP SMARC DEVELOPMENT PLATFORM FEATURES .................................................................................12
2.3 SMARC MXM CONNECTOR.................................................................................................................................14
2.3.1 SMARC PCB Edge Connector Pin Assignment..............................................................................................15
2.4 SERIAL INTERFACE FEATURES .................................................................................................................................32
2.4.1 Debug UART Interface.................................................................................................................................32
2.4.2 Data UART Interface ...................................................................................................................................33
2.5 HIGH SPEED INTERFACE FEATURES .........................................................................................................................34
2.5.1 PCIe Interface ..............................................................................................................................................34
2.5.2 SATA Interface.............................................................................................................................................44
2.5.3 USB3.0 Host Interface .................................................................................................................................45
2.6 COMMUNICATION INTERFACE FEATURES .................................................................................................................47
2.6.1 Gigabit Ethernet Interface...........................................................................................................................47
2.6.2 USB2.0 Host Interface .................................................................................................................................47
2.6.3 USB2.0 OTG Interface..................................................................................................................................48
2.6.4 SDIO Interface .............................................................................................................................................49
2.6.5 CAN Interface ..............................................................................................................................................50
2.7 AUDIO/VIDEO FEATURES ......................................................................................................................................52
2.7.1 HDMI Interface............................................................................................................................................52
2.7.2 MIPI DSI Display Interface........................................................................................................................... 53
2.7.3 MIPI CSI Camera Interface ..........................................................................................................................54
2.7.4 I2S Audio Interface ......................................................................................................................................56
2.7.5 LVDS Connector (Optional)..........................................................................................................................57
2.7.6 Display Port (Optional)................................................................................................................................58
2.8 ADDITIONAL FEATURES.........................................................................................................................................59
2.8.1 SPI Flash ......................................................................................................................................................59
2.8.2 RTC Coin Cell Holder....................................................................................................................................59
2.9 ON BOARD SWITCHES ..........................................................................................................................................60
2.10 AUDIO &VIDEO EXPANSION CONNECTOR ...............................................................................................................62
2.11 CARRIER EXPANSION CONNECTOR..........................................................................................................................68
3. TECHNICAL SPECIFICATION.......................................................................................................................... 81
3.1 POWER INPUT REQUIREMENT................................................................................................................................81
3.2 POWER OUTPUT SPECIFICATION.............................................................................................................................82

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3.3 ENVIRONMENTAL CHARACTERISTICS .......................................................................................................................83
3.3.1 Environmental Specification........................................................................................................................83
3.3.2 RoHS Compliance ........................................................................................................................................83
3.3.3 Electrostatic Discharge................................................................................................................................83
3.4 MECHANICAL CHARACTERISTICS.............................................................................................................................84
3.4.1 i.MX8 SMARC Carrier Board Mechanical Dimensions.................................................................................84
3.4.2 Guidelines to insert the SMARC SOM into Carrier Board ............................................................................85
4. ORDERING INFORMATION .......................................................................................................................... 86

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List of Figures
Figure 1: i.MX8 QM/QP SMARC Development Platform Block Diagram........................................................................11
Figure 2: SMARC MXM Connector..................................................................................................................................14
Figure 3: Debug UART Port .............................................................................................................................................32
Figure 4: Data UART Header ...........................................................................................................................................33
Figure 5: PCIex4 Connector.............................................................................................................................................34
Figure 6: Mini PCIe Connector ........................................................................................................................................37
Figure 7: M.2 Connector .................................................................................................................................................39
Figure 8: SATA Connector ...............................................................................................................................................44
Figure 9: USB3.0 Host......................................................................................................................................................46
Figure 10: RJ45 Magjack..................................................................................................................................................47
Figure 11: USB2.0 Host ...................................................................................................................................................48
Figure 12: USB2.0 OTG....................................................................................................................................................49
Figure 13:Standard SD Connector...................................................................................................................................50
Figure 14: CAN Header....................................................................................................................................................51
Figure 15: HDMI Output..................................................................................................................................................52
Figure 16: MIPI Display Connector..................................................................................................................................53
Figure 17: MIPI Camera Connector.................................................................................................................................55
Figure 18: Audio Jack ......................................................................................................................................................56
Figure 19: LVDS Display Connector.................................................................................................................................57
Figure 20: Display Port....................................................................................................................................................58
Figure 21: RTC Battery Holder.........................................................................................................................................59
Figure 22: SMARC On Board Switches ............................................................................................................................60
Figure 23: Audio & Video Expansion connector .............................................................................................................62
Figure 24: SMARC Expansion Connector ........................................................................................................................69
Figure 25: Power Jack......................................................................................................................................................81
Figure 26: Mechanical dimensions of i.MX8 SMARC Carrier Board- Top View ..............................................................84
Figure 27: Mechanical dimensions of i.MX8 SMARC Carrier Board - Side View.............................................................85
Figure 28: SOM Insertion Guideline................................................................................................................................85

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List of Tables
Table 1: Acronyms & Abbreviations..................................................................................................................................8
Table 2: Terminology ......................................................................................................................................................10
Table 3: SMARC PCB Edge Connector Pin Assignment ...................................................................................................15
Table 4: Data UART Header Pinout.................................................................................................................................33
Table 5: PCIex4 Connector Pinout...................................................................................................................................35
Table 6: Mini-PCIe Connector Pinout..............................................................................................................................37
Table 7: M.2 Connector Pinout.......................................................................................................................................40
Table 8: 22 pins SATA Connector Pinout.........................................................................................................................45
Table 9: CAN0 Header Pinout .........................................................................................................................................50
Table 10: CAN1 Header Pinout .......................................................................................................................................51
Table 11: MIPI Display Connector Pinout .......................................................................................................................53
Table 12: MIPI Camera Connector Pinout.......................................................................................................................55
Table 13: LVDS Connector Pinout ...................................................................................................................................57
Table 14: Board Configuration Switch ............................................................................................................................60
Table 15: Audio & Video Expansion Connector Pinout...................................................................................................63
Table 16: Expansion Connector1 Pinout.........................................................................................................................69
Table 17: Expansion Connector2 Pinout.........................................................................................................................75
Table 18: Power Input Requirement...............................................................................................................................82
Table 19: Power Output Specification ............................................................................................................................82
Table 20: Environmental Specification ...........................................................................................................................83
Table 21: Orderable Product Part Numbers ...................................................................................................................86

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1. INTRODUCTION
1.1 Purpose
This document is the Hardware User Guide for the i.MX8 QM/QP SMARC V2.0 Development platform “iW-RainboW-
G27D” based on the NXP’s i.MX8 Application processor. This board is fully supported by iWave Systems Technologies
Pvt. Ltd. This Guide provides detailed information on the overall design and usage of the i.MX8 QM/QP based SMARC
development platform from a Hardware Systems perspective. Complete information about the i.MX8 QM/QP SMARC
SOM is explained in another document “iW-RainboW-G27M_i.MX8_SMARC_SOM-HardwareUserGuide”.
1.2 Overview
The SMARC V2.0 (“Smart Mobility ARChitecture”) is a versatile small form factor computer Module definition targeting
application that require low power, low costs, and high performance. The Module power envelope is typically under
6W although designs up to about 15W are possible.
iW-RainboW-G27D Development Platform comes with SMARC V2.0 Generic Carrier, i.MX8 QM/QP based SMARC SOM
along with 5.5-inch Capacitive Touch Display. The development board can be used for quick prototyping of various
applications targeted by the I.MX8 processor. With the 120mmx120mm Nano ITX size, SMARC carrier board is highly
packed with all the necessary on-board connectors to validate the SMARC features of I.MX8 QM/QP SMARC SOM.
1.3 List of Acronyms
The following acronyms will be used throughout this document.
Table 1: Acronyms & Abbreviations
Acronyms
Abbreviations
CAN
Controller Area Network
CMOS
Complementary Metal-Oxide Semiconductor
CPU
Central Processing Unit
CSI
Camera Serial Interface
DP
Display Port
DSI
Display Serial Interface
eMMC
Enhanced Multi Media Card
GB
Giga Byte
Gbps
Gigabits per sec
GPIO
General Purpose Input Output
HDMI
High-Definition Multimedia Interface
Hz
Hertz
I2C
Inter-Integrated Circuit
I2S
Inter-IC Sound

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Acronyms
Abbreviations
IC
Integrated Circuit
LVDS
Low Voltage Differential Signalling
MIPI
Mobile Industry Processor Interface
MLB
Media Local Bus
MXM
Mobile PCI Express Module
PCB
Printed Circuit Board
PCIe
Peripheral Component Interconnect Express
RoHS
Restriction of Hazardous Substances
RTC
Real Time Clock
SATA
Serial Advanced Technology Attachment
SD
Secure Digital
SMARC
Smart Mobility ARChitecture
SOM
System On Module
TBD
To Be Defined
UART
Universal Asynchronous Receiver/Transmitter
USB
Universal Serial Bus
USB OTG
USB On The Go
V
Voltage

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1.4 Terminology Description
In this document, wherever Signal Type is mentioned, below terminology is used.
Table 2: Terminology
Terminology
Description
I
Input Signal
O
Output Signal
IO
Bidirectional Input/output Signal
CMOS
Complementary Metal Oxide Semiconductor Signal
DIFF
Differential Signal
LVDS
Low Voltage Differential Signal
GBE
Gigabit Ethernet Media Dependent Interface differential pair signals
USB HS
Universal Serial Bus High Speed differential pair signals
USB SS
Universal Serial Bus Super Speed differential pair signals
MIPI
Mobile Industry Processor Interface signals
HDMI
High-Definition Multimedia Interface Differential Signal
DP
Display Port Differential Signal
OD
Open Drain Signal
OC
Open Collector Signal
Power
Power Pin
PU
Pull Up
PD
Pull Down
NA
Not Applicable
NC
Not Connected
Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and only includes
the pull-ups or pull-downs implemented On-SMARC SOM.
1.5 References
•IMX8QMAEC_Revx.pdf
•iMX8QM_RM_Rev_x.pdf
•SMARC Specification V2.0

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2. ARCHITECTURE AND DESIGN
This section provides detailed information about the i.MX8 QM/QP SMARC SOM features and Hardware architecture
with high level block diagram.
2.1 i.MX8 QM/QP SMARC Development Platform Block Diagram
80 pin
Carrier
Expansion
Connector-2
USB3.0
Switch
RJ45 Stack
i.MX8 QM/QP SMARC Edge Connector
iW-RainboW-G27D_i.MX8 QM/QP SMARC Development Kit Block Diagram
MIPI DSI0/
LVDS0CH01
MIPI DSI /LVDS X1 (4 lane)
HDMI2
SAI1
MIPI DSI0
Connector
HDMI
Connector
MIPI CSI0 MIPI CSI0
Connector
HDMI_TX x 1
CSI0 lane[1:0]
I2S
Audio Codec
Audio In Jack
I2S Audio In
ENET0 to
GBE0
Bottom
Top
10/100/1000Mbps Ethernet
USB2.0 Host x 1
USB TypeC
Connector2
100 pin SOM Expansion Connector
SPI2/
QSPI1A*4
QSPI/SPI x 1
UART Header
UART0 UART (with CTS & RTS) x 1
UART3 UART x 1
DMA_I2C1 I2C x 1
DIP Switch BOOT_SEL
BOOT_SEL x 3
To On-board
Peripherals
& SOM
12V Power Jack
On-Board
Regulators
12V
RTC Coin cell
Holder
VDD_RTC 3V
SDHC1 Standard SD
SDIO x 1
SPI3 5
SPI Flash SPI x 1
USB3.0 Stack
USBHUB_P1
(HS &SS)
Bottom
Top
USB3.0 Host x 1
USBHUB_P2
(HS &SS)
USB3.0 Host x 1
USB2.0 1:2
Hub
USB2.0 Stack
USBHUB_P2
(HS)
Bottom
Top
USB2.0 Host x 1
USBHUB_P3
(HS)
Micro USB
Connector USB OTG1
USB2.0 OTG x 1
80 pin
A&V
Expansion
Connector-2
MIPI DSI1/
LVDS0CH11
MIPI DSI X1 (4lane)
MIPI CSI1 MIPI CSI X1 (4lane), I2C x 1
AUD_SAI03HDA/I2S x 1
I2C, GPIOs I2Cx 1, GPIOs
DIP SW
CSI0 lane[3:2]
80 pin
Carrier
Expansion
Connector-1
UART4
Debug micro
USB Port
USB to UART
TXRX UART
USB
USBHUB_P3
(SS)
USBHUB_P4
(SS)
HDMI_RX0
LVDS1_CH0,
LVDS1_CH1
MLB
CSI0 lane[3:2]
SPDIF
ENET1 to
GBE1
ESAI1
FLEXCAN2
MIPI CSI0
CAN
Transceiver FLEXCAN0
CAN x 1
FLEXCAN1
CAN x 1
CAN
Transceiver
CAN0 Header
CAN1 Header
10/100/1000Mbps Ethernet
DP2Display Port
Connector
DP x 1
LVDS Display
Connector
Note: * Optional
1. Either MIPI_DSI or LVDS can be supported on SOM, in default configuration MIPI_DSI is supported.
2. Either HDMI or DP can be supported on SOM, in default configuration HDMI is supported.
3. Shared between M.2 Connector and A&V Expansion Connector
4. Shared between M.2 Connector and Expansion Connector-2
5. Shared between SPI Flash and Expansion Connector-2
USB3.0 Host x 1
USB3.0 Host x 1
HDMI_RX x 1
MLB x 1
SPDIF x 1
ESAI x 1
CAN x 1
LVDS X2 (4 lane)
PCIe_SATA0 22pin SATA
Connector
SATA x 1
Audio Out Jack
Audio Out
TAMPER
TAMPER In & Out
PCIe x 4 Slot
PCIe0
PCIe x 1
PCIe1
Mini PCIe
Connector
M.2 Module
Connector
PCIe Switch B
PCIe Switch A
PCIe x 1
SPI2/
QSPI1A*4
PCIe_SW_SEL
PCIe_SW_SEL
AUD_SAI03
UART1*
CONTROL
CTRL _SIGNALS
I2S x 1
QSPI/SPI X 1
UART x 1
SPI3 5SPI x 1
LVDS0CH0
MIPI DSI0
Figure 1: i.MX8 QM/QP SMARC Development Platform Block Diagram

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2.2 i.MX8 QM/QP SMARC Development Platform Features
The NXP’s i.MX8 QM/QP SMARC carrier board supports the following features to validate the NXP’s i.MX8 QM/QP
SMARC SOM Edge connector interface.
Serial Interface Features
•Debug UART through USB Micro AB Connector
•Data UART x 1 Port through Header
High Speed Interface Features
•PCIe x 1 Port through x4 connector or Mini-PCIe connector or M.2 connector 1,2
•SATA x 1 Port through 22pin SATA Connector
•USB 3.0 Host x 2 Port through USB 3.0 Type A Connector3
•USB Type C x 1 Port3
Communication Features
•Dual 10/100/1000Mbps Ethernet through RJ45MagJack
•USB 2.0 Host x 2 Port through USB 2.0 Type A Connector
•USB 2.0 OTG x 1 Port through Micro AB Connector
•SDHC/SDIO (4bit) x 1 Port through Standard SD Connector
•CAN x 2 Port Through Header
Audio/Video Features
•HDMI X 1 Port through Type A Connector
•MIPI DSI 4lane Display Connector with Capacitive Touch
•MIPI CSI 2lane/4lane Camera Connector
•I2S Audio Codec with 3.5mm Audio IN and OUT jack
•LVDS Connector (Optional)
•Display Port (Optional)
Additional Features
•SPI Flash
•RTC Coin Cell holder
On Board Switches
•Power ON/OFF Switch
•Board Configuration Switch
•Reset Switch
•Force Boot Switch

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A&V Expansion Connector
•MIPI CSI - 4 lanes x 1 Port
•MIPI DSI - 4 lanes x 1 Port
•I2S/HDA x 1 Port
Carrier board Expansion Connectors
•SPI x 1 Port (Optional - Shared with SPI Flash)
•QSPI/SPI x 1 Port (Shared with M.2 connector)
•HDMI Receiver x 1Port
•LVDS x 2 Channel
•CAN x 1 Port
•USB3.0 Host x 2 Ports (through On-SOM USB Hub)
•ESAI x 1 Port
•SPDIF x 1 Port
•MLB x 1 Port
•TAMPER In & Out
•GPIOs
General Specification
•Power Supply : 12V, 2A Power Input Jack
•Temperature Supported : 0°C to +60°C
•Form Factor : 120mm X 120mm Nano ITX
1.PCIe Channel A can be connected to either Mini PCIe or M.2 Connector or PETp0 of PCIe X4 connector by using on
Board Switches, whereas PCIe Channel B can be connected to either Mini PCIe or M.2 Connector or PETp1 of PCIe X4
connector by using on Board Switches.
2. At a time, do not set Both the PCIe Channel A & B neither to mini PCIe nor to M.2 connector.
3. Either USB Type C connector or USB 3.0 Type A TOP connector can be supported at a time. Anyone can be selected
using on Board Switches.

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2.3 SMARC MXM Connector
The i.MX8 QM/QP SMARC carrier board supports 314Pin SMARC MXM Edge mating connector for SMARC SOM
attachment. This standard 314-pin robust connector is capable of handling high-speed serialized signals and can be
used for size constrained embedded applications. This SMARC MXM connector (J16) is physically located at the top of
the board as shown below.
Figure 2: SMARC MXM Connector

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2.3.1 SMARC PCB Edge Connector Pin Assignment
Table 3: SMARC PCB Edge Connector Pin Assignment
Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
SMARC Primary Side
P1
SMB_ALERT_1V8#
SMBUS_ALERT(GPIO
0_16)
GPT0_COMPARE/
AW53
O, 1.8V
CMOS
SM Bus Alert# (interrupt)
signal
P2
GND
GND
NA
Power
Ground.
P3
CSI1_CK+
MIPI_CSI1_CLK_P
MIPI_CSI1_CLK_P/
BJ17
O, MIPI
MIPI CSI1 differential clock
positive.
P4
CSI1_CK-
MIPI_CSI1_CLK_N
MIPI_CSI1_CLK_N/
BH16
O, MIPI
MIPI CSI1 differential clock
negative.
P5
GBE1_SDP
NC
NA
NA
NC
P6
GBE0_SDP
NC
NA
NA
NC
P7
CSI1_RX0+
MIPI_CSI1_DATA0_P
MIPI_CSI1_DATA0_
P/BH18
O, MIPI
MIPI CSI1 differential data
lane 0 positive.
P8
CSI1_RX0-
MIPI_CSI1_DATA0_N
MIPI_CSI1_DATA0_
N /BJ19
O, MIPI
MIPI CSI1 differential data
lane 0 negative.
P9
GND
GND
NA
Power
Ground.
P10
CSI1_RX1+
MIPI_CSI1_DATA1_P
MIPI_CSI1_DATA1_
P/BJ15
O, MIPI
MIPI CSI1 differential data
lane 1 positive.
P11
CSI1_RX1-
MIPI_CSI1_DATA1_N
MIPI_CSI1_DATA1_
N/BH14
O, MIPI
MIPI CSI1 differential data
lane 1 negative.
P12
GND
GND
NA
Power
Ground.
P13
CSI1_RX2+
MIPI_CSI1_DATA2_P
MIPI_CSI1_DATA2_
P/BJ21
O, MIPI
MIPI CSI1 differential data
lane 2 positive.
P14
CSI1_RX2-
MIPI_CSI1_DATA2_N
MIPI_CSI1_DATA2_
N/BH20
O, MIPI
MIPI CSI1 differential data
lane 2 negative
P15
GND
GND
NA
Power
Ground.
P16
CSI1_RX3+
MIPI_CSI1_DATA3_P
MIPI_CSI1_DATA3_
P/BJ13
O, MIPI
MIPI CSI1 differential data
lane 3 positive.
P17
CSI1_RX3-
MIPI_CSI1_DATA3_N
MIPI_CSI1_DATA3_
N/BH12
O, MIPI
MIPI CSI1 differential data
lane 3 negative.
P18
GND
GND
NA
Power
Ground.
P19
GBE0_MDI3-
GBE0_MDI3-
NA
IO, GBE
Gigabit Ethernet MDI
differential pair 3 negative.
P20
GBE0_MDI3+
GBE0_MDI3+
NA
IO, GBE
Gigabit Ethernet MDI
differential pair 3 positive.
P21
GBE0_LINK100#
GBE0_LINK100#
NA
I, 3.3V CMOS
100Mbps Ethernet link
status LED
P22
GBE0_LINK1000#
GBE0_LINK1000#
NA
I, 3.3V CMOS
Gigabit Ethernet link status
LED

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Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
P23
GBE0_MDI2-
GBE0_MDI2-
NA
IO, GBE
Gigabit Ethernet MDI
differential pair 2 negative.
P24
GBE0_MDI2+
GBE0_MDI2+
NA
IO, GBE
Gigabit Ethernet MDI
differential pair 2 positive.
P25
GBE0_LINK_ACT#
GBE0_LINK_ACT#
NA
I, 3.3V CMOS
Gigabit Ethernet activity
status
P26
GBE0_MDI1-
GBE0_MDI1-
NA
IO, GBE
Gigabit Ethernet MDI
differential pair 1 negative.
P27
GBE0_MDI1+
GBE0_MDI1+
NA
IO, GBE
Gigabit Ethernet MDI
differential pair 1 positive.
P28
GBE0_CTREF
VPHY0_DVDDL
NA
Power
Power for the Centre Tap of
Mack Jack connector
P29
GBE0_MDI0-
GBE0_MDI0-
NA
IO, GBE
Gigabit Ethernet MDI
differential pair 0 negative.
P30
GBE0_MDI0+
GBE0_MDI0+
NA
IO, GBE
Gigabit Ethernet MDI
differential pair 0 positive.
P31
SPI0_CS1#
SPI3_CS1
SPI3_CS1/
BD8
I, 1.8V CMOS
SPI0 Chip Select 1
P32
GND
GND
NA
Power
Ground.
P33
SDIO_WP
GPIO_SDC1_WP(GPI
O1_22)
MIPI_DSI1_GPIO0_
00/BM24
0, 3.3V
CMOS
SD write Protect.
P34
SDIO_CMD
USDHC1_CMD
USDHC1_CMD/
G41
IO, 1.8/3.3V
CMOS
SD command.
P35
SDIO_CD#
GPIO_SDC1_CD(GPI
O1_23)
MIPI_DSI1_GPIO0_
01/BK24
I, 3.3V/
CMOS
SD Card Detect.
P36
SDIO_CK
USDHC1_CLK
USDHC1_CLK/
J39
I, 1.8/3.3V
CMOS
SD Clock.
P37
SDIO_PWR_EN
GPIO_SDC1_PWR_E
N(GPIO1_19)
MIPI_DSI0_GPIO0_
01/ BD28
I, 3.3V
CMOS
SD Power enable.
P38
GND
GND
NA
Power
Ground.
P39
SDIO_D0
USDHC1_DATA0
USDHC1_DATA0/
E37
IO, 1.8/3.3V
CMOS
SD data 0.
P40
SDIO_D1
USDHC1_DATA1
USDHC1_DATA1/
F38
IO, 1.8/3.3V
CMOS
SD data 1
P41
SDIO_D2
USDHC1_DATA2
USDHC1_DATA2/
E39
IO, 1.8/3.3V
CMOS
SD data 2
P42
SDIO_D3
USDHC1_DATA3
USDHC1_DATA3/
F40
IO, 1.8/3.3V
CMOS
SD data 3
P43
SPI0_CS0#
SPI3_CS0
SPI3_CS0/
BG5
I, 1.8V CMOS
SPI0 Chip Select 0

REL1.0
Page 17 of 87
i.MX8 SMARC Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
P44
SPI0_CK
SPI3_SCLK
SPI3_SCLK/
BF6
I, 1.8V CMOS
SPI0 Clock
P45
SPI0_DIN
SPI3_MISO/
SPI3_MISO/
BE5
I, 1.8V CMOS
SPI0 Master IN Slave OUT
P46
SPI0_DO
SPI3_MOSI
SPI3_MOSI/
BF2
O, 1.8V
CMOS
SPI0 Master OUT Slave IN
P47
GND
GND
NA
Power
Ground.
P48
SATA_TX+
PCIE_SATA0_TX0_P
PCIE_SATA0_TX0_P
/
B16
I, DIFF
SATA Transmit Lane Positive
P49
SATA_TX-
PCIE_SATA0_TX0_N
PCIE_SATA0_TX0_
N/
C17
I, DIFF
SATA Transmit Lane
Negative
P50
GND
GND
NA
Power
Ground.
P51
SATA_RX+
PCIE_SATA0_RX0_P
PCIE_SATA0_RX0_P
/
A19
O, DIFF
SATA Receive Lane Positive
P52
SATA_RX-
PCIE_SATA0_RX0_N
PCIE_SATA0_RX0_
N/
B20
O, DIFF
SATA Receive Lane Negative
P53
GND
GND
NA
Power
Ground.
P54
ESPI_CS0#
QSPI1A_SS0
SPI2_CS0/
AW1
or
QSPI1A_SS0/
J11
I, 1.8V CMOS
SPI2 Chip Select 0.
Note: when used as QSPI, it
will act as QSPI1A_ Chip
Select 0
P55
ESPI_CS1#
QSPI1A_SS1
QSPI1A_SS1/
G11
I, 1.8V CMOS
NC
Note: when used as QSPI, it
will act as QSPI1A_ Chip
Select 1
P56
ESPI_CK
QSPI1A_SCLK
SPI2_SCK/
AW5
or
QSPI1A_SCLK/
F10
I, 1.8V CMOS
SPI2 Clock
Note: when used as QSPI, it
will act as QSPI1A_ Clock
P57
ESPI_IO_0
QSPI1A_DATA0
SPI2_SDI/
AY4
or
QSPI1A_DATA0/
D12
IO, 1.8V
CMOS
SPI2 Master In Slave Out.
Note: when used as QSPI, it
will act as QSPI1A_ DATA0

REL1.0
Page 18 of 87
i.MX8 SMARC Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
P58
ESPI_IO_1
QSPI1A_DATA1
SPI2_SDO/
BA1
or
QSPI1A_DATA1/
D14
IO, 1.8V
CMOS
SPI2 Master Out Slave In
Note: when used as QSPI, it
will act as QSPI1A_ DATA1
P59
GND
GND
NA
Power
Ground.
P60
USB0+
USB_OTG1_DP
USB_OTG1_DP /
B40
IO, USB HS
USB Port0 Data Plus
P61
USB0-
USB_OTG1_DM
USB_OTG1_DM /
C39
IO, USB HS
USB Port0 Data Minus
P62
USB0_EN_OC#
USB_OTG1_PWR(GPI
O4_03)
USB_SS3_TC0/
J9
IO, 3.3V
CMOS
USB Port0 Power Enable/
Over Current Indicator
P63
USB0_VBUS_DET
VBUS_OTG1
USB_OTG1_VBUS/
A39
5V, Power
USB host power detection,
when this port is used as a
device.
P64
USB0_OTG_ID
USB_OTG_ID
USB_OTG2_ID/
F30
O, 3.3V
CMOS
USB0 OTG ID.
P65
USB1+
USB_HUB3OUT_DP
NA
IO, USB HS
USB Port1 Data Plus
Note: Connected to USB Hub
P66
USB1-
USB_HUB3OUT_DM
NA
IO, USB HS
USB Port1 Data Minus
Note: Connected to USB Hub
P67
USB1_EN_OC#
USB_HUB3_OC
NA
IO, 3.3V
CMOS
USB Port1 Power Enable/
Over Current Indicator
Note: Connected to USB Hub
P68
GND
GND
NA
Power
Ground.
P69
USB2+
USB_HUB1OUT_DP
NA
IO, USB HS
USB Port2 Data Plus
Note: Connected to USB Hub
P70
USB2-
USB_HUB1OUT_DM
NA
IO, USB HS
USB Port2 Data Minus
Note: Connected to USB Hub
P71
USB2_EN_OC#
USB_HUB1_OC
NA
IO, 3.3V
CMOS
USB Port2 Power Enable/
Over Current Indicator
Note: Connected to USB Hub
P72
RSVD4
NC
NA
NA
NA
P73
RSVD5
NC
NA
NA
NA
P74
USB3_EN_OC#
USB_HUB2_OC
NA
IO, 3.3V
CMOS
USB Port3 Power Enable/
Over Current Indicator
Note: Connected to USB Hub
KEY
P75
PCIE_A_RST#
PCIE_A_RST_B(GPIO
4_29)
PCIE_CTRL0_PERST
_B/D20
I, 3.3V CMOS
PCIE_A Reset Out

REL1.0
Page 19 of 87
i.MX8 SMARC Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
P76
USB4_EN_OC#
USB_HUB4_OC
NA
IO, 3.3V
CMOS
USB Port4 Power Enable/
Over Current Indicator
Note: Connected to USB Hub
P77
RSVD6
NC
NA
NA
NA
P78
RSVD7
NC
NA
NA
NA
P79
GND
GND
NA
Power
Ground.
P80
PCIE_C_REFCK+
NC
NA
NA
NA
P81
PCIE_C_REFCK-
NC
NA
NA
NA
P82
GND
GND
NA
Power
Ground.
P83
PCIE_A_REFCK+
PCIE_REFCLK_P
NA
I, PCIe
PCIe Channel-A Clock
Positive
P84
PCIE_A_REFCK-
PCIE_REFCLK_N
NA
I, PCIe
PCIe Channel-A Clock
Negative
P85
GND
GND
NA
Power
Ground.
P86
PCIE_A_RX+
PCIE0_A_RX0_P
PCIE0_RX0_P/
A29
O, PCIe
PCIe Channel-A Receive
Positive
P87
PCIE_A_RX-
PCIE0_A_RX0_N
PCIE0_RX0_N/
B30
O, PCIe
PCIe Channel-A Receive
Negative
P88
GND
GND
NA
Power
Ground.
P89
PCIE_A_TX+
PCIE0_A_TX0_P
PCIE0_TX0_P/
B26
I, PCIe
PCIe Channel-A Transmit
Positive
P90
PCIE_A_TX-
PCIE0_A_TX0_N
PCIE0_TX0_N/
C27
I, PCIe
PCIe Channel-A Transmit
Negative
P91
GND
GND
NA
Power
Ground.
P92
HDMI_D2+ /
DP1_LANE0+
HDMI_TX0_DATA2_
P/EDP0_P
HDMI_TX0_DATA2
_EDP0_P/BL9
I, HDMI
HDMI Transceiver 2 Positive
to HDMI Connector
P93
HDMI_D2- /
DP1_LANE0-
HDMI_TX0_DATA2_
N/EDP0_N
HDMI_TX0_DATA2
_EDP0_N/BM8
I, HDMI
HDMI Transceiver 2 Negative
to HDMI Connector
P94
GND
GND
NA
Power
Ground.
P95
HDMI_D1+ /
DP1_LANE1+
HDMI_TX0_DATA1_
P/EDP1_P
HDMI_TX0_DATA1
_EDP1_P/BL7
I, HDMI
HDMI Transceiver 1 Positive
to HDMI Connector
P96
HDMI_D1- /
DP1_LANE1-
HDMI_TX0_DATA1_
N/EDP1_N
HDMI_TX0_DATA1
_EDP1_N/BM6
I, HDMI
HDMI Transceiver 1 Negative
to HDMI Connector
P97
GND
GND
NA
Power
Ground.
P98
HDMI_D0+ /
DP1_LANE2+
HDMI_TX0_DATA0_
P/EDP2_P
HDMI_TX0_DATA0
_EDP2_P/BL5
I, HDMI
HDMI Transceiver 0 Positive
to HDMI Connector
P99
HDMI_D0- /
DP1_LANE2-
HDMI_TX0_DATA0_
N/EDP2_N
HDMI_TX0_DATA0
_EDP2_N/BM4
I, HDMI
HDMI Transceiver 0 Negative
to HDMI Connector
P100
GND
GND
NA
Power
Ground.

REL1.0
Page 20 of 87
i.MX8 SMARC Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SMARC Edge
Connector Pin
Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
P101
HDMI_CK+ /
DP1_LANE3+
HDMI_TX0_CLK_P/E
DP3_P
HDMI_TX0_CLK_ED
P3_P/
BL3
I, HDMI
HDMI Transceiver CLK
Positive to HDMI Connector
P102
HDMI_CK- /
DP1_LANE3-
HDMI_TX0_CLK_N/E
DP3_N
HDMI_TX0_CLK_ED
P3_N/BK2
I, HDMI
HDMI Transceiver CLK
Negative to HDMI Connector
P103
GND
GND
NA
Power
Ground.
P104
HDMI_HPD /
DP1_HPD
HDMI_TX_HPD
HDMI_TX_HPD /
BH8
O, 1.8V
CMOS
HDMI Hot Plug Detect from
HDMI Connector.
P105
HDMI_CTRL_CK /
DP1_AUX+
HDMI_TX0_CTRL_CL
K/_AUX_P
HDMI_TX0_DDC_S
CL /BG1
I, 1.8V CMOS
HDMI DDC Clock to HDMI
Connector through Voltage
Level translator
P106
HDMI_CTRL_DAT
/ DP1_AUX-
HDMI_TX0_CTRL_DA
T/_AUX_N
HDMI_TX0_DDC_S
DA /BN5
IO, 1.8V
CMOS
HDMI DDC DATA to HDMI
Connector through Voltage
Level translator
P107
DP1_AUX_SEL
NC
NA
-
NC.
P108
GPIO0 /
CAM0_PWR#
SMARC_GPIO_0(GPI
O1_27)
MIPI_CSI0_GPIO0_
00/BL23
IO, 1.8V
CMOS
General Purpose Input/
Output 0. Connected to
CAN0 Transceiver Power
Down.
P109
GPIO1 /
CAM1_PWR#
SMARC_GPIO_1(GPI
O1_30)
MIPI_CSI1_GPIO0_
00/BN15
IO, 1.8V
CMOS
General Purpose Input/
Output 1. Connected to
CAN1 Transceiver Power
Down.
P110
GPIO2 /
CAM0_RST#
SMARC_GPIO_2(GPI
O1_28)
MIPI_CSI0_GPIO0_
01/BM22
IO, 1.8V
CMOS
General Purpose Input/
Output 2. Used for Camera
RESET
P111
GPIO3 /
CAM1_RST#
SMARC_GPIO_3(GPI
O1_31)
MIPI_CSI1_GPIO0_
01/BN13
IO, 1.8V
CMOS
General Purpose Input/
Output 3. Connected to A&V
Expansion connector
P112
GPIO4 /
HDA_RST#
SMARC_GPIO_4(GPI
O4_11)
USDHC2_WP /
D8
IO, 1.8V
CMOS
General Purpose Input/
Output 4.USB type C
switching Port selection
P113
GPIO5 /
PWM_OUT
SMARC_GPIO_5(GPI
O0_19)
GPT1_COMPARE/
BA51
IO, 1.8V
CMOS
General Purpose Input/
Output 5. Connected to
HDMI_CEC#
P114
GPIO6 / TACHIN
SMARC_GPIO_6(GPI
O0_00)
SIM0_CLK/
AL45
IO, 1.8V
CMOS
General Purpose Input/
Output 6. Connected to USB
Type C Controller Interrupt
pin.