iWave iW-RainboW-G35D Installation manual

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iWave Systems Technologies Pvt. Ltd.
Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM DevKit Hardware User Guide
iW-RainboW-G35D
Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM
Development Platform
Hardware User Guide

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iWave Systems Technologies Pvt. Ltd.
Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM DevKit Hardware User Guide
Document Revision History
Document Number
iW-PRGED-UM-01-R2.0-REL0.3-Hardware-ZynqMPSoC(ZU11/17/19EG)-UHS-DevKit
Revision
Date
Change Description
0.1
14th Apr 2020
Initial Draft Version
0.2
21st Oct 2020
Updated Version
0.3
08th Dec 2020
Updated Version
PROPRIETARY NOTICE: This document contains proprietary material for the sole use of the intended recipient(s). Do not
read this document if you are not the intended recipient. Any review, use, distribution or disclosure by others is strictly
prohibited. If you are not the intended recipient (or authorized to receive for the recipient), you are hereby notified that
any disclosure, copying distribution or use of any of the information contained within this document is STRICTLY
PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.”

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iWave Systems Technologies Pvt. Ltd.
Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM DevKit Hardware User Guide
Disclaimer
iWave Systems reserves the right to change details in this publication including but not limited to any Product
specification without notice.
No warranty of accuracy is given concerning the contents of the information contained in this publication. To the
extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by iWave
Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or
inaccuracies in this document.
CPU and other major components used in this product may have several silicon errata associated with it. Under no
circumstances, iWave Systems shall be liable for the silicon errata and associated issues.
Trademarks
All registered trademarks, product names mentioned in this publication are the property of their respective owners
and used for identification purposes only.
Certification
iWave Systems Technologies Pvt. Ltd. is an ISO 9001:2015 Certified Company.
Warranty & RMA
Warranty support for Hardware: 1 Year from iWave or iWave's EMS partner.
For warranty terms, go through the below web link,
http://www.iwavesystems.com/support/warranty.html
For Return Merchandise Authorization (RMA), go through the below web link,
http://www.iwavesystems.com/support/rma.html
Technical Support
iWave Systems technical support team is committed to provide the best possible support for our customers so that
our Hardware and Software can be easily migrated and used.
For assistance, contact our Technical Support team at,
Email : [e-mail]
Website : www.iwavesystems.com
Address : iWave Systems Technologies Pvt. Ltd.
# 7/B, 29th Main, BTM Layout 2nd Stage,
Bangalore, Karnataka,
India –560076

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iWave Systems Technologies Pvt. Ltd.
Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM DevKit Hardware User Guide
Table of Contents
1. INTRODUCTION.........................................................................................................................................................8
1.1 Purpose .............................................................................................................................................................8
1.2 Overview ...........................................................................................................................................................8
1.3 List of Acronyms................................................................................................................................................8
1.4 References ......................................................................................................................................................10
2. ARCHITECTURE AND DESIGN ..................................................................................................................................11
2.1 Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Carrier Board Block Diagram ..............................................11
2.2 Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Carrier Board Features .......................................................12
2.3 Board to Board Connectors.............................................................................................................................14
2.3.1 Board to Board Connector1........................................................................................................................14
2.3.2 Board to Board Connector2........................................................................................................................15
2.3.3 Board to Board Connector3........................................................................................................................16
2.3.4 Board to Board Connector4........................................................................................................................17
2.4 PS Interface Features......................................................................................................................................18
2.4.1 PS-GTR Transceivers....................................................................................................................................18
2.4.2 Gigabit Ethernet Port1 ................................................................................................................................30
2.4.3 Gigabit Ethernet Port2 ................................................................................................................................31
2.4.4 USB2.0 OTG Port .........................................................................................................................................32
2.4.5 Standard SD Port.........................................................................................................................................33
2.4.6 CAN0 Header...............................................................................................................................................34
2.4.7 Debug UART ................................................................................................................................................35
2.5 PL Interface Features ......................................................................................................................................36
2.5.1 GTH High Speed Transceivers .....................................................................................................................36
2.5.2 GTY High Speed Transceivers......................................................................................................................75
2.5.3 Pmod Host Port Connectors........................................................................................................................80
2.6 Additional Features.........................................................................................................................................82
2.6.1 Clock Synthesizers.......................................................................................................................................82
2.6.2 JTAG Connector...........................................................................................................................................84
2.6.3 IO Expanders ...............................................................................................................................................86
2.6.4 I2C Expander ...............................................................................................................................................89
2.6.5 GPIO Header................................................................................................................................................90
2.6.6 Power ON/OFF Switch.................................................................................................................................92
2.6.7 Reset Switch................................................................................................................................................93
2.6.8 RTC Coin Cell Holder ...................................................................................................................................94
2.6.9 12V Fan Header...........................................................................................................................................95
3. TECHNICAL SPECIFICATION.....................................................................................................................................96
3.1 Power Input Requirement ..............................................................................................................................96
3.2 Power Output Specification............................................................................................................................97
3.3 Environmental Characteristics........................................................................................................................98
3.3.1 Environmental Specification .......................................................................................................................98

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3.3.2 RoHS Compliance........................................................................................................................................98
3.3.3 Electrostatic Discharge................................................................................................................................98
3.4 Mechanical Characteristics .............................................................................................................................99
3.4.1 Carrier Board Mechanical Dimensions........................................................................................................99
4. ORDERING INFORMATION....................................................................................................................................101

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List of Figures
Figure 1: Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Carrier Board Block Diagram ...............................................11
Figure 2: Board to Board Connector1 .............................................................................................................................14
Figure 3: Board to Board Connector2 .............................................................................................................................15
Figure 4 Board to Board Connector3 ..............................................................................................................................16
Figure 5 Board to Board Connector4 ..............................................................................................................................17
Figure 6: PS-GTR External Switch Connectivity...............................................................................................................18
Figure 7: PS-GTR Lane Selection Switch..........................................................................................................................19
Figure 8: PCIe x4 Connector............................................................................................................................................20
Figure 9: Display Port Connector ....................................................................................................................................23
Figure 10: USB Type-C Connector...................................................................................................................................25
Figure 11: M.2 SATA Connector (Key M) ........................................................................................................................27
Figure 12: Gigabit Ethernet Connector1.........................................................................................................................30
Figure 13: Gigabit Ethernet Connector2.........................................................................................................................31
Figure 14: USB OTG Connector.......................................................................................................................................32
Figure 15: Standard SD Connector..................................................................................................................................33
Figure 16: CAN0 Header..................................................................................................................................................34
Figure 17: Debug UART Connector .................................................................................................................................35
Figure 18: SFP+ Connector with Cage .............................................................................................................................37
Figure 19: SDI Video IN HD BNC Connector....................................................................................................................39
Figure 20: SDI Video OUT HD BNC Connector ................................................................................................................40
Figure 21 HDMI IN Connector.........................................................................................................................................41
Figure 22 HDMI OUT Connector .....................................................................................................................................42
Figure 23: FMC Connector ..............................................................................................................................................43
Figure 24: FMC HPC Connector Pin Out..........................................................................................................................44
Figure 25: FMC+ Connector ............................................................................................................................................56
Figure 26: FMC+ HPC Connector Pin Out........................................................................................................................57
Figure 27 QSFP28/QSFP+/QSFP+ Connector with Cage..................................................................................................75
Figure 28 FireFly Connector............................................................................................................................................77
Figure 29: Pmod Host Port Connectors ..........................................................................................................................80
Figure 30: JTAG Connector..............................................................................................................................................84
Figure 31 I2C Tree ...........................................................................................................................................................89
Figure 32: GPIO Header...................................................................................................................................................90
Figure 33: Power On/Off Switch .....................................................................................................................................92
Figure 34: Reset Switch...................................................................................................................................................93
Figure 35: RTC Coin Cell Holder ......................................................................................................................................94
Figure 36: 12V-Fan Header .............................................................................................................................................95
Figure 37: Power Jack......................................................................................................................................................96
Figure 38: Carrier board Mechanical dimension –Top View..........................................................................................99
Figure 39: Carrier board Mechanical dimension –Side View.......................................................................................100

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List of Tables
Table 1: Acronyms & Abbreviations..................................................................................................................................8
Table 2: Terminology ......................................................................................................................................................10
Table 3: PS-GTR Lane Selection Switch Setting...............................................................................................................19
Table 4: PCIe x4 Connector Pin Assignment ...................................................................................................................21
Table 5: USB TypeC Pin Assignment................................................................................................................................26
Table 6: M.2 SATA Connector Pin Assignment ...............................................................................................................28
Table 7: CAN0 Header Pin Assignment ...........................................................................................................................34
Table 8: SFP+ Connector Pin Assignment .......................................................................................................................38
Table 9: FMC HPC Connector Pin Assignment................................................................................................................45
Table 10: FMC+ HPC Connector Pin Assignment ............................................................................................................58
Table 11 QSFP28/QSFP+/QSFP Connector Pin Out.........................................................................................................76
Table 12 FireFly Data Connector Pin Out........................................................................................................................78
Table 13 FireFly Power Connector Pin Out .....................................................................................................................79
Table 14: Pmod Connector1 Pin Assignment..................................................................................................................81
Table 15: Pmod Connector2 Pin Assignment..................................................................................................................81
Table 16: Clock Synthesizer 1 Output Clocks..................................................................................................................82
Table 17 Clock Synthesizer 2 Output Clocks ...................................................................................................................83
Table 18: JTAG Header Pin Assignment ..........................................................................................................................85
Table 19 IO EXPANDER 1 Output ....................................................................................................................................86
Table 20 IO EXPANDER 2 Output ....................................................................................................................................87
Table 21 IO EXPANDER 3 Output ....................................................................................................................................88
Table 22: GPIO Header Pin Assignment..........................................................................................................................90
Table 23: 12V Fan Header Pinout ...................................................................................................................................95
Table 24: Power Input Requirement...............................................................................................................................96
Table 25: Power Output Specification ............................................................................................................................97
Table 26: Environmental Specification ...........................................................................................................................98
Table 27: Orderable Product Part Numbers .................................................................................................................101

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1. INTRODUCTION
1.1 Purpose
The Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Development platform incorporates Zynq Ultrascale+ MPSoC
(ZU11/17/19EG) based SOM and Ultra-High-Performance Carrier board for complete validation of Zynq Ultrascale+
MPSoC (ZU11/17/19EG) functionality. This document is the Hardware User Guide for the Zynq Ultrascale+ MPSoC
(ZU11/17/19EG) Carrier Board and provides detailed information on the overall design & usage of the Carrier Board
from a Hardware Systems perspective. The details about the Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM hardware
is explained in another document “iW-RainboW-G35M-Zynq-Ultrascale+MPSoC(ZU11/17/19EG)-SOM-
HardwareUserGuide”.
1.2 Overview
iWave's Zynq Ultrascale+ MPSoC (ZU11/17/19EG) Development platform comes with Zynq Ultrascale+ MPSoC
(ZU11/17/19EG) SOM and the Ultra-High-Performance Carrier Board. The development board can be used for quick
prototyping of various applications targeted by the Zynq Ultrascale+ MPSoC (ZU11/17/19EG). With the
140mmx170mm size, carrier board is packed with all the necessary on-board connectors to validate the features of
Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM.
1.3 List of Acronyms
The following acronyms will be used throughout this document.
Table 1: Acronyms & Abbreviations
Acronyms
Abbreviations
ARM
Advanced RISC Machine
B2B
Board to Board
CAN
Controller Area Network
CH
Channel
CMOS
Complementary Metal Oxide Semiconductor
DP
Display Port
FPGA
Field Programmable Gate Array
FMC
FPGA Mezzanine Card
FMC+
FPGA Mezzanine Card Plus
Gbps
Gigabits per sec
GEM
Gigabit Ethernet Controller
GPIO
General Purpose Input Output
HDMI
High Definition Multimedia Interface
HPC
High Pin Count
I2C
Inter-Integrated Circuit
IC
Integrated Circuit

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Acronyms
Abbreviations
JTAG
Joint Test Action Group
LVCMOS
Low Voltage Complementary Metal Oxide Semiconductor
LVDS
Low Voltage Differential Signal
Mbps
Megabits per sec
MHz
Mega Hertz
NC
No Connect
NPTH
Non Plated Through Hole
PCB
Printed Circuit Board
PCIe
Peripheral Component Interconnect Express
PMOD
Peripheral Module
PTH
Plated Through Hole
RGMII
Reduced Gigabit Media Independent Interface
RTC
Real Time Clock
RX
Receiver
SATA
Serial Advanced Technology Attachment
SDI
Serial Digital Interface
SDIO
Secure Digital Input Output
SDHI
SD Card Host Interface
SFP
Small Form-factor Pluggable
SOM
System On Module
TXVR
Transceiver
TX
Transmitter
UART
Universal Asynchronous Receiver/Transmitter
USB
Universal Serial Bus
USB OTG
USB On The Go
QSFP+
Quad Small Form-factor Pluggable

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Terminology Description
In this document, wherever Signal Type is mentioned, below terminology is used.
Table 2: Terminology
Terminology
Description
I
Input Signal
O
Output Signal
IO
Bidirectional Input/output Signal
CMOS
Complementary Metal Oxide Semiconductor Signal
DIFF
Differential Signal
OD
Open Drain Signal
OC
Open Collector Signal
Analog
Analog Signal
Power
Power Pin
PU
Pull Up
PD
Pull Down
NA
Not Applicable
NC
Not Connected
Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and only includes
the pull-ups or pull-downs implemented on board.
1.4 References
•Zynq Ultrascale+ MPSoC Datasheet & Reference Manual
•Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Hardware User Guide

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2. ARCHITECTURE AND DESIGN
This section provides detailed information about the Zynq Ultrascale+ MPSoC (ZU11/17/19EG) Development platform
carrier board features with high level block diagram and detailed information about each block.
2.1 Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Carrier Board Block Diagram
Figure 1: Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Carrier Board Block Diagram

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2.2 Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Carrier Board Features
The Zynq Ultrascale+ MPSoC (ZU11/17/19EG) Carrier board supports the following features to validate the Zynq
Ultrascale+ MPSoC (ZU11/17/19EG) SOM supported interfaces.
PS Interface Features
•PS GTR Features:
•PCIex1 Connector x 1
•Display Port Connector x 1
•USB 3.0 OTG through Type C Connector x 1
•M.2 SATA Connector x 1
•Gigabit Ethernet through RJ45MagJack (GEM0) x 1
•Gigabit Ethernet through RJ45MagJack (GEM3) x 1
•USB2.0 OTG through Micro AB Connector x 1
•Standard SD Connector x 1
•CAN Header x 1
•Debug UART through USB Micro AB Connector x 1
PL Interface Features
•SFP+ Connector x 1
•SDI Video IN through HD BNC Connector x 1
•SDI Video OUT through HD BNC Connector x 1
•HDMI IN x 1
•HDMI OUT x 1
•QSFP28/QSFP+/QSFP Connector x 1
•FireFly Connector x 1
•FMC High Pin Count (HPC) Connector
➢10 GTH High Speed Transceivers
➢2 GTH Reference Clock
➢Upto 15 LVDS IOs/30 Single ended (SE) IOs
➢Upto 4 Single ended (SE) IOs
➢2 Clock Input Capable LVDS/SE pins
➢1 Clock Output Capable LVDS/SE pins

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•FMC+ High Pin Count (HPC) Connector
➢16 GTH High Speed Transceivers
➢8 GTY High Speed Transceivers
➢Upto 18 LVDS IOs/36 Single ended (SE) IOs
➢Upto 4 Single ended (SE) IOs
➢3 Clock Input Capable LVDS/SE pins
➢2 Clock Output Capable LVDS/SE pins
•PMOD Connector x 2
Additional Features
•Clock Synthesizers/Generators x2
•JTAG Connector x 1
•16-Bit IO Expanders x 3
•I2C Expander x 1
•20 Pin GPIO Header x 1
•Power ON/OFF DIP Switch x 1
•Reset Pushbutton Switch x 1
•RTC Coin Cell Holder x 1
•12V FAN Header x 1
General Specification
•Power Supply : DC 12V, 15A Power Input Jack
•Form Factor : 140mm X 170mm

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2.3 Board to Board Connectors
The Zynq Ultrascale+ MPSoC (ZU11/17/19EG) carrier board supports four Board to Board mating connectors for Zynq
Ultrascale+ MPSoC SOM attachment. This Board to Board connector are capable of handling high-speed serialized
signals and can be used for size constrained embedded applications.
2.3.1 Board to Board Connector1
Board to Board Connector1 (J18) is physically located at the top of the board as shown below.
Note: For the Board to Board Connector1 pinout, refer the Zynq Ultrascale+ MPSoC (ZU11/17/19EG)SOM Hardware
User Guide.
Figure 2: Board to Board Connector1

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2.3.2 Board to Board Connector2
Board to Board Connector2 (J19) is physically located at the top of the board as shown below.
Note: For the Board to Board Connector2 pinout, refer the Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Hardware
User Guide.
Figure 3: Board to Board Connector2

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2.3.3 Board to Board Connector3
Board to Board Connector3 (J12) is physically located at the top of the board as shown below.
Note: For the Board to Board Connector3 pinout, refer the Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Hardware
User Guide.
Figure 4 Board to Board Connector3

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2.3.4 Board to Board Connector4
Board to Board Connector3 (J11) is physically located at the top of the board as shown below.
Note: For the Board to Board Connector4 pinout, refer the Zynq Ultrascale+ MPSoC (ZU11/17/19EG) SOM Hardware
User Guide.
Figure 5 Board to Board Connector4

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2.4 PS Interface Features
The features which are supported from Zynq Ultrascale+ MPSoC (ZU11/17/19EG) PS is explained in the following
section.
2.4.1 PS-GTR Transceivers
The Zynq Ultrascale+ MPSoC (ZU11/17/19EG) Carrier board supports different high speed interfaces through four PS-
GTR lanes (two from B2B-1 and two from B2B-2). Each PS-GTR lane is connected to High speed MUX/DEMUX IC to
support different high speed interfaces as mentioned below.
ox1, x2, or x4 lane of PCIe at Gen1 (2.5Gb/s) or Gen2 (5.0Gb/s) rates
o1 or 2 lanes of DisplayPort (TX only) at 1.62Gb/s, 2.7Gb/s, or 5.4Gb/s
o1 SATA port at 1.5Gb/s, 3.0Gb/s, or 6.0Gb/s
o1 USB3.0 port at 5.0Gb/s
The MUX/DEMUX connection and interface selection option is shown below for easy understanding. The selection
control of each MUX IC is connected to PS-GTR Lane selection 4bit DIP switch (SW6).
Figure 6: PS-GTR External Switch Connectivity.

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The PS-GTR Lane selection switch (SW6) setting and corresponding interface selection option is explained below.
Table 3: PS-GTR Lane Selection Switch Setting
PS-GTR Lanes
PS-GTR Lane Selection Switch (SW6)
Switch Bit
Number
Switch Bit Position
OFF
ON
Lane0
Bit1
PS-GTR Lane0 is connected to Lane0
of PCIe x4 connector (default)
PS-GTR Lane0 is connected to Lane1
of DP connector
Lane1
Bit2
PS-GTR Lane1 is connected to Lane1
of PCIe x4 connector
PS-GTR Lane1 is connected to Lane0
of DP connector (default)
Lane2
Bit3
PS-GTR Lane2 is connected to Lane2
of PCIe x4 connector
PS-GTR Lane2 is connected to Lane1
of USB3.0 TypeC connector (default)
Lane3
Bit4
PS-GTR Lane3 is connected to Lane3
of PCIe x4 connector
PS-GTR Lane3 is connected to M.2
SATA connector (default)
Figure 7: PS-GTR Lane Selection Switch

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2.4.1.1 PCIe x4 Connector
The Zynq Ultrascale+ MPSoC (ZU11/17/19EG) Carrier board supports one PCIe x4 connector through PS-GTR Lanes of
Zynq Ultrascale+ MPSoC (ZU11/17/19EG) PS. All the four PS-GTR lanes from Board to Board Connectors are connected
to PCIe x4 connector to support x1, x2 & x4 PCIe devices. The PS-GTR Lane selection to PCIe x4 connector is done
through PS-GTR Lane Selection Switch (SW6). The Carrier board provides 100MHz reference clock to PCIe x4 connector
from on board Clock Synthesizer1. This PCIe x4 connector (J26) is physically located at the top of the board as shown
below.
Note: For more details on PS-GTR Lane selection options, refer Table 3.
Figure 8: PCIe x4 Connector