Keysight Technologies DDR5 User manual

Keysight DDR5 Decoder
User’s Guide

2DDR5 Decoder User’s Guide
Notices
© Keysight Technologies 2022
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Software Release
07.00.0000
Edition
April 2022
Available in electronic format only
Keysight Technologies
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Colorado Springs, CO 80907 USA
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Safety Notices
CAUTION
A CAUTION notice denotes a hazard. It
calls attention to an operating proce-
dure, practice, or the like that, if not
correctly performed or adhered to,
could result in damage to the product
or loss of important data. Do not pro-
ceed beyond a CAUTION notice until
the indicated conditions are fully
understood and met.
WARNING
A WARNING notice denotes a hazard.
It calls attention to an operating pro-
cedure, practice, or the like that, if not
correctly performed or adhered to,
could result in personal injury or
death. Do not proceed beyond a
WARNING notice until the indicated
conditions are fully understood and
met.

DDR5 Decoder User’s Guide 3
Safety Summary
The following general safety precautions must be observed during all phases of operation of this
instrument. Failure to comply with these precautions or with specific warnings or operating
instructions in the product manuals violates safety standards of design, manufacture, and intended
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with these requirements. Product manuals are provided with your instrument on CD-ROM and/or in
printed form. Printed manuals are an option for many products. Manuals may also be available on
the Web. Go to www.keysight.com and type in your product number in the Search field at the top of
the page.
General Do not use this product in any manner not specified by the manufacturer. The protective features of
this product may be impaired if it is used in a manner not specified in the operation instructions.
Before Applying
Power
Verify that all safety precautions are taken. Make all connections to the unit before applying power.
Note the instrument's external markings described in “Safety Symbols”.
Ground the
Instrument
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be connected to an electrical ground to minimize shock hazard. The ground pin must be firmly
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Fuses See the user's guide or operator's manual for information about line-fuse replacement. Some
instruments contain an internal fuse, which is not user accessible.
Do Not Operate in
an Explosive
Atmosphere
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Do Not Remove the
Instrument Cover
Only qualified, service-trained personnel who are aware of the hazards involved should remove
instrument covers. Always disconnect the power cable and any external circuits before removing the
instrument cover.
Cleaning Clean the outside of the instrument with a soft, lint-free, slightly dampened cloth. Do not use
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product to an Keysight Sales and Service Office for service and repair to ensure that safety features
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In Case of Damage Instruments that appear damaged or defective should be made inoperative and secured against
unintended operation until they can be repaired by qualified service personnel.
CAUTION
A CAUTION notice denotes a hazard. It calls attention to an operating procedure, practice,
or the like that, if not correctly performed or adhered to, could result in damage to the
product or loss of important data. Do not proceed beyond a CAUTION notice until the
indicated conditions are fully understood and met.
WARNING
A WARNING notice denotes a hazard. It calls attention to an operating procedure,
practice, or the like that, if not correctly performed or adhered to, could result in
personal injury or death. Do not proceed beyond a WARNING notice until the indicated
conditions are fully understood and met.

4DDR5 Decoder User’s Guide
Safety Symbols
Table 1 Safety Symbol
Symbol Description
Direct current
Alternating current
Both direct and alternating current
Three phase alternating current
Three phase alternating current
Earth ground terminal
Protective earth ground terminal
Frame or chassis ground terminal
Terminal is at earth potential
Equipotentiality
N Neutral conductor on permanently
installed equipment
L Line conductor on permanently installed
equipment
On (mains supply)
Off (mains supply)
Standby (mains supply). The instrument is
not completely disconnected from the
mains supply when the power switch is in
the standby position
In position of a bi-stable push switch

DDR5 Decoder User’s Guide 5
Out position of a bi-stable push switch
Equipment protected throughout by
DOUBLE INSULATION or REINFORCED
INSULATION
Caution, refer to accompanying
documentation
Caution, risk of electric shock
Do not apply around or remove from
HAZARDOUS LIVE conductors
Application around and removal from
HAZARDOUS LIVE conductors is
permitted
Caution, hot surface
Ionizing radiation
CAT I IEC Measurement Category I
CAT II Measurement Category II
CAT III Measurement Category III
CAT IV Measurement Category IV
Symbol Description

6DDR5 Decoder User’s Guide
Compliance and Environmental Information
Table 2 Compliance and Environmental Information
•
Safety Symbol Description
CSA is the Canadian certification mark to demonstrate compliance with the Safety
requirements.
The C-tick mark is a registered trademark of the Spectrum Management
Agency of Australia. This signifies compliance with the Australia EMC
Framework regulations under the terms of the Radio Communication Act
of 1992.
CE compliance marking to the EU Safety and EMC Directives.
ISM GRP-1A classification according to the international EMC standard.
ICES/NMB-001 compliance marking to the Canadian EMC standard.

DDR5 Decoder User’s Guide 7
Contents
Safety Summary 3
Compliance and Environmental Information 6
1 DDR5 Decoder - Overview
Flow of steps to use the DDR5 Decoder 1
Related Tools 1
When to Use the DDR5 Decoder 1
Required Hardware, Software, and Licenses 2
2 Setting Up DDR5 Bus Decode
Hardware Setup for DDR5 Bus Decode 4
Logic Analyzer Measurement Setup for DDR5 Bus Decode 5
Sample Logic Analyzer Setup for DDR5 Decode 6
To create a configuration file 6
To configure DDR5 Decoder Settings 6
Sampling Positions 7
3 Capturing Data
4 Understanding DDR5 Decode Displayed in the Listing Window
Data Generated by the DDR5 Decoder 13
DDR5 Bus Decode 13
Decode Errors 13
To find commands of a specific type in the listing 14
To filter or colorize decoded data display 15
5 Troubleshooting the DDR5 Decoder
Hardware Related Checks 18
Software Related Checks 19
Common Problems and Recommended Solutions 20

8DDR5 Decoder User’s Guide
Contents

DDR5 Decoder
User’s Guide
1DDR5 Decoder - Overview
The Keysight DDR5 Decoder software lets you decode and view transactions and commands from a
DDR5 SDRAM memory bus in your device under test.
This decoder works with the Keysight Logic and Protocol Analyzer software application (in online /
offline mode) to decode the acquired DDR5 traces. The data acquisition can be done using a
compatible Keysight Logic Analyzer module. See “Required Hardware, Software, and Licenses" on
page 2 for details.
The decoded DDR5 data can then be viewed and analyzed using the Listing window in the Logic and
Protocol Analyzer application. DDR5 data is displayed as raw hexadecimal data in this window. The
decoder does not inverse assemble the data payload. It shows the decode of the traffic at any given
point in the trace.
Flow of steps to use the DDR5 Decoder
1 Install the required software and licenses.
2 Set up the logic analyzer module, probing hardware, and connections to DUT.
3 Configure the Logic and Protocol Analyzer software setup and DDR5 Decoder settings as per
your testing requirements.
4 Capture DDR5 data.
5 View and analyze the decoded data in the Listing window.
Related Tools
•TheDDR Setup Assistant is a wizard-like application that helps you set up your logic analyzer
properly for DDR data capture and analysis. It guides you through the setup process and
automates setting threshold voltages and sample positions for control/address signals. For more
information, see DDR Setup Assistant - At a Glance.
•TheDDR Eyescan tool helps you set the logic analyzer threshold and sampling positions for read
data and write data signals.
•TheLPDDR5 Decoder tool to decode and view transactions and commands from an LPDDR5
SDRAM memory bus.
•TheDDR/LPDDR Memory Analysis Viewer to analyze the captured DDR/LPDDR memory data
using various charts and statistical data such as traffic statistics, bus utilization, refresh rate
analysis, and data for Read/Write commands.
When to Use the DDR5 Decoder
There are situations when the DDR5 Decoder is more suitable and provides key benefits as compared
to the Keysight DDR/LPDDR Memory Analysis viewer. Following are examples of such situations.
• The DDR5 Decoder does not decode the entire trace in one go. At a time, it decodes only that
specific portion of your trace that you are currently viewing in its Listing window. This significantly
reduces the time it takes to decode and display results. This is especially useful when you have a
long trace to decode and you want to immediately view the decoded information.

1 Setting Up for LPDDR Bus Decode
2DDR5 Decoder User’s Guide
• The DDR5 Decoder can show information from multiple subchannels of your DDR5 memory
design in a single Listing window. The subchannels information is time-correlated and presented
as separate columns in a single listing window. This eliminates the need to have a separate viewer
for each subchannel's information.
While DDR5 Decoder has key strengths, it is recommended to use the DDR/LPDDR Memory Analysis
viewer instead of DDR5 Decoder in the following situations:
• If you want to specify how your SDRAM address components (rank, bank, row, and column
addresses) are used to construct an overall physical address so that the reconstructed address
can be displayed for each read or write operation. then you should use the DDR/LPDDR Memory
Analysis viewer. The DDR5 Decoder does not support physical address reconstruction.
• If you want to view the details (memory address and Read/Write data) for the individual Read or
Write commands, then you should use the Details tab of the DDR/LPDDR Memory Analysis
viewer. The DDR5 Decoder does not show the data associated with a Read or Write command.
• If you want to do higher-level analysis such as analyzing your SDRAM's traffic statistics, Refresh
rate, or performance measurements for data transfer rates and memory utilization, then you
should use various charts and statistics provided in different tabs of the DDR/LPDDR Memory
Analysis viewer. The DDR5 Decoder does not provide any of these higher-level analysis features
and is focused on displaying traffic decode at a given point in the trace.
Required Hardware, Software, and Licenses
On installing the DDR5 Decoder software, you can access this tool from the following location in the
Logic and Protocol Analyzer GUI.
Required Hardware Required Software Required License
•U4164A Logic Analyzer module
to capture DDR5 data
•DDR5 memory bus probes such
as W5643A DDR5 78-ball BGA
Interposer
•Logic and Protocol Analyzer
software version 7.0 or higher
•DDR5 Decoder software
These can be downloaded and
installed from:
www.keysight.com/find/lp
a-sw-download
No separate license is needed specifically for the
DDR5 Decoder. However, you must have installed
the following standard memory license for DDR5.
B4661A-5TP/5FP/5NP DDR5 Analysis and
Compliance Validation license
Without this license, you can only view and analyze
the decoded DDR5 data from an existing .ala file in
offline mode.

DDR5 Decoder
User’s Guide
2Setting Up DDR5 Bus Decode
The topics in this section describe how to set up the logic analysis system hardware and software
components for DDR5 bus decode.

2 Setting Up for LPDDR Bus Decode
4DDR5 Decoder User’s Guide
Hardware Setup for DDR5 Bus Decode
1. Connect the probe to your device under test (DUT).
2. Connect the logic analyzer pods to the probe.
Each probe has its own user's guide that describes in detail how to make these connections. You can
download the user's guide from the probe's page at www.keysight.com.
CAUTION
When you are working with the logic analyzer, be sure to power down
both the analyzer and device under test before disconnecting or
connecting cables or probes. Otherwise, you may damage circuitry in the
analyzer or device under test.

DDR5 Decoder User’s Guide 5
Setting Up for LPDDR Bus Decode 2
Logic Analyzer Measurement Setup for DDR5 Bus Decode
To configure the Logic Analyzer measurement setup for DDR5 decode, you use the DDR Setup
Assistant. This tool is available at no charge as part of the Keysight B4661A memory analysis
software package.
The DDR Setup Assistant is a wizard-like application that helps you set up your logic analyzer
properly for DDR data capture and analysis. This tool simplifies the measurement setup by guiding
you through the setup process and automating the threshold voltages and sample positions settings
for control/address signals.
The following two scenarios are applicable when using the DDR Setup Assistant to create Logic
Analyzer measurement setup.
Scenario 1: You are using a standard probing solution
In this case, a standard DDR5 configuration file is available for the probing solution being used. A set of standard DDR5
configuration files is provided when you install the DDR5 Decoder software.
The DDR Setup Assistant wizard automatically:
•loads the appropriate standard configuration file matching the standard probing solution details that you provided in
the wizard.
•sets the required buses and signals.
•adds the DDR5 Decoder tool and a Listing window in the Logic and Protocol Analyzer GUI.
Scenario 2: You are using a custom probing solution
In this case:
1. Create your own custom DDR5 configuration file. You use the DDR Custom Configuration Creator tool installed with the
B4661A Memory Analysis SW package to create custom files.
2. Run the DDR Setup Assistant and load your custom configuration file in the third step of the wizard as shown below.
See: “To create a configuration file" on page 6

2 Setting Up for LPDDR Bus Decode
6DDR5 Decoder User’s Guide
Sample Logic Analyzer Setup for DDR5 Decode
To create a configuration file
The Keysight-provided configuration files are valid only when used with the corresponding memory
probe and DRAM for which these are designed.
If you are using some other probing scheme or have a unique DRAM configuration that is not
addressed by these standard configuration files, then you must create your own configuration file
using the DDR Custom Configuration Creator tool. This tool simplifies the procedure of custom
configuration file creation and ensures that all the layout information (buses and signals definitions)
needed by DDR5 Decoder is included in the created configuration file.
This tool is included in the Keysight B4661A DDR/LPDDR Tools package and is available only after
you install this package.
To know more about this tool, refer to its online help that gets installed with this tool’s software.
To configure DDR5 Decoder Settings
To ensure that the acquired DDR5 data is decoded accurately, you need to configure the DDR5
Decoder settings. Use the Settings dialog to tell the decoder which chip selects will be used by your
device under test and to specify how the decoder should work.
To access the Settings dialog
From the main menu bar, select Tools > DDR5 Decoder > Settings.
or
In the Overview display, click the Settings button on the DDR5 Decoder tool.
NOTE
In the logic analyzer measurement setup, the DDR5 Decoder tool can be
attached to the U4164A Logic Analyzer module or a Data Import module as
displayed in the above screen. You can also attach a Filter tool to the DDR5
Decoder tool to filter the decoded data display based on your specific
analysis requirements. But you cannot attach the DDR5 Decoder tool to
another decoder or Memory Analysis Viewer.

DDR5 Decoder User’s Guide 7
Setting Up for LPDDR Bus Decode 2
Sampling Positions
Sampling positions tell the logic analyzer when each signal is valid. Correct sampling positions are
required for Command and Address, Read Data, and Write Data to reliably capture data on your bus.
Field Description
Chip Selects You must enable all chip selects that are being used in the system to ensure that the decoder functions correctly.
Likewise, any chip selects that are not used must not be enabled.
Refresh Management Select this checkbox if your DDR5 bus is using the Refresh Management (RFM) feature and therefore you want to
instruct the decoder to account for the occurrence of Refresh Management commands.
Timing Select the Timing option that matches the timing mode in which your memory bus is operating.
Rank Addressing Select the appropriate rank addressing mode option based on the rank addressing being used for your DDR5 bus.
In the Standard rank addressing, there is one CS# (chip select) line for each rank.
In the 3DS rank addressing, there is only one CS# line for all ranks. Therefore, the logical value of the C (Chip ID)
bits is used to identify the rank being addressed in the decode. The number of Chip ID bits to be used for rank
identification is as per the 3DS specifications.
From the available 3DS rank addressing options (2-high, 4-high, 8-high, or 16-high), select the appropriate option
based on whether your 3DS device has two, four, eight, or sixteen logical ranks.
Burst Length Select the burst length applicable to your SDRAM that is, how many data bytes are written to or read from the
SDRAM after a Read or a Write command is given along with row and column address. The burst length options
vary depending on the memory type.
The option BL32 OTF (On the Fly) indicates that burst length can vary for each Read/Write command. If you select
this option, the decoder automatically determines if the burst length of the operation is 16 or 32.
The option BC8 OTF (On the Fly) indicates that burst length can vary for each Read/Write command. If you select
this option, the decoder automatically determines if the burst length of the operation is 8 or 16.
Match Read/Write to Activate Select this checkbox if you want the decoder to match the Read and Write commands to the corresponding
Activate commands in the captured data.
Max Search Depth This field is enabled only when you select the Match Read/Write to Activate checkbox.
This field allows you to specify the limit for the number of row addresses that the Decoder should search to find a
matching Activate corresponding to a Read or a Write command in the captured data.
The default value is 1024.
This limit is specially useful when:
- you have qualified the storage to NOT store the Activates.
- the Activate may not be available for some read/write commands. For instance, during the initialization phase of
the DDR5 bus.
By specifying a shorter search limit, you can significantly reduce the processing time taken by the decoder in
searching extensively for the matching Activates in situations such as those mentioned above. However, if you
notice that the search limit is so short that the Activates present in the trace are not being found by Decoder and
the decode for Read/Write is showing "Row Address = Unknown", then you can increase this limit.

2 Setting Up for LPDDR Bus Decode
8DDR5 Decoder User’s Guide
If you need assistance in setting sampling positions correctly, please contact your Keysight
Technologies representative.
NOTE
The DDR Setup Assistant tool automatically sets the required sampling
positions on your DDR command, address, and data read and write signals.

DDR5 Decoder
User’s Guide
3Capturing Data
To capture data, the logic analyzer must run a measurement and then end the measurement (either
manually or by detecting a trigger).
1 Set the logic analyzer with the desired trigger.
2 Run the logic analyzer.
3 Run the device under test.
The logic analyzer will trigger when the specified condition is found on the bus.

3 Capturing Data
10 DDR5 Decoder User’s Guide

DDR5 Decoder
User’s Guide
4Understanding DDR5 Decode
Displayed in the Listing Win-
dow
The decoded DDR5 bus data is displayed as various columns in the Listing window. These columns
can be categorized in the following two categories:
• Buses and signals captured by logic analyzer
• Data generated by the DDR5 Decoder
NOTE
The DDR5 buses / signals labels displayed in the Listing differ based on
whether or not the probe that you are using has a clock divider.
When a probe is used with a clock divider, the logic analyzer clock runs at half
the speed of the DDR5 bus clock and the dual sampling mode is used to
capture two samples of the DDR5 bus per clock edge.
These dual samples require two labels for each signal (one for each sample).
For example, CS_1ST# and CS_2ND# labels for the two samples of CS#.

4 Capturing Data
12 DDR5 Decoder User’s Guide