Lattice Semiconductor HDMI-VIP-IB-EVN User manual

HDMI VIP Input Bridge Board
Evaluation Board User Guide
FPGA-EB-02008 Version 1.0
July 2017

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
2 FPGA-EB-02008-1.0
Contents
Acronyms in This Document .................................................................................................................................................3
Introduction ..................................................................................................................................................................4
1.1. Features...............................................................................................................................................................4
1.2. Further Information ............................................................................................................................................5
Functional Description ..................................................................................................................................................6
2.1. Switches ..............................................................................................................................................................6
2.2. HDMI Interface....................................................................................................................................................6
High-Speed Headers .....................................................................................................................................................7
Power Supply ................................................................................................................................................................9
Status Indicators and Test Points................................................................................................................................10
Ordering Information..................................................................................................................................................11
References ..........................................................................................................................................................................12
Technical Support Assistance .........................................................................................................................................12
Appendix A. HDMI VIP Input Bridge Board Schematics ......................................................................................................13
Appendix B. HDMI VIP Input Bridge Board Bill of Materials ...............................................................................................17
Revision History...................................................................................................................................................................19
Figures
Figure 1.1. Top Side of HDMI VIP Input Bridge Board...........................................................................................................4
Figure 1.2. Bottom Side of HDMI VIP Input Bridge Board ....................................................................................................5
Figure 2.1 Functional Block Diagram ....................................................................................................................................6
Figure 4.1. Power Supply ......................................................................................................................................................9
Figure A.1. Block Diagram...................................................................................................................................................13
Figure A.2. SiI1127A HDMI and GPIO Interface ..................................................................................................................14
Figure A.3. Power Decoupling.............................................................................................................................................15
Figure A.4. SiI1127A Power Decoupling..............................................................................................................................16
Tables
Table 2.1 SiI1127A 7-bit I2C Address.....................................................................................................................................6
Table 3.1 Connector J1 .........................................................................................................................................................7
Table 3.2 Connector J2 .........................................................................................................................................................8
Table 5.1 User LEDs.............................................................................................................................................................10
Table 5.2 Status LEDs ..........................................................................................................................................................10
Table 5.3 Test Points...........................................................................................................................................................10
Table 6.1 Reference Part Number ......................................................................................................................................11

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02008-1.0 3
Acronyms in This Document
A list of acronyms used in this document.
Acronym
Definition
DVI
Digital Visual Interface
GPIO
General Purpose Input/Output
HDCP
High-Definition Content Protection
HDMI
High Definition Multimedia Interface
I2C
Inter-Integrated Circuit
LDO
Low Dropout
TMDS
Transition-Minimized Differential Signaling
VIP
Video Interface Platform

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
4 FPGA-EB-02008-1.0
Introduction
This document describes the Lattice Semiconductor HDMI®VIP Input Bridge Board. This board is designed to work with
the Lattice Video Interface Platform board interconnect system. The key component of this board is the Lattice
Semiconductor SiI1127A HDMI Deep Color Receiver.
The contents of this user guide include descriptions of board components, schematics, and bill of materials.
1.1. Features
Key features of the HDMI VIP input bridge board include:
SiI1127A HDMI Deep Color Receiver
Supports Deep Color video resolution up to 12-bit, 1080p at 60 Hz
Video Input:
Two HDMI/DVI-compatible ports
The TMDS™ core runs at 25 MHz – 225 MHz
Dynamic cable equalization automatically detects the equalization required for the incoming signal
Video Output:
xvYCC to extended RGB
36-bit RGB/YCbCr 4:4:4
16/20/24-bit YCbCr 4:2:2
8/10/12-bit YCbCr 4:2:2 (ITU BT.656)
No HDCP support
Two Single-Link 19-pin HDMI Type-A connectors
Two 60 pin Rugged High-Speed Headers
Figure 1.1 shows the top view of the HDMI VIP input bridge board and its key components. Figure 1.2 on page 5 shows
the bottom view of the board.
Status and
User LEDs
HDMI Type A
Connectors
Status and
User LEDs
SW2
Sil1127A
SW1
User LED
Figure 1.1. Top Side of HDMI VIP Input Bridge Board

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02008-1.0 5
Upstream
Connector (J2)
Upstream
Connector (J1)
Figure 1.2. Bottom Side of HDMI VIP Input Bridge Board
1.2. Further Information
For more information on boards and kits available for the VIP system, visit http://www.latticesemi.com/boards.
For details about the SiI1127A device, refer to SiI9127A/SiI1127A HDMI Receiver with Deep Color Output Data Sheet
(SiI-DS-1059).
Refer to Appendix A and Appendix B for the schematics and BOM of the HDMI VIP Input Bridge board.

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
6 FPGA-EB-02008-1.0
Functional Description
The SiI1127A device receives up to 1080p @ 60 Hz HDMI-compliant digital audio and video from either HDMI Type A
Connector Port 1 or Port 2 and transmits RGB or YCbCr parallel video and I2S or SPDIF audio to connectors J1 and J2.
The SiI1127A device does not support HDCP decryption, therefore can only receive unencrypted video.
Sil1127
Parall el Video
I2S
I2C
SPDIF
Connectors J1/J2
HDMI/DVI Input
HDMI/DVI Input
HDMI
Type A
HDMI
Type A
Figure 2.1 Functional Block Diagram
The SiI1127A device is configured using the I2C interface from connector J2. The I2C registers monitor and control all
functions of the SiI1127A device, including selection of input. The Device Address Select Pin CI2CA on the SiI1127A
device is pulled low. Refer to Table 2.1 for the corresponding I2C Address. For configuration, refer to the
SiI9223/9233/9127 HDMI Receivers Programmer’s Reference (SiI-PR-1019) for detailed information. The Programmer’s
Reference requires an NDA with Lattice Semiconductor.
Table 2.1 SiI1127A 7-bit I2C Address
Block
CI2CA = 0
Device Address
0x30
2.1. Switches
There is one push button switch, SW1, which controls the reset signal RX_RST. When pressing the push-button, logic 0
will be sent to the SiI1127A RESET# pin. RX_RST is connected to GSRN on connecter J1, allowing SW1 to control the
reset signal for other connected boards.
There is one slide switch, SW2, which in connected to GPIO3/MUTEOUT of the SiI1127A device and Pin 28 of connector
J2. When this connection is being driven by either SiI1127A device or connector J2, SW2 should be placed in the HIGH
position (4.7K Ωpull-up resistor to 3.3 V) to prevent any contention.
2.2. HDMI Interface
There are two HDMI Type A connectors for connecting the HDMI VIP Input Board to an HDMI Source. ESD protection is
provided on the TMDS signals.

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02008-1.0 7
High-Speed Headers
There are two 60 pin high speed headers, connectors J1 and J2, used to connect to a host board.
Table 3.1 Connector J1
J1 Connector Pin
Signal Name
SiI1127A Pin
J1 Connector Pin
Signal Name
SiI1127A Pin
1
3.3 V
—
31
UP_GPIO26
Q25
2
3.3 V
—
32
UP_GPIO19
Q18
3
3.3 V
—
33
GND
—
4
3.3 V
—
34
UP_GPIO20
Q19
5
UP_GPIO31
Q30
35
GND
—
6
UP_GPIO5
Q4
36
GND
—
7
UP_GPIO32
Q31
37
UP_GPIO27
Q26
8
UP_GPIO6
Q5
38
GND
—
9
UP_GPIO33
Q32
39
UP_GPIO28
Q27
10
UP_GPIO7
Q6
40
GND
—
11
UP_GPIO34
Q33
41
RX_SDO
SDO
12
UP_GPIO8
Q7
42
UP_GPIO21
—
13
UP_GPIO1
Q0
43
RX_WS
WS
14
UP_GPIO9
Q8
44
UP_GPIO22
Q21
15
UP_GPIO2
Q1
45
RX_SCK
SCK
16
UP_GPIO10
Q9
46
UP_GPIO23
Q22
17
GND
—
47
RX_MCLK
MCLK
18
GND
—
48
UP_GPIO24
Q23
19
GND
—
49
CEC_D
CEC_D
20
GND
—
50
UP_GPIO29
Q28
21
UP_GPIO13
Q12
51
RX_SCDT
GPIO1/SCDT
22
GND
—
52
UP_GPIO30
Q29
23
UP_GPIO11
Q10
53
GND
—
24
UP_GPIO14
Q13
54
GND
—
25
UP_GPIO35
Q34
55
GND
—
26
UP_GPIO12
Q11
56
GND
—
27
UP_GPIO36
Q35
57
2.5 V
—
28
UP_GPIO17
Q16
58
2.5 V
—
29
UP_GPIO25
Q24
59
2.5 V
—
30
UP_GPIO18
Q17
60
2.5 V
—

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
8 FPGA-EB-02008-1.0
Table 3.2 Connector J2
J2 Connector Pin
Signal Name
SiI1127A pin
J2 Connector Pin
Signal Name
SiI1127A pin
1
3.3 V
—
23
GND
—
2
5 V
—
24
2.5 V
—
3
3.3 V
—
26
GND
—
4
5 V
—
28
RX_RST
RESET#
5
GND
—
30
RX_MUTE
GPIO3/MUTEOUT*
6
5V
—
32
RX_SPDIF
SPDIF
7
RODCK
ODCK
34
GND
—
8
GND
—
40
GND
—
9
GPIO0
GPIO0/XCLKOUT2
41
CSCL
CSCL
10
RVSYNC
VSYNC
43
CSDA
CSDA
11
GND
—
46
GND
—
12
UP_GPIO15
Q14
52
GND
—
13
RHSYNC
HSYNC
55
GND
—
14
GND
—
57
GND
—
15
UP_GPIO16
Q15
58
GND
—
16
RX_INT
INT
59
GND
—
17
GND
—
25, 27, 29,31, 33,
Not Connected
—
18
UP_GPIO4
Q3
35, 36, 37, 38, 39,
19
RDE
DE
42, 44, 45, 47, 48,
20
GND
—
49, 50, 51, 53, 54,
21
UP_GPIO3
Q2
56, 60
22
2.5 V
—
*Note: Connected to SW2

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02008-1.0 9
Power Supply
Board power is supplied through connectors J1 and J2.
5 V from J2
3.3 V from
J1 and J2
TVPWR5V
LDO 1.2 V Core and I/O VCC, 500 mA
3.3 V Core and I/O VCC Status
LED D1
Status
LED D1
Status
LED D5
Figure 4.1. Power Supply

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
10 FPGA-EB-02008-1.0
Status Indicators and Test Points
Three discrete LEDs are available to the user. These are driven by the SiI1127A.
Table 5.1 User LEDs
Signal
LED #
SiI1127A Pin
Color
PORT_1
D23
14 (GPIO4)
Green
PORT_2
D22
15 (GPIO5)
Green
SCDT
D25
12 (GPIO1/SDCT)
Green
Two discrete LEDs are used as status indicators. These are driven by the HDMI Ports.
Table 5.2 Status LEDs
Signal
LED #
Source
Color
RPWR1
D24
Port 1 - HDMI 5 V
Blue
RPWR2
D3
Port 2 - HDMI 5 V
Blue
Table 5.3 Test Points
Test Point
Connection
TP10
SiI1127A Pin16/GPIO6
TP11
SiI1127A Pin17/GPIO7
TP14
RPWR1
TP15
RPWR2
TP16
RX_MUTE
TP17
RX_SPDIF

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02008-1.0 11
Ordering Information
Visit www.latticesemi.com/boards for the latest ordering information.
Table 6.1 Reference Part Number
Description
Ordering Part Number
HDMI VIP Input Bridge Board
HDMI-VIP-IB-EVN

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
12 FPGA-EB-02008-1.0
References
For more information, refer to:
SiI9127A/SiI1127A HDMI Receiver with Deep Color Output Data Sheet (SiI-DS-1059)
SiI9223/9233/9127 HDMI Receivers Programmer’s Reference (SiI-PR-1019) (The Programmer’s Reference requires
an NDA with Lattice Semiconductor)
Lattice Embedded Vision Development Kit User Guide (FPGA-UG-02015)
ECP5 VIP Processing Board (FPGA-EB-02001)
Technical Support Assistance
Submit a technical support case through www.latticesemi.com/techsupport.

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02008-1.0 13
Appendix A. HDMI VIP Input Bridge Board Schematics
Figure A.1. Block Diagram

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
14 FPGA-EB-02008-1.0
Figure A.2. SiI1127A HDMI and GPIO Interface
Board Modification:
Pins 27 and 29 of connector J2
have been removed and a
jumper wire now connects
GPIO2 to RX_MUTE

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02008-1.0 15
Figure A.3. Power Decoupling

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
16 FPGA-EB-02008-1.0
Figure A.4. SiI1127A Power Decoupling

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02008-1.0 17
Appendix B. HDMI VIP Input Bridge Board Bill of Materials
Item
Reference
Qty
Part
PART_NUMBER
Manufacturer
Description
1
CN2, CN3
2
HDMI-A
685119134923
Wurth Electronics
CONN RCPT HDMI 19POS SMD R/A
2
C3
1
0.1 F
C0402C104K4RACTU
Kemet
CAP CER 0.1F 16V X7R 0402
3
C4, C52
2
18 pF
C0402C180K3GACTU
Kemet
CAP CER 18PF 25V C0G 0402
4
C6, C8, C9, C11, C13, C14,
C16, C18, C19, C21, C24,
C26, C27, C29, C49, C58,
C59, C60, C61, C62
20
100 nF
C0402C104K4RACTU
Kemet
CAP CER 0.1 F 16 V X7R 0402
5
C10, C15, C23, C31, C32,
C53, C55, C56, C57
9
10 F
THJB106K016SJN
AVX
Tantalum Capacitors –Solid SMD 16 V 10 F 10%
6
C38, C39
2
0.1 
CL05A104MP5NNNC
Samsung
CAP CER 0.1 F 10 V X5R 0402
7
C40, C41
2
10 
CL10X106MP8NRNC
Samsung
CAP CER 10 F 10 V 20% X6S 0603
8
C42, C43, C54
3
10 nF
ECJ0EB1E103K
Panasonic
CAP CER 10000 PF 25 V X7R 0402
9
D1, D5, D6, D22, D23, D25
6
Green
LTST-C190KGKT
LITE-On INC
LED GREEN CLEAR 0603 SMD
10
D3, D24
2
Blue
SMLE12BC7TT86
Rohm Semiconductor
LED BLUE CLEAR 0603 SMD
11
GND1, GND2, GND3, GND4,
5 V, TP10, TP11, TP12, 1V2,
TP13, TP16, TP17, 3V3
13
TP_S_40_63
—
—
—
12
J1, J2
2
ERF5-030-07.0
-L-DV-K-TR
ERF5-030-07.0-L-DV-K-TR
Samtec Inc
Conn High Speed Edge Rate Terminal Strip HDR 60
POS 0.5mm Solder ST SMD T/R -
13
L8, L19, L20, L21, L22, L23,
L24, L25
8
ACM2012D-900
-2P-T00
ACM2012D-900-2P-T00
TDK
CMC 300MA 2LN 90 OHM SMD
14
L9, L10, L11, L12, L13, L14,
L16, L17, L18
9
60ohms 2.3A
MPZ1608Y600B
TDK
FERRITE BEAD 60 OHM 0603 1LN
15
Q1
1
MMBT2222A
MMBT2222A, 215
NXP Semiconductor
TRANS NPN 40V 0.6A SOT23
16
Q2, Q3
2
2N7002
2N7002
Fairchild Semiconductor
MOSFET N-CH 60V 115MA SOT-23
17
RV1, RV2
2
Varistor
AVRL101A1R1NTB
TDK
Varistor 0402 39V 1.1pF
18
R29, R41, R42, R48, R51,
R52, R148, R488, R489, R493
10
4.7 K
CRCW06034K70FKEA
Vishay
RES SMD 4.7K Ω1% 1/10W 0603
19
R33, R35, R70, R486, R487,
R490, R492
7
0
RC0603JR-070RL
Yageo
RES SMD 0.0 ΩJUMPER 1/10W 0603
20
R36
1
0
RC0402JR-070RL
Yageo
RES SMD 0.0 ΩJUMPER 1/16W 0402
21
R45
1
4.7 K
CRCW06034K70FKEA
Vishay
RES SMD 4.7K Ω1% 1/10W 0603
22
R54
1
1 K
RC0603FR-071KL
Yageo
RES SMD 1K Ω1% 1/10W 0603
23
R56, R73
2
1 K
RMCF0402JT1K00
Stackpole Electronics Inc
RES SMD 1K Ω5% 1/16W 0402
24
R60
1
10 K
ERJ-3EKF1002V
Panasonic
RES SMD 10K Ω1% 1/10W 0603

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
18 FPGA-EB-02008-1.0
Item
Reference
Qty
Part
PART_NUMBER
Manufacturer
Description
25
R138, R139, R140, R149
4
330 E
CRCW0402330RFKED
Vishay Dale
RES SMD 330 Ω1% 1/16W 0402
26
R141, R142, R143, R144
4
47 K
ERA-3ARB473V
Panasonic
RES SMD 47K Ω0.1% 1/10W 0603
27
R145, R146
2
560 E
CRCW0402560RFKED
Vishay Dale
RES SMD 560 Ω1% 1/16W 0402
28
R435
1
1 M
ERJ-S03F1004V
Panasonic
RES SMD 1M Ω1% 1/10W 0603
29
R436, R438, R439, R440,
R441, R442, R443, R444,
R445, R446, R447, R448,
R449, R450, R451, R452,
R453, R454, R455, R456,
R457, R458, R459, R460,
R461, R462, R463, R464,
R465, R466, R467, R468,
R469, R470, R471, R472,
R473, R474, R475, R476,
R477, R478, R479, R480,
R481, R482, R483, R484,
R485
49
33 E
CRCW060333R0FKEA
Vishay Dale
RES SMD 33 Ω1% 1/10W 0603
30
SW1
1
SYS_RST
TL1015AF160QG
E-Switch
SWITCH TACTILE SPST-NO 0.05A 12V
31
SW2
1
SPDT
EG1218
E-Switch
SWITCH SLIDE SPDT 200MA 30V
32
TH1, TH2, TH3, TH4
4
ThruHole
—
—
—
33
TP14, TP15
2
NP
—
—
—
34
U1
1
SiI1127A
SiI1127ACTU
Lattice Semiconductor
PanelLink 4-Input HDMI Receiver
35
U2, U7, U8, U9, U10, U11
6
CM1213A-04MR
CM1213A-04MR
ON Semiconductor
TVS DIODE 3.3VWM 10VC 10MSOP
36
U6
1
LTC3025-2
LTC3025EDC-2#PBF
Linear Tech
LDO Regulator Pos 1.2V 0.5A 6-Pin DFN EP
37
X1
1
27 MHz
ABM8G-27.000MHZ-18-D2Y-T
ABRACON
CRYSTAL 27.0000MHZ 18PF SMD
38
HDMI Video Processing Input
Board RevB PCB
1
—
305-PD-17-00XX
PACTRON
—

HDMI VIP Input Bridge Board
Evaluation Board User Guide
© 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02008-1.0 19
Revision History
Date
Version
Change Summary
July 2017
1.0
Initial release.

7th Floor, 111 SW 5th Avenue
Portland, OR 97204, USA
T 503.268.8000
www.latticesemi.com