Lattice Semiconductor iCE40 UltraPlus Series User manual

MDP Based Key Phrase Detection
Demonstration
User Guide
FPGA-UG-02048 Version 1.0
May 2018

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
2 FPGA-UG-02048-1.0
Contents
Acronyms in This Document .................................................................................................................................................3
1. Introduction ..................................................................................................................................................................4
2. Functional Description ..................................................................................................................................................4
3. MDP Board Setup..........................................................................................................................................................5
4. Programming the Key Phrase Detection Demo ............................................................................................................7
5. Running the Key Phrase Detection Demo...................................................................................................................11
Technical Support ...............................................................................................................................................................12
Revision History ..................................................................................................................................................................12
Figures
Figure 2.1. Key Phrase Detection Demo Diagram.................................................................................................................4
Figure 3.1. MDP Board with Configuration Locations Highlighted .......................................................................................5
Figure 4.1. Create a New Blank Project ................................................................................................................................7
Figure 4.2. Bitstream File Settings ........................................................................................................................................8
Figure 4.3. Filter Bank Coefficient File Settings ....................................................................................................................9
Figure 4.4. Binary Firmware File Settings ...........................................................................................................................10
Figure 5.1. LED Location......................................................................................................................................................11
Tables
Table 3.1. MDP Board Configuration Details ........................................................................................................................6

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02048-1.0 3
Acronyms in This Document
A list of acronyms used in this document.
Acronym
Definition
BNN
Binary Neural Network
FPGA
Field-Programmable Gate Array
LED
light-emitting diode
MDP
Mobile Development Platform
SOIC
Small Outline Integrated Circuit
SPI
Serial Peripheral Interface
USB
Universal Serial Bus

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
4 FPGA-UG-02048-1.0
1. Introduction
This document describes how to operate the Key Phrase Detection demo on the iCE40 UltraPlus™Mobile Development
Platform (MDP) board. The design features a Binary Neural Network (BNN) soft IP which is used in key phrase
detection.
2. Functional Description
There are four iCE40 UltraPlus devices on the MDP board. The iCE40UP5K_B (U2 on the MDP board) device is used to
run this demo.
In this demo, an LED indicates when a sample key phrase Seven is detected. When the microphone detects the key
phrase, the LED indicator turns ON. When the microphone does not detect a key phrase, the LED stays OFF.
Figure 2.1 shows the diagram of the Key Phrase Detection demo. The microphone captures the audio data and sends it
to the iCE40 device. iCE40 then uses the audio data with the firmware file from the external SPI Flash to determine if
the key phrase is detected. In addition, there is a RGB driver which each color displays different thresholds of detection
of audio data.
Figure 2.1. Key Phrase Detection Demo Diagram

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02048-1.0 5
3. MDP Board Setup
Before running the demo, the MDP board must be configured by setting the switches and jumpers as shown in Figure
3.1.
Note: Figure 3.1 is a default image of the MDP board and the switch/jumper configurations shown here are wrong. The
orange rectangles are provided only to help you locate the correct locations of the switches/jumpers. Be sure to read
the information in Table 3.1 for the correct configuration settings.
Figure 3.1. MDP Board with Configuration Locations Highlighted

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
6 FPGA-UG-02048-1.0
Table 3.1 provides detailed information on the MDP switch and jumper configuration.
Table 3.1. MDP Board Configuration Details
Items
Configuration
Description
J17, J26, J27
Shunt pin 9 - 10
Disable iCE40UP5K A/C/D devices
J25
Shunt pin 1 - 2
Enable iCE40UP5K_B device
J25
Shunt pin 3 - 4
Provide Onboard Mic connection to FPGA
J28
Shunt pin 1 - 2
Board control, for programming SPI Flash
J19
Shunt pin 1 - 3, 2 - 4 (vertical)
Enable programming SPI Flash
J23
Shunt pin 2 - 3
Use Xtal U14 as clock source
SW2
Set to ON
Power Switch, slide down for power-on
SW5 (2,1)
OFF, ON
To select iCE40UP5k_B(U2) as target device
*Important: If using Rev C MDP board, check the MDP Revision Guide to ensure that your MDP board has the correct
resistor series. The MDP Revision Guide is provided in the Documentation folder of MDP Based Key Phrase Detection
Demonstration Bitstream.

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02048-1.0 7
4. Programming the Key Phrase Detection Demo
This section provides the procedure for programming the SPI Flash on the MDP Board
Three different files should be programmed into the SPI Flash. These files are programmed to the same SPI Flash but at
different addresses:
bitstream file
filter bank coefficient file
firmware file
To program SPI Flash in Radiant Programmer:
1. Connect the MDP board to the PC using a USB cable and power ON the MDP board.
2. Start Radiant Programmer. In the Radiant Programmer Getting Started dialog box, select Create a new blank
project as shown in Figure 4.1.
3. Click OK.
Figure 4.1. Create a New Blank Project
4. In the Radiant Programmer main interface, set Device Family to iCE40 UltraPlus and Device to iCE40UP5K.
5. Click the iCE40 UltraPlus row and select Edit > Device Properties.
6. In the Device Properties dialog box, apply the settings below that are common to the three files to program.
a. Under Device Operation, select the options below:
Target Memory: External SPI Flash Memory
Port Interface: SPI
Access Mode: Direct Programming
Operation: Erase, Program, Verify
b. Under SPI Flash Options, select the options below:
Family: SPI Serial Flash
Vendor: Micron
Device: SPI-M25P80
Package: 8-pin SOIC
7. To program the bitstream file, select the options below as shown in Figure 4.2
a. Under Programming Options, select the bitstream file Phrase_Detection_Bitstream.bin in Programming file
b. Click Load from File to update the Data file size (Bytes) value.
c. Ensure that the following addresses are correct:

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
8 FPGA-UG-02048-1.0
Start Address (Hex): 0x00000000
End Address (Hex): 0x00020000
d. Click OK.
Figure 4.2. Bitstream File Settings
8. In the main interface, click Program Device to program the bitstream file Phrase_Detection_Bitstream.bin.
9. To program the filter bank coefficient file, select the options below as shown in Figure 4.3.
a. Under Programming Options, select the binary file FilterBank.bin in Programming file
b. Click Load from File to update the Data file size (Bytes) value. The default data file size does NOT default to
8192. Manually change the value to 8192.
c. Ensure that the following addresses are correct:
Start Address (Hex): 0x00020000
End Address (Hex): 0x00030000
d. Click OK.

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02048-1.0 9
Figure 4.3. Filter Bank Coefficient File Settings
10. In the main interface, click Program Device to program the bitstream file FilterBank.bin.
11. To program the binary firmware file, select the options below as shown in Figure 4.3.
a. Under Programming Options, select the binary file Phrase_Detection_Firmware.bin in Programming file
b. Click Load from File to update the Data file size (Bytes) value. The default data file size does NOT default to
20016. Manually change the value to 20016.
c. Ensure that the following addresses are correct:
Start Address (Hex): 0x00030000
End Address (Hex): 0x00040000
d. Click OK.

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
10 FPGA-UG-02048-1.0
Figure 4.4. Binary Firmware File Settings
12. In the main interface, click Program Device to program the bitstream file Phrase_Detection_Firmware.bin.
13. After programming the files, perform a power cycle to start observing the demo.

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02048-1.0 11
5. Running the Key Phrase Detection Demo
To run the basic demo and observe results on the board:
1. Power ON the MDP board.
2. Say the word Seven over the microphone.
3. When the phrase is detected, LED D11 turns ON. If the phrase is not detected, LED D11 remains OFF.
4. (Optional) In order to enable the RBG LED (D13), connect:
J30 pin 18 to J32 pin 9
J30 pin 19 to J32 pin 11
J30 pin 21 to J32 pin 13
J26 pin 3 to 4
Refer to Figure 5.1 for the location of LED D11. The microphone is located at the back of the MDP board.
Figure 5.1. LED Location

MDP Based Key Phrase Detection Demonstration
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
12 FPGA-UG-02048-1.0
Technical Support
For assistance, submit a technical support case at www.latticesemi.com/techsupport.
Revision History
Date
Version
Change Summary
May 2018
1.0
Initial release.

7th Floor, 111 SW 5th Avenue
Portland, OR 97204, USA
T 503.268.8000
www.latticesemi.com