Lattice Semiconductor MachXO2280 Breakout Board User manual

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
FPGA-EB-02038-1.2
June 2021

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
2 FPGA-EB-02038-1.2
Disclaimers
Lattice makes no warranty, representation, or guarantee regarding the accuracy of information contained in this document or the suitability of its
products for any particular purpose. All information herein is provided AS IS and with all faults, and all risk associated with such information is entirely
with Buyer. Buyer shall not rely on any data and performance specifications or parameters provided herein. Products sold by Lattice have been
subject to limited testing and it is the Buyer's responsibility to independently determine the suitability of any products and to test and verify the
same. No Lattice products should be used in conjunction with mission- or safety-critical or any other application in which the failure of Lattice’s
product could create a situation where personal injury, death, severe property or environmental damage may occur. The information provided in this
document is proprietary to Lattice Semiconductor, and Lattice reserves the right to make any changes to the information in this document or to any
products at any time without notice.

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02038-1.2 3
Contents
Acronyms in This Document.................................................................................................................................................6
1. Introduction...................................................................................................................................................................7
2. Features.........................................................................................................................................................................8
3. Storage and Handling ....................................................................................................................................................9
4. Software Requirements.................................................................................................................................................9
5. MachXO 2280 Device ....................................................................................................................................................9
6. Demonstration Design...................................................................................................................................................9
6.1. Running the Demonstration Design.......................................................................................................................9
6.2. Downloading Demo Designs ................................................................................................................................11
6.3. Recompiling a Demonstration Project with Lattice Diamond ..............................................................................11
6.4. Programming with ispVM.....................................................................................................................................11
7. MachXO 2280 Breakout Board....................................................................................................................................13
7.1. Overview ..............................................................................................................................................................13
7.2. Subsystems...........................................................................................................................................................14
7.2.1. Clock Sources ................................................................................................................................................14
7.2.2. Expansion Header Landings ..........................................................................................................................14
7.2.3. MachXO 2280 PLD.........................................................................................................................................25
7.2.4. JTAG Interface Circuits ..................................................................................................................................25
7.2.5. LEDs...............................................................................................................................................................26
7.2.6. Power Supply ................................................................................................................................................26
7.2.7. Test Points.....................................................................................................................................................26
7.2.8. USB Programming and Debug Interface........................................................................................................27
7.3. Board Modifications.............................................................................................................................................28
7.3.1. Bypassing the USB Programming Interface...................................................................................................28
7.3.2. Applying External Power ...............................................................................................................................28
7.3.3. Measuring Bank and Core Voltages...............................................................................................................28
7.4. Mechanical Specifications....................................................................................................................................28
7.5. Environmental Requirements...............................................................................................................................28
8. Troubleshooting...........................................................................................................................................................29
8.1. LEDs Do Not Flash.................................................................................................................................................29
8.2. USB Cable Not Detected.......................................................................................................................................29
8.3. Determine the Source of a Pre-Programmed Device............................................................................................29
8.3.1. Lattice Diamond Programmer Error .............................................................................................................29
9. Ordering Information...................................................................................................................................................30
Technical Support Assistance .............................................................................................................................................30
Appendix A. Board Schematics...........................................................................................................................................31
Appendix B. Bill of Materials...............................................................................................................................................36
RevisionHistory...................................................................................................................................................................37

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
4 FPGA-EB-02038-1.2
Figures
Figure 2.1. MachXO 2280 Breakout Board, Top Side Left.....................................................................................................8
Figure 6.1. Counter Demo Block Diagram.............................................................................................................................9
Figure 7.1. MachXO 2280 Block Diagram............................................................................................................................13
Figure 7.2. J3/J4 Header Landing Control...........................................................................................................................23
Figure 7.3. J5/J6 Header Landing Control...........................................................................................................................23
Figure 7.4. J7/J8 Header Landing Control...........................................................................................................................24
Figure 7.5. J9/J10 Header Landing Control.........................................................................................................................24
Figure 7.6. J1 Header Landing and LED Array Callout.........................................................................................................25
Figure A.1. MachXO 2280 Breakout Board.........................................................................................................................31
Figure A.2. USB Interface to JTAG.......................................................................................................................................32
Figure A.3. Connectors and LEDs ........................................................................................................................................33
Figure A.4. MachXO 2280 ...................................................................................................................................................34
Figure A.5. MachXO 2280 ...................................................................................................................................................35

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02038-1.2 5
Tables
Table 7.1. Breakout Board Components and Interfaces.....................................................................................................14
Table 7.2. Expansion Connector Reference........................................................................................................................14
Table 7.3. Expansion Header Pin Information (J3)..............................................................................................................15
Table 7.4. Expansion Header Pin Information (J4)..............................................................................................................16
Table 7.5. Expansion Header Pin Information (J5)..............................................................................................................17
Table 7.6. Expansion Header Pin Information (J6)..............................................................................................................18
Table 7.7. Expansion Header Pin Information (J7)..............................................................................................................19
Table 7.8. Expansion Header Pin Information (J8)..............................................................................................................20
Table 7.9. Expansion Header Pin Information (J9)..............................................................................................................21
Table 7.10. Expansion Header Pin Information (J10)..........................................................................................................22
Table 7.11. MachXO PLD Interface Reference....................................................................................................................25
Table 7.12. JTAG Interface Reference.................................................................................................................................25
Table 7.13. JTAG Programming Pin Information ................................................................................................................26
Table 7.14. Power and User LEDs Reference......................................................................................................................26
Table 7.15. USB Interface Reference..................................................................................................................................27
Table B.1. MachXO 2280 Breakout Board Bill of Materials ................................................................................................36

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
6 FPGA-EB-02038-1.2
Acronyms in This Document
A list of acronyms used in this document.
Acronym
Definition
DIP
Dual in-line package
FPGA
Field Programmable Gate Array
GPIO
General Purpose Input/Output
I2C
Inter-Integrated Circuit
LUT
Look Up Table
LED
Light Emitting Diode
PCB
Printed Circuit Board
PLD
Programmable Logic Device
PWM
Pulse Width Modulation
RoHS
Restriction of Hazardous Substances Directive
USB
Universal Serial Bus
WDT
Watchdog Timer

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02038-1.2 7
1. Introduction
Thank you for choosing the Lattice Semiconductor MachXO™2280 Breakout Board Evaluation Kit!
This user guide describes how to start using the MachXO 2280 Breakout Board, an easy-to-use platform for
evaluating and designing with the MachXO PLD. Along with the board and accessories, this kit includes a pre-
loaded demonstration design. You may also reprogram the onboard LCMXO2280C device to review your own
custom designs.
Note: Static electricity can severely shorten the lifespan of electronic components. See the Storage and Handling
section of this document for handling and storage tips.

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
8 FPGA-EB-02038-1.2
2. Features
The MachXO 2280 Breakout Board Evaluation Kit includes:
MachXO 2280 Breakout Board –The board is a 3” x 3” form factor that features the following on-board
components and circuits:
MachXO 2280 PLD (LCMXO2280C-3FTN256C)
USB mini-B connector for power and programming
Eight LEDs
40-hole prototype area
Eight 2x20 expansion header landings for general I/O, JTAG, and external power
1 × 8 expansion header landing for JTAG
3.3 V supply rail
Pre-loaded Demo –The kit includes a pre-loaded counter design that highlights use of the embedded MachXO
2280 oscillator and programmable I/O configured for LED drive.
USB Connector Cable –The board is powered from the USB mini-B socket when connected to a host PC. The USB
channel also provides a programming interface to the LCMXO2280C JTAG port.
MachXO Breakout Board Web Page –Visit
https://www.latticesemi.com/products/developmentboardsandkits/machxobreakoutboard for the latest
documentation (including this guide), demo designs, and drivers for the kit.
The content of this user guide includes demo operation, programming instructions, top-level functional
descriptions of the Breakout Board, descriptions of the on-board connectors, and a complete set of schematics.
Left Side
Two 2 x 20 Header
Landings (J9, J10)
USB
JTAG Header
Landing (J1)
LEDArray Bottom Side
Two 2 x 20 Header Landings
(J7, J8)
Top Side
Two 2 x 20 Header Landings (J3, J4 )
Right Side
Two 2 x 20 Header Landings
(J5, J6)
Prototype
Area
Figure 2.1. MachXO 2280 Breakout Board, Top Side Left

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02038-1.2 9
3. Storage and Handling
Static electricity can shorten the lifespan of electronic components. Observe these tips to prevent damage that could
occur from electro-static discharge:
Use anti-static precautions such as operating on an anti-static mat and wearing an anti-static wristband.
Store the evaluation board in the packaging provided.
Touch a metal USB housing to equalize voltage potential between you and the board.
4. Software Requirements
You should install the following software before you begin developing new designs for the Breakout Board:
FTDI Chip USB hardware drivers (installed as an option within the Diamond installation program)
Lattice Diamond® (MachXO support)
ispVM System™ 17.9 or later (Required for re-programming)
5. MachXO 2280 Device
This board features the LCMXO2280C PLD, which offers the benefits of increased system integration by providing over
27Kbits of embedded memory, two built-in PLLs, high performance LVDS I/O, and a low power sleep mode, all in a
single-device. The 256-pin ftBGA package provides 211 user I/O in a 17 mm × 17 mm package. A complete description
of this device is available in MachXO Family Data Sheet (DS1002).
6. Demonstration Design
Lattice provides a pre-programmed demo to illustrate the basic operation of the LCMXO2280C device. The design
integrates an up-counter with the on-chip oscillator.
Note: You may obtain your Breakout Board after it is reprogrammed. To restore the factory default demo and program
it with other Lattice-supplied examples, see the Downloading Demo Designs section of this document.
6.1. Running the Demonstration Design
The preprogrammed demonstration design is an up-counter to drive an LED array. The program shows a clock
generator based on the MachXO 2280 on-chip oscillator. The counter module is clocked at ~22 MHz (18 MHz –26 MHz)
to illustrate how low speed timer functions can be implemented with a PLD. The 23-bit up-counter further divides the
clock to advance the LED display approximately every 200 ms. The resulting light pattern appears as an alternating pair
of lit LEDs per row.
2 × 4 LED
Array
MachXO 2280
23-bit
Up-Counter
Clock
Generator 18 – 26 MHz
c_delay[22:0]
c_delay[22]
(~0.5Hz)
Figure 6.1. Counter Demo Block Diagram

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
10 FPGA-EB-02038-1.2
WARNING: Do not connect the Breakout Board to your PC before you follow the driver installation procedure of this
section.
Communication with the Breakout Board with a PC through the USB connection cable will require the FTDI chip USB
hardware drivers contained in the Software Requirements section. Loading these drivers enables the computer to
reliably recognize and program the Breakout Board. Drivers are distributed by Lattice as a stand-alone package or with
ispVM System version 17.9 or later. Use one of the two procedures below to install.
To load the FTDI chip USB hardware drivers through the ispVM System:
1. Browse to https://www.latticesemi.com/Support/SoftwareArchive, then, go to Downloadble Software, and
download ispVM System software.
2. Install ispVM System software.
3. Run ispVM System. Choose ispTools > Install/Uninstall LSC USB/Parallel Port Driver.
The LSC 32/64-Bit USB Drivers Install/Uninstall dialog appears.
4. Select FTDI USB 32-Bit Driver or FTDI USB 64-Bit Driver then click Install.
After a few moments, ispVM indicates that the installation is complete.
5. Click OK, then click Close from the LSC 32/64-Bit USB Drivers Install/Uninstall dialog.
6. Choose File > Exit to close ispVM System.
7. Connect the USB cable from a USB port on your PC to the board’s USB mini-B socket (J2). After connection is made,
a green Power LED (D9) will light indicating the board is powered on.
8. Red LEDs light and start to flash according to the preprogrammed demonstration design.
See the Troubleshooting section of this guide if the board does not function as expected.
To load the FTDI chip USB hardware drivers through the stand-alone package:
1. Download the FTDI Chip USB Hardware Drivers package from the Lattice website.
2. Extract the FTDI chip USB Hardware driver package to your PC hard drive.
3. Connect the USB cable from a USB port on your PC to the board’s USB mini-B socket (J2). After connection is made,
a green Power LED (D9) lights indicating the board is powered on.
4. If you are receive a Windows may connect to Windows Update prompt, select No, not this time from available
options and click Next to proceed with the installation. Choose the Install from specific location (Advanced) option
and click Next.
5. Search for the best driver in these locations and click the Browse button to browse to the Windows driver folder
created in the Download Windows USB Hardware Drivers section. Select the CDM 2.04.06 WHQL Certified folder
and click OK.
6. Click Next. A screen displays as Windows copies the required driver files. Windows displays a message indicating
that the installation is successful.
7. Click Finish to install the USB driver.
8. Red LEDs light and start to flash according to the preprogrammed demonstration design.
See the Troubleshooting section of this guide if the board does not function as expected.

MachXO 2280 Breakout Board Evaluation Kit
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© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
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FPGA-EB-02038-1.2 11
6.2. Downloading Demo Designs
The counter demo is preprogrammed into the Breakout Board, however over time it is likely your board will be
modified. Lattice distributes source and programming files for demonstration designs compatible with the Breakout
Board.
To download demo designs:
1. Browse to the Lattice Solutions web page (www.latticesemi.com/breakoutboards) of the Lattice website. Select
MachXO Breakout Board Demo Source and save the file.
2. Extract the contents of MachXO2280_BB_Eval_Kit_v01.0.zip to an accessible location on your hard drive.
The demo design directory Demo_LED is unpacked.
6.3. Recompiling a Demonstration Project with Lattice Diamond
To recompile a demo project for the Breakout Board:
Install and license Lattice Diamond software.
1. Download the demo source files from the Lattice Breakout Board Evaluation Kits web page.
2. Run Lattice Diamond.
3. Open the Demo_LED_OSC.ldf project file.
4. From the Process view, select JEDEC File from the Export Files process.
5. Choose Export Files.
6. Right-click and choose Run.
After a few moments the JEDEC programming file is output.
See the Programming with ispVM section for details on downloading a programming file to the board.
6.4. Programming with ispVM
A demonstration design is pre-programmed into the Breakout Board by Lattice. To restore a Breakout Board to factory
settings or load an alternative demo design, use the procedures in this section.
To install ispVM programming tools:
1. Install and license ispVM System software.
2. Connect the board to a host PC using the USB port header connection.
3. Follow the USB Cable Interface procedure below to program the evaluation board.
The Breakout Board is equipped with a built-in USB-based programming circuit. This consists of a USB PHY and a USB
connector. When the board is connected to a PC with a USB cable, it is recognized by the ispVM System software as a
USB Download Cable. The MachXO 2280 can then be scanned and programmed using the ispVM System software.
To program a demo programming file:
1. From the Start menu run ispVM System. ispVM appears.
2. Choose Options > Cable and IO Port Setup.
The Cable and I/O Port Setup dialog appears.
3. Make the following selections:
Cable Type: USB2
Port Setting: FTUSB-0
Click OK.
4. Choose ispTools > Scan Chain.
The New Scan Configuration Setup window appears. The LCMXO2280C device appears in the device list.

MachXO 2280 Breakout Board Evaluation Kit
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
12 FPGA-EB-02038-1.2
5. Right-click the LCMXO2280C entry and choose Edit Device.
The Device Information dialog appears.
6. From the Data File section, click the Browse button.
The Open Data File dialog appears.
7. Browse to the <Demo Dir> folder, select <Demo>.jed, and click Open.
8. From the Operation list choose Erase, Program, Verify and click OK.
9. Choose Project > Download.
ispVM reprograms the evaluation board.
Programming requires about 10 seconds. A small timer window will appear to show elapsed programming time. At the
end of programming, the configuration setup window should show a PASS in the Status column.

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02038-1.2 13
7. MachXO 2280 Breakout Board
This section describes the features of the MachXO 2280 Breakout Board in detail.
7.1. Overview
The Breakout Board is a complete development platform for the MachXO 2280 PLD. The board includes a prototyping
area, a USB program/power port, an LED array, and header landings with electrical connections to most of the PLD’s
programmable I/O, power, and JTAG pins. The board is powered by the PC’s USB port or optionally with external
power. You may create or modify the program files using Diamond software and reprogram the board using ispVM
software.
LCMXO2280C
-3FTN256C
2x20 Header
Landing (J9)
LED
Array
GPIO
USB
Controller
USB MiniB
Socket
A/Mini-B
USB Cable JTAG
Programming 8
2 × 20 Header
Landing (J10)
GPIO
2 × 20 Header
Landing (J5)
GPIO
2 × 20 Header
Landing (J6)
GPIO
1 × 8 JTAG Header
Landing (J1)
8
2 × 20 Header
Landing (J7)
2 × 20 Header
Landing (J8)
Bank 2, 3
Bank 4, 5
Bank 0, 1
2 × 20 Header
Landing (J3)
2 × 20 Header
Landing (J4)
Bank 6, 7
GPIOGPIO
GPIO GPIO
Figure 7.1. MachXO 2280 Block Diagram

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
14 FPGA-EB-02038-1.2
Table 7.1. Breakout Board Components and Interfaces
Component/Interface
Type
Schematic Reference
Description
Circuits
USB Controller
Circuit
U2: FT2232H
USB-to-JTAG interface and dual USB UART/FIFO
IC
USB Mini-B Socket
I/O
J1:USB_MINI_B
Programming and debug interface
Components
LCMXO2280C
PLD
U4: LCMXO2280C-3FTN256C
2280-LUT device packaged in a 17 x 17mm,
256-ball ftBGA.
Interfaces
LED Array
Output
D8-D1
Red LEDs
Eight 2x20 Header
Landings
I/O
J3: header_2x20
J4: header_2x20
J5: header_2x20
J6: header_2x20
J7: header_2x20
J8: header_2x20
J9: header_2x20
J10: header_2x20
User-definable I/O
1x8 Header Landing
I/O
J1: header_1x8
Optional JTAG interface
4-Hole Prototype Area
—
—
Prototype area 100mil centered holes.
7.2. Subsystems
This section describes the principle sub systems for the Breakout Board in alphabetical order.
7.2.1. Clock Sources
All clocks for the counter demonstration designs originate from the MachXO 2280 PLD on-chip oscillator. You may use
an expansion header landing to drive a PLD input with an external clock source.
7.2.2. Expansion Header Landings
The expansion header landings provide access to user GPIO, primary inputs, clocks, and VCCO pins of the MachXO
2280. The remaining pins serve as power supplies for external connections. Each landing is configured as one 2 × 20
100 mil.
Table 7.2. Expansion Connector Reference
Item
Description
Reference Designators
J3, J4, J5, J6, J7, J8, J9, J10
Part Number
header_2x20

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FPGA-EB-02038-1.2 15
Table 7.3. Expansion Header Pin Information (J3)
Pin Number
Function
MachXO 2280 Ball
1
PL2A_LV_T
E4
2
PL11A_LV_T
H2
3
PL2B_LV_T
E5
4
PL11B_LV_C
J2
5
GND
n/a
6
GND
n/a
7
PL3A_LV_T
F5
8
PL12A_LV_T
J1
9
PL3B_LV_C
F6
10
PL12B_LV_C
K1
11
GND
n/a
12
GND
n/a
13
PL4A_LV_T
E3
14
PL13A_LV_T
L1
15
PL4B_LV_C
E2
16
PL13B_LV_C
M1
17
GND
n/a
18
GND
n/a
19
PL5A_LV_T
B1
20
PL15A_LV_T
L3
21
PL5B_LV_C
C1
22
PL15B_LV_C
M3
23
GND
n/a
24
GND
n/a
25
PL7A_LV_T
F2
26
PL16A_LV_T
J4
27
PL7B_LV_C
G2
28
PL16B_LV_C
J5

MachXO 2280 Breakout Board Evaluation Kit
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© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
16 FPGA-EB-02038-1.2
Table 7.4. Expansion Header Pin Information (J4)
Pin Number
Function
MachXO 2280 Ball
1
PL3C
F3
2
GND
n/a
3
PL3D
F4
4
GND
n/a
5
PL4C
C3
6
GND
n/a
7
PL4D
C2
8
GND
n/a
9
PL6C
D2
10
GND
n/a
11
PL6D
D1
12
GND
n/a
13
PL7C
E1
14
GND
n/a
15
PL7D
F1
16
GND
n/a
17
PL8C
G3
18
GND
n/a
19
PL8D
H3
20
GND
n/a
21
PL10C
G1
22
GND
n/a
23
PL10D
H1
24
GND
n/a
25
NC
NC
26
PL15C
M2
27
NC
NC
28
PL15D
N2
29
PL11C
J3
30
PL16C
R1
31
PL11D
K3
32
PL16D
R2
33
PL12C
K2
34
PL17C
L5
35
PL12D
L2
36
PL17D
L4
37
PL14C
N1
38
PL19A
N4
39
PL14D
P1
40
PL19B
N3

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FPGA-EB-02038-1.2 17
Table 7.5. Expansion Header Pin Information (J5)
Pin Number
Function
MachXO 2280 Ball
1
PT2C
B2
2
PT9A
D8
3
PT2D
B3
4
PT9C
E8
5
PT3A
A2
6
PT9D
E9
7
PT3B
A3
8
PT10A
A10
9
PT3C
D3
10
PT10C
C9
11
PT3D
D4
12
PT10D
C10
13
PT4A
C4
14
PT10E
D9
15
PT4B
C5
16
PT10F
D10
17
PT5A
D6
18
PT11A
B9
19
PT5B
D5
20
PT11B
B10
21
PT5C
B4
22
PT12A
A11
23
PT5D
B5
24
PT12B
A12
25
PT6E
E7
26
PT12C
B11
27
PT6F
E6
28
PT12D
B12
29
PT6C
A5
30
PT13C
C11
31
PT6D
A4
32
PT13D
C12
33
PT6A
C6
34
PT14A
A13
35
PT6B
C7
36
PT14B
A14
37
PT7A
B6
38
PT14C
D11
39
PT7B
B7
40
PT14D
D12

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
18 FPGA-EB-02038-1.2
Table 7.6. Expansion Header Pin Information (J6)
Pin Number
Function
MachXO 2280 Ball
1
VCIO_extB7
G6
2
GND
n/a
3
VCIO_extB6
J6
4
GND
n/a
5
VCIO_extB5
L7
6
GND
n/a
7
VCIO_extB4
L9
8
GND
n/a
9
VCIO_extB3
J11
10
GND
n/a
11
VCIO_extB2
G11
12
GND
n/a
13
VCIO_extB1
F9
14
GND
n/a
15
VCIO_extB0
F7
16
GND
n/a
17
NC
NC
18
NC
NC
19
NC
NC
20
NC
NC
21
NC
NC
22
PT15A
E10
23
NC
NC
24
PT15B
E11
25
NC
NC
26
PT15C
B13
27
NC
NC
28
PT15D
C13
29
PT7C
A6
30
PT16A
B14
31
PT7D
A7
32
PT16B
C14
33
PT8C
B8
34
PT16C
A15
35
PT8D
C8
36
PT16D
B15
37
NC
NC
38
GND
n/a
39
NC
NC
40
GND
n/a

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02038-1.2 19
Table 7.7. Expansion Header Pin Information (J7)
Pin Number
Function
MachXO 2280 Ball
1
PR4C
F13
2
GND
n/a
3
PR4D
F12
4
GND
n/a
5
PR5C
B16
6
GND
n/a
7
PR5D
C16
8
GND
n/a
9
PR6C
D16
10
GND
n/a
11
PR6D
E16
12
GND
n/a
13
PR7C
F16
14
GND
n/a
15
PR7D
G16
16
GND
n/a
17
PR9C
H12
18
GND
n/a
19
PR9D
H13
20
GND
n/a
21
PR10C
G15
22
GND
n/a
23
PR10D
H15
24
GND
n/a
25
NC
NC
26
PR15C
M16
27
NC
NC
28
PR15D
N16
29
PR11C
J12
30
PR16C
L12
31
PR11D
K12
32
PR16D
L13
33
PR13C
J14
34
PR17C
M12
35
PR13D
K14
36
PR17D
M13
37
PR14C
K16
38
PR20A
L11
39
PR14D
L16
40
PR20B
M11

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2011-2021 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
20 FPGA-EB-02038-1.2
Table 7.8. Expansion Header Pin Information (J8)
Pin Number
Function
MachXO 2280 Ball
1
PR3A_LV_T
D14
2
PR11A_LV_T
H16
3
PR3B_LV_C
D13
4
PR11B_LV_C
J16
5
GND
n/a
6
GND
n/a
7
PR4A_LV_T
E13
8
PR13A_LV_T
J15
9
PR4B_LV_C
E12
10
PR13B_LV_C
K15
11
GND
n/a
12
GND
n/a
13
PR5A_LV_T
E14
14
PR14A_LV_T
J13
15
PR5B_LV_C
F14
16
PR14B_LV_C
K13
17
GND
n/a
18
GND
n/a
19
PR6A_LV_T
C15
20
PR15A_LV_T
L15
21
PR6B_LV_C
D15
22
PR15B_LV_C
M15
23
GND
n/a
24
GND
n/a
25
PR7A_LV_T
E14
26
PR16A_LV_T
L14
27
PR7B_LV_C
F15
28
PR16B_LV_C
M14
29
GND
n/a
30
GND
n/a
31
PR9A_LV_T
G12
32
PR17A_LV_T
N15
33
PR9B_LV_C
G13
34
PR17B_LV_C
N14
35
GND
n/a
36
GND
n/a
37
PR10A_LV_T
G14
38
PR18A_LV_T
N13
39
PR10B_LV_C
H14
40
PR18B_LV_C
N12