Lattice Semiconductor LFSC80E-P4-EV User manual

September 2009
Revision: EB31_01.2

LatticeSC PCI Express x4 Evaluation Board

User’s Guide

2
LatticeSC PCI Express x4 Evaluation Board
Lattice Semiconductor User’s Guide
Introduction
This user’s guide describes the LatticeSC PCI Express x4 Evaluation Board featuring the LatticeSC
LFSCM3GA80EP1-6FC1152C FPGA device. This stand-alone evaluation PCB provides a functional platform for
development and rapid prototyping of applications that require high-speed SERDES interfaces and/or PCI Express
protocols.
The evaluation board includes provisioning to connect high-speed SERDES channels via SMA connectors to test
and measurement equipment. The board is manufactured using standard FR4 dielectric and through-hole vias.
The nominal impedance is 50-ohm for single-ended traces and 100-ohm for differential traces.
The board has several debugging and analyzing features for complete user evaluation of the LatticeSC device. This
user’s guide is intended to be referenced in conjunction with evaluation design tutorials to demonstrate the Lattic-
eSC FPGA.
Figure 1. LatticeSC PCI Express x4 Evaluation Board
DDR2
SDRAM
LVDS I/O PCI Express x4
Edge
Mictor Connector
for Logic Analyzer
LatticeSC-80
1152 fpBGA
Power
Supplies
PCI Express
Cable Connectors
SERDES I/O Test LEDs Clock I/O
Features
• LatticeSCM-80 device in 1152 fcBGA package
• SERDES interface to x4 PCI Express edge fingers
• Two x1 PCI Express cable connections
• DDR2 memory device
• SERDES high-speed interface SMA test points and clock connections
• Power connections and power sources
•ispVM
®programming support

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LatticeSC PCI Express x4 Evaluation Board
Lattice Semiconductor User’s Guide
• On-board and external reference clock sources
• Interchangeable clock oscillators
• ORCAstra demonstration software interface via standard ispVM JTAG connection
• Various high-speed layout structures
• User-defined input and output points
• SMA connectors included (10) for high-speed clock or data interfacing
• Performance monitoring via test headers, LEDs and switches
This user’s guide includes top-level functional descriptions of the various portions of the evaluation board, descrip-
tions of the on-board connectors, diodes and switches and a complete set of schematics of the board. Figure 2
shows the functional partitioning of the board.
Additional Resources
For additional information and resources related to this board, including updated documentation and hard-
ware/software demos, please see the Lattice web site at www.latticesemi.com/boards and navigate to the appropri-
ate page for this board.
A PCI Express demonstration is also available on-line, including a GUI and drivers for a PCI Express solution using
this board.
Lattice makes its best effort to provide evaluation board designs to help users with evaluation and development.
However it remains the user's responsibility to verify proper and reliable operation of Lattice products in their end
application by consulting documentation provided by Lattice. Differences in component selection and/or PCB layout
in the user's application may significantly affect circuit performance and reliability.
Figure 2. Evaluation Board Block Diagram
LatticeSC
1152 fcBGA
LVDS SMAs
4-bit
Input/Output
DDR2
Memory
84 fBGA
PCI Express x4
PCI Express Card
Edge Fingers
LVDS
Bus Loop
PCI Express x1
Cable Connector
PCI Express x1
Cable Connector
LatticeSC Device
This board features a LatticeSC FPGA with a 1.2V core supply. It can accommodate all pin compatible LatticeSC
devices in the 1152-ball fpBGA (1mm pitch) package. A complete description of this device can be found in the Lat-
ticeSC/M Family Data Sheet.

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Note: The connections referenced in this document refer to the LFSCM3GA80 device. Available I/Os and associ-
ated sysIO™ banks may differ for other densities within this device family.
Applying Power to the Board
The LatticeSC PCI Express x4 Evaluation Board is ready to power on. The evaluation board can be supplied with
power from an AC wall-type transformer power supply shipped with the board. Or it can be supplied from a bench-
top supply via terminal screw connections. It also has provisions to be supplied from the PCI Express edge fingers
from a host board.
To supply power from the factory-supplied wall transformer, simply connect the output connection of the power cord
to J3 and plug the wall transformer into an AC wall outlet.
Power Supplies
(see Appendix A, Figure 9)
The evaluation board incorporates an alternate scheme to provide power to the board. The board is equipped to
accept a main supply via the TB1 connection. This connection is provided to use with a bench-top supply adjusted
to provide a nominal 12V DC.
All input power sources and on-board power supplies are fused with surface mounted fuses and have green LEDs
to indicate power GOOD status of the intermediate supplies
Table 1. Board Power Supply Fuses- (see Appendix A, Figure 9)
F1 1.0V/1.2V Fuse
F2 3.3V Fuse
F3 1.5V Fuse
F4 1.2V Fuse
F5 2.5V Fuse
F6 1.8V Fuse
Table 2. Board Power Supply Indicators- (see Appendix A, Figure 9)
D14 1.0V/1.2V VCC Core Source Good Indicator
D15 1.5V Source Good Indicator
D16 1.8V Source Good Indicator
D12 2.5V Source Good Indicator
D13 3.3V Source Good Indicator
D17 1.2V Source Good Indicator
Alternatively, external power can be connected rather than the wall transformer power pack.
Table 3. Board Supply Disconnects- (see Appendix A, Figure 9)
TB1 Screw terminal for 12V DC Pin1(square PCB pad) -> +12V DC Pin2 -> Ground
PCI Express Power Interface
(see Appendix A, Figure 10)
Power can be sourced to the board via the PCB Edge Finger (CN1). This interface allows the user to provide power
from a PCI Express host board.

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Lattice Semiconductor User’s Guide
Programming/FPGA Configuration
(see Appendix A, Figure 7)
A programming header is provided on the evaluation board, providing access to the LatticeSC JTAG port.
Note: An ispDOWNLOAD®Cable is included with each ispLEVER®design tool shipment. Cables may also be pur-
chased separately from Lattice.
ispVM Download Interface
J2 is a10-pin JTAG connector used in conjunction with the ispVM System software and ispDOWNLOAD Cable to
program and control the device.
Table 4. JTAG Programming Connector (see Appendix A, Figure 7)
Pin 1 VCC
Pin 2 TDO
Pin 3 TDI
Pin 4 PROGRAMN
Pin 5 NC
Pin 6 TMS
Pin 7 GND
Pin 8 TCK
Pin 9 DONE
Pin 10 INITN
Programming Daisy Chain
This board includes two Lattice programmable devices that can be programmed in a daisy chain. A jumper setting
of J93 controls the chain. Both devices are in the programming chain from the JTAG header J2 with jumpers across
Pins{1-2} and Pins{3-4}. If the user desires to only program U1, only a jumper should be across Pins{2-4}.
Download Procedures
Requirements
• PC with ispVM System v.14.3 (or later) programming management software, installed with appropriate drivers
(USB driver for USB Cable, Windows NT/2000/XP parallel port driver for ispDOWNLOAD Cable). Note: An option
to install these drivers is included as part of the ispVM System set-up.
• ispDOWNLOAD Cable (HW-USBN-2A, HW-DLN-3C, etc.)
JTAG Download
The LatticeSC device can be configured easily via its JTAG port. The device is SRAM-based; it must remain pow-
ered on to retain its configuration when programmed in this fashion.
1. Connect the ispDOWNLOAD cable to the appropriate header. J2 is used for the 1x10 cable.
Important Note: The board must be un-powered when connecting, disconnecting, or reconnecting the isp-
DOWNLOAD Cable. Always connect the ispDOWNLOAD Cable's GND pin (black wire), before connecting any
other JTAG pins. Failure to follow these procedures can in result in damage to the LatticeSC FPGA device and
render the board inoperable.
2. Connect the LatticeSC Evaluation Board to the appropriate power sources and power up the board.
3. Start the ispVM System software.

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Lattice Semiconductor User’s Guide
4. Press the SCAN button located in the toolbar. The LatticeSC device should be automatically detected.
Figure 3. ispVM Main Window
5. Double-click the device to open the device information dialog. In the device information dialog, click the Browse
button located under Data File. Locate the desired bitstream file (.bit). Click OK to both dialog boxes.

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Lattice Semiconductor User’s Guide
Figure 4. Device Information Dialog Box
6. Click the green GO button. This will begin the download process into the device. Upon successful download, the
device will be operational.
Configuration Status Indicators
(see Appendix A, Figure 7)
These LEDs indicate the status of configuration to the FPGA.
• D1 illuminated (red) – This indicates that the programming was aborted or reinitialized driving the INITN output
low.
• D4 illuminated (green) – This indicates the successful completion of configuration by releasing the open collector
DONE output pin.
• D11 illuminated (green) – Flashes to indicate TDI activity.
• D21 illuminated (red) – This indicates that PROGRAMN is low.
• D23 illuminated (red) – This indicates that GSRN is low.
PROGRAMN & RESETN
(see Appendix A, Figure 7)
These push-button switches assert/de-assert the logic levels on the PROGRAMN (SW5) and RESETN (SW4).
Depressing the button drives a logic level “0” to the device.

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Lattice Semiconductor User’s Guide
MODE [3:0]
(see Appendix A, Figure 7)
The FPGA MODE pins are set on the board for a particular programming mode via the SW6 DIP switch. JTAG pro-
gramming is independent of the MODE pins and is always available to the user. Pushing in (depressing) the switch
is ON and sets the value to 0.
LatticeSC devices support many configuration modes. Listed below are the configuration modes supported on this
board. The modes are either directly supported or emulated using the CPLD on board.
Table 5. Configuration Mode Selections
MODE3 SW6-4 MODE2 SW6-3 MODE1 SW6-2 MODE0 SW6-1 Configuration Mode
0 (ON) 1 (OFF) 0 (ON) 1 (OFF) SPI Flash
1 (OFF) 0 (ON) 0 (ON) 0 (ON) Master Serial
1 (OFF) 1 (OFF) 1 (OFF) 1 (OFF) Slave Serial
1 (OFF) 1 (OFF) 0 (ON) 0 (ON) Master Parallel
0 (ON) 1 (OFF) 1 (OFF) 0 (ON) Master Byte
1 (OFF) 0 (ON) 0 (ON) 1 (OFF) Slave Parallel
X (don’t care) X (don’t care) X (don’t care) X (don’t care) ispJTAG
Bank1 VCCIO
(see Appendix A, Figure 8)
VCCIO1 can be selected on the board to be either 3.3V or 2.5V using J107.
A jumper shunt placed between pin 1 and pin 2 will connect 2.5V. A jumper shunt between pin 2 and pin 3 will con-
nect 3.3V. The user must pay attention to the design and select the correct supply for VCCIO1.
On-Board Flash Memory
(see Appendix A, Figure 7)
Three memory devices (U3 and U22) are on board for non-volatile configuration memory storage. SW3 is used to
control writing and reading from the memory. U3 is an 8M, 8-pin SOIC Flash device and U22 is a 64M, 16-pin
TSSOP Flash device. U22 is located on the bottom side (secondary) of the PCB.
Refer to TN1100, SPI Serial Flash Programming Using ispJTAG in LatticeSC Devices for recommended proce-
dures and software usage.
To use both SPI Flash devices to program the LatticeSC device, the user must write to the Flash devices individu-
ally. This is accomplished by setting SW3 accordingly. Writing to Flash #1 (U22), close 3 and 5 switch positions
(ON) and open all others.
Writing to Flash #2 (U3), close 2 and 4 switch positions (ON) and open all others.
For reading from the Flash devices individually, use the same switch settings as described for writing. For reading
from both Flash devices in a cascading format, close switch positions (1, 3, 4, 5, 8).
FPGA Clock Management
(see Appendix A, Figure 14)
The evaluation board includes various features for generating and managing on-board clocks. The clocks are gen-
erated from either input provided from SMAs (see Ta bl e 6) or from crystal oscillators (Y1 and Y3). Y1 is socketed
for interchangeability and Y3 is a 312.5MHz surface-mount with an enable/disable jumper (J102). Y4 and Y5 also
can be selected using J108 to disable Y5.

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Lattice Semiconductor User’s Guide
When Y3 or Y5 are enabled, the user should remove Y1 or Y4 respectively to eliminate contention issues between
the clock sources.
There are several resistor stuffing options that may be needed based on the user’s requirements, R183 and R184
are left OPEN by factory default allowing connection to SMA inputs via R181 and R182. R181 and R182 are factory
populated with 0-ohm resistors. To utilize the Y1 or Y3 oscillators, the user should move the 0-ohms resistors from
R183 and R184 to R181 and R182.
This scenario is the same for R208 and R209 with R212 and R213 respectively.
A 100-ohm termination is optionally available and needs to be added to R185 and R186 if the SMA clock input are
not used. R185 and R186 are left OPEN at the factory and provide input termination to the B and A SERDES
Quads respectively.
Table 6. Reference Clock Input SMA Connections
J91 Reference + Input PCS361
J92 Reference - Input PCS361
J110 Reference + Input PCS360
J111 Reference - Input PCS360
A 100.0MHz surface-mounted oscillator (Y2) is also provided and fanned-out to three general-purpose FPGA
inputs.
SERDES
(see Appendix A, Figure 10)
SERDES Reference Clock
The 50-ohm terminated SMA connectors provide the supply reference clocks directly to the LatticeSC device. This
device will drive clocks to both SERDES quads via 100-ohm LVDS signaling. On-board clock oscillators mentioned
in the previous sections can be chosen to drive the same SERDES reference clocks.
SERDES Channels
Surface Mounted SMA Connections
(see Appendix A, Figure 10)
DC coupled top-mounted SMA connectors connect to the SERDES Tx and Rx channels of Quad B SERDES on
the left side (PCS 361). These pins are directly coupled to the designated SMA connector creating a path for both
input and output differential data.
Table 7. SERDES Connectors (see Appendix A, Figure 10)
J11 B_HDINN0_L
J6 B_HDINP0_L
J20 B_HDINN1_L
J16 B_HDINP1_L
J27 B_HDINN2_L
J23 B_HDINP2_L
J31 B_HDINN3_L
J28 B_HDINP3_L
J10 B_HDOUTN0_L
J5 B_HDOUTP0_L

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Lattice Semiconductor User’s Guide
PCI Express x1 Cable Connectors
PCI Express x1 Cable Connectors (CON1 and CON2) are provided to demonstrate cable capabilities of the
SERDES channels. These cable connectors conform with the PCI Express Cable Specifications. A simple cable
loopback connected between the connectors can be used to evaluate this feature.
SERDES SMPTE Channels
(see Appendix A, Figure 10)
A single-channel 75-ohm SERDES channel is connected to BNC edge connectors. These connections are pro-
vided to connect to SMPTE video equipment. The channels include the appropriate passive components for
interoperability to SMPTE devices.
Table 8. SERDES SMPTE BNC Connectors (see Appendix A, Figure 10)
J9 A_HDINN1_L
J4 A_HDINP1_L
J21 A_HDOUTN1_L
J14 A_HDOUTP1_L
SERDES PCI Express Channels
(see Appendix A, Figure 10)
This board is equipped to communicate directly as an add-on card to a PCI Express host. It is designed with edge-
fingers (CN1) to fit directly into an x4 host receptacle. Power can be supplied directly from the PCI Express host via
the edge-finger connections.
FPGA Test Pins
General-purpose FPGA pins are available for user applications. FPGA pins are connected to switches and LEDS
designated according to the following table.
Table 9. FPGA Test Pins (see Appendix A, Figure 7)
Switch BGA Netname LED BGA NetName
SW2D A20 Switch1 D2 A19 RED1
SW2C K22 Switch2 D5 J21 YELLOW1
SW2B K21 Switch3 D7 H21 GREEN1
SW2A G20 Switch4 D9 B18 BLUE1
SW1D F20 Switch5 D3 A18 RED2
SW1C J22 Switch6 D6 H20 YELLOW2
SW1B H22 Switch7 D8 H19 GREEN2
SW1A B19 Switch8 D10 E19 BLUE2
Note: LEDs will illuminate if connected to an un-programmed FPGA pin. It is recommended that a pull-down be
programmed on FPGA output pins.
J19 B_HDOUTN1_L
J15 B_HDOUTP1_L
J26 B_HDOUTN2_L
J22 B_HDOUTP2_L
J30 B_HDOUTN3_L
J28 B_HDOUTP3_L

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Lattice Semiconductor User’s Guide
Logic Analysis Connection (LA1)
(see Appendix A, Figure 13)
Agilent single-ended probes designed for connection to the supplies. Tyco/AMP’s 2-767004-2 MICTOR connector
can be easily attached for signal bus analysis. Connections to general-purpose I/O pins are provided to the board-
ready 38-pin MICTOR connector.
Figure 5. Cable Assembly for Logic Analysis (Not Included)
Table 10. Mictor Connector Connections
Site BGA Signal Mictor Pin #
PR77A AB4 LA1 5
PR77B AC4 LA2 6
PR77C Y11 LA3 7
PR77D AA11 LA4 8
PR78A AE1 LA5 9
PR78B AF1 LA6 10
PR78C AB5 LA7 11
PR78D AC5 LA8 12
PR80A AD2 LA9 13
PR80B AE2 LA10 14
PR80C AD5 LA11 15

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Lattice Semiconductor User’s Guide
17-Segment LED Display
(see Appendix A, Figure 12)
General-purpose FPGA pins are connected to a 17-segment display according to the following table. These pins
can be driven low to illuminate the display segments.
PR80D AE5 LA12 16
PR81A AE3 LA13 17
PR81B AF3 LA14 18
PR81C AA10 LA15 19
PR81D AB10 LA16 20
PR82A AJ1 LA17 21
PR82B AK1 LA18 22
PR82C AB8 LA19 23
PR82D AC8 LA20 24
PR84A AF2 LA21 25
PR84B AG2 LA22 26
PR84C AC6 LA23 27
PR84D AD6 LA24 28
PR85A AE4 LA25 29
PR85B AF4 LA26 30
PR85C AF5 LA27 31
PR85D AF6 LA28 32
PR86A AH2 LA29 33
PR86B AJ2 LA30 34
PR86C AC7 LA31 35
PR86D AD7 LA32 36
PR89A AH3 LA33 37
PR89B AJ3 LA34 38
Table 10. Mictor Connector Connections (Continued)
Site BGA Signal Mictor Pin #

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Lattice Semiconductor User’s Guide
Table 11. 17-Segment LED Display
Segment BGA
A AC33
B AA30
C AD34
D AA28
E AA33
F AB34
G AA29
H Y31
K Y32
M W24
N W33
P Y34
R W26
S V34
T W25
U U33
DP Y27
AB
C
D
G
FE DP
H
TSR
KMN
UP
Test SMA Connections
General-purpose FPGA pins are available via SMA test connections. These connections are designed to permit
the evaluation of several FPGA I/O buffer types. The use of several termination schemes permits easy interfaces
for each buffer type.
Table 12. FPGA I/O Test SMA Connectors
SMA
Designation Name LFSC80 Signal
1152
BGA Termination Description
Termination
Resistor(s)
See Appendix A, Figure 12
J36 LVDS_INP0 PL22A E34 DC-Coupled n/a
J38 LVDS_INN0 PL22B F34 DC-Coupled n/a
J33 LVDS_INP1 PL24A F33 DC-Coupled n/a
J35 LVDS_INN1 PL24B G33 DC-Coupled n/a
J40 LVDS_INP2 PL25A K30 DC-Coupled n/a
J42 LVDS_INN2 PL25B L30 DC-Coupled n/a
J44 LVDS_INP3 PL26A G34 DC-Coupled n/a
J46 LVDS_INN3 PL26B H34 DC-Coupled n/a
J37 LVDS_OUTP0 PL17A F31 100-ohm Differential Termination R114
J32 LVDS_OUTN0 PL17B G31 100-ohm Differential Termination
J34 LVDS_OUTP1 PL18A D33 100-ohm Differential Termination R116
J39 LVDS_OUTN1 PL18B E33 100-ohm Differential Termination
J41 LVDS_OUTP2 PL20A F32 100-ohm Differential Termination R117
J43 LVDS_OUTN2 PL20B G32 100-ohm Differential Termination
J45 LVDS_OUTP3 PL21A H30 100-ohm Differential Termination R118
J47 LVDS_OUTN3 PL21B J30 100-ohm Differential Termination
See Appendix A, Figure 13
J48 URC_PLLT PR16A/URC_PLLC_IN_A F5 50-ohm Ground Termination R166

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High Speed Test Point
DP1
(see Appendix A, Figure 12)
General-purpose FPGA pins are available via a differential test pad. These connections allow a high-impedance
probe to measure the performance of a coupled- differential output buffer pair.
DDR2 Memory
U18
(see Appendix A, Figure 11)
The LatticeSC Evaluation Board is equipped with an 84-BGA DDR2 SDRAM memory device such as a Micron
MT47H16M16BG-3 device. The DDR2 memory interface includes a 16-bit wide device. The evaluation board
includes termination of address and command signals. It includes all power and external components needed to
demonstrate the memory controller of the LatticeSC device.
Ordering Information
Description Ordering Part Number
China RoHS Environment-Friendly
Use Period (EFUP)
LatticeSC PCI Express x4 Evaluation Board LFSC80E-P4-EV
10
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
[phone] (Outside North America)
e-mail: [e-mail]
Internet: www.latticesemi.com
Revision History
Date Version Change Summary
July 2007 01.0 Initial release.
December 2007 01.1 Updated FPGA Clock Management text section.
September 2009 01.2 Updated On-Board Flash Memory text section.
© 2009 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as
listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of
their respective holders. The specifications and information herein are subject to change without notice.
J49 URC_PLLC PR16B/URC_PLLT_IN_A G5 50-ohm Ground Termination R167
J50 PCLKT3_1 PR50C U6 50-ohm Ground Termination R168
J51 PCLKC3_1 PR50D V6 50-ohm Ground Termination R169
Table 12. FPGA I/O Test SMA Connectors (Continued)
SMA
Designation Name LFSC80 Signal
1152
BGA Termination Description
Termination
Resistor(s)

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Appendix A. Schematics
Figure 6.
5
5
4 4
3
3
2 2
1
1
D D C C BB A A
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
Cover Page
C
111
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
Cover Page
C
111
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
Cover Page
C
111
Board will meet PCI Express Electromechanical Specification Rev 1.0 Add-in card form factor for standard height and full length 4.376" Height x 9.5" Length
LatticeSC x4 PCI Express Platform Evaluation Board
Cover Page

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Figure 7. Configuration/Testpoints
5
5
4 4
3
3
2 2
1
1
D D C C BB A A
Q_1
SCSN_1
SCSN
TCK
LOCAL_TDI
LOCAL_TCK
LOCAL_TMS
PROGRAMN
TMS
LOCAL_TDO
TCK
LOCAL_TDO
TDI_BUF
TMS
INITN DONE
CS0N WRN CS1
GREEN1
GREEN2
RED1
RED2
BLUE1 BLUE2 YELLOW1
YELLOW2
SWITCH5
SWITCH6
SWITCH7
SWITCH8
SWITCH3
SWITCH2
SWITCH4
SWITCH1
SCSN
RED1 YELLOW1 GREEN1
BLUE1
RED2 YELLOW2 GREEN2 BLUE2
INITN
DONE
DONE
INITN
FLASH_DIS CS1
WRN
CS0N SCSN_0 SCSN_1 WRITE_PROT_N
FLASH_DIS
TDI_SC TMS_SC TCK
GSRN
TDO_SC PROGRAMN
WRITE_PROT_N
LOADER_CK
SCSN_0
DATA0
DATA1
Q_0 Q_1
DATA1 DATA0
Q_0
FLASH_DIS
RED1 YELLOW1 GREEN1 BLUE1
RED2
YELLOW2 GREEN2 BLUE2 SWITCH1 SWITCH2 SWITCH3 SWITCH4 SWITCH5 SWITCH6 SWITCH7 SWITCH8
WRITE_PROT_N
GSRN
PROGRAMN
PROGRAMN
GSRN
SI SCK
TMS_SC
TDI_SC
TDI_BUF
TDI_BUF
DATA2
DATA3
DATA4 DATA5
DATA6
DATA7
PB1 PB2
PB1 PB2
M3
M2 M1 M0
LOCAL_TDO
TDO_SC
3_3V
3_3V
3_3V
3_3V
3_3V
3_3V
3_3V
VCCIO1
3_3V
3_3V
3_3V
VCCIO1
12_0V 12_0V 12_0V 12_0V
12_0V 12_0V 12_0V 12_0V
VCCIO1
3_3V
VCCIO1
VCCIO1
VCCIO1
VCCIO1VCCIO1
3_3V
3_3V3_3V
TCK[11]
OSC_IN_4 [9]
PCIE_PERSTN [5]
TMS_XO[11]
TDI_XO[11] TDO_XO[11]
DATA[0..7][11]
LOADER_CK[11]
PROGRAMN[11]
GSRN[11]
DONE[11]
INITN[11]
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
Configuration/Testpoints
C
211
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
Configuration/Testpoints
C
211
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
Configuration/Testpoints
C
211
FROM ISPVM CABLE
This LED indicates activity on TDI.
FPGA RESETN/GSRN
PROGRAMN
DONE indicator will light when configuration is successfully completed
INITN indicator will light if an error occurs during configuration programming
FLASH1 FLASH0
ON
PUSH
BUTTON
#1 PUSH BUTTON #2
J103
HEADER 2X2
J103
HEADER 2X2
34 12
R35
4_7K-0603SMT
R35
4_7K-0603SMT
R161
4_7K-0603SMT
R161
4_7K-0603SMT
C7
100NF-0603SMT
C7
100NF-0603SMT
R14
470R-1206SMT
R14
470R-1206SMT
U3
M25P80-FLASH
U3
M25P80-FLASH
S#
1
Q
2
W#
3
GND
4
VCC 8
HOLD# 7
CLK 6
DI 5
C2
10NF-0603SMT
C2
10NF-0603SMT
R20
4_7K-0603SMT
R20
4_7K-0603SMT
R1954_7K-0603SMT R1954_7K-0603SMT
RN1H
EXB2HV471JV
470R
RN1H
EXB2HV471JV
470R
89
RN3B
4.7K
RN3B
4.7K
27
Y
D5 LED-SMT1206_YELLOW
Y
D5 LED-SMT1206_YELLOW
R29
4_7K-0603SMT
R29
4_7K-0603SMT
SW6 SW DIP-3 CTS 194-4MST SW6 SW DIP-3 CTS 194-4MST
1
2
3 6
54
7
8
C1
100NF-0603SMT
C1
100NF-0603SMT
R16
10K-0603SMT
R16
10K-0603SMT
Q5 2N2222/SOT23 Q5 2N2222/SOT23
3
1
2
RN3D
EXBV8V472JV
4.7K
RN3D
EXBV8V472JV
4.7K
45
R56
4_7K-0603SMT
R56
4_7K-0603SMT
R26
10K-0603SMT
R26
10K-0603SMT
Q7 2N2222/SOT23 Q7 2N2222/SOT23
3
1
2
U4
MAX6817
U4
MAX6817
IN1
1
GND
2
IN2
3
OUT2 4
VCC 5
OUT1 6
U24
MAX6817
U24
MAX6817
IN1
1
GND
2
IN2
3
OUT2 4
VCC 5
OUT1 6
SW8
B3F-1150
Momentary Switch
SW8
B3F-1150
Momentary Switch
13 2 4
RN2F
EXB2HV103JV
10K
RN2F
EXB2HV103JV
10K
611
Q1 2N2222/SOT23 Q1 2N2222/SOT23
3
1
2
R25
10K-0603SMT
R25
10K-0603SMT
R197
4_7K-0603SMT
R197
4_7K-0603SMT
R19
4_7K-0603SMT
R19
4_7K-0603SMT
B
D9 LED-SMT1206_BLUE
B
D9 LED-SMT1206_BLUE
R4
680R-0603SMT
R4
680R-0603SMT
R
D2 LED-SMT1206_RED
R
D2 LED-SMT1206_RED
Q2 2N2222/SOT23 Q2 2N2222/SOT23
3
1
2
RN1A
EXB2HV471JV
470R
RN1A
EXB2HV471JV
470R
116
Q9 2N2222/SOT23 Q9 2N2222/SOT23
3
1
2
J94 JUMPER1 J94 JUMPER1
12
R34 220R-0603SMT R34 220R-0603SMT
RN2C
EXB2HV103JV
10K
RN2C
EXB2HV103JV
10K
314
Q8 2N2222/SOT23 Q8 2N2222/SOT23
3
1
2
R33
4_7K-0603SMT
R33
4_7K-0603SMT
R5
680R-0603SMT
R5
680R-0603SMT
RN3C
4.7K
RN3C
4.7K
36
R38
100R-0603SMT
R38
100R-0603SMT
B
D10 LED-SMT1206_BLUE
B
D10 LED-SMT1206_BLUE
SW3 TDA10H0SK1 SW3 TDA10H0SK1
1
12
23
34 45 56 67 78
89
910
10
11 11 12 12
13 13 14 14
15 15
16 16 17 17
18 18 19 19 20 20
R
D11 LED-SMT1206_GREEN
R
D11 LED-SMT1206_GREEN
RN3A
4.7K
RN3A
4.7K
18
R18
4_7K-0603SMT
R18
4_7K-0603SMT
R3
680R-0603SMT
R3
680R-0603SMT
RN2A
EXB2HV103JV
10K
RN2A
EXB2HV103JV
10K
116
U7
NC7WZ16-MACO6A/Fairchild TinyLogic
U7
NC7WZ16-MACO6A/Fairchild TinyLogic
IN A1 1
GND
2
IN A2 3
OUT Y2
4
VCC 5
OUT Y1
6
RN2D
EXB2HV103JV
10K
RN2D
EXB2HV103JV
10K
413
R27
470R-1206SMT
R27
470R-1206SMT
R194
4_7K-0603SMT
R194
4_7K-0603SMT
RN1C
EXB2HV471JV
470R
RN1C
EXB2HV471JV
470R
314
G
D7 LED-SMT1206_GREEN
G
D7 LED-SMT1206_GREEN
R15
680R-0603SMT
R15
680R-0603SMT
R23
470R-1206SMT
R23
470R-1206SMT
CONFIG/TOP
LFSC 1152BGA
LFSC1152BGA
U1F
CONFIG/TOP
LFSC 1152BGA
LFSC1152BGA
U1F
CCLK
B2 DONE
D34 INITN C33
M0
J27
M1
K27
M2
M26
M3
L26
MPIIRQN
K8
PROGRAMN
J8
PT66C/RDY
K17
RDCFGN
C34
PT74D/WRN
L16
PT75B/CS0N
D14
PT77A/CS1
G14
PT77C/LDCN
M16
PT77D/HDC
M15
RESETN
B33
TCK
D1
TDI
C1
TDO
M9
TMS
L9
PT51A/D15 G21
PT51B/A21 F21
PT51C/DP1 M19
PT51D/D14 M20
PT52A/MPITEAN E21
PT52B/A18 D21
PT52C/A20 K19 PT52D/A19 L19
PT53A/A17 E20 PT53B/A15 D20
PT53C/D13 L20
PT53D/A16 L21
PT55A/A14 B20 PT55B/A13 A20
PT55C/D12 K22 PT55D/D11 K21
PT56A/A12 G20 PT56B/A11 F20
PT56C/D31/PCLKT1_7 J22
PT56D/D30/PCLKC1_7 H22
PT57A/A10 B19
PT57B/A9 A19
PT57C/D29/PCLKT1_6 J21
PT57D/D28/PCLKC1_6 H21
PT59A/A8 B18 PT59B/A7 A18
PT59C/VREF1_1 H20
PT59D/D27 H19
PT60A/A6 E19 PT60B/A5 D19
PT60C/D26/PCLKT1_5 L18
PT60D/D25/PCLKC1_5 K18
PT61A/A4 C19 PT61B/A3 C20
PT61C/A2 J19 PT61D/A1 J18
PT63A/A0 F18
PT63B/MPIRTRYN E18
PT63C/D24/PCLKT1_4 H18
PT63D/DP3/PCLKC1_4 G18
PT65A/MPICLK/PCLKT1_0 B17
PT65B/PCLKC1_0 A17
PT65C/DP2 H17
PT65D/D23 G17
PT66A/MPIACKN F17
PT66B/DP0 E17
PT66D/EXTDONEO L17
PT67A/EXT CLKP2I C16
PT67B/EXT CLKP2O C15
PT67C/D22/PCLKT1_1 H16
PT67D/D21/PCLKC1_1 H15
PT69A/EXT CLKP1I E16
PT69B/EXT CLKP1O D16
PT69C/D20/PCLKT1_2 J17
PT69D/D19/PCLKC1_2 J16
PT70A/EXT DONEI E15
PT70B/DOUT D15
PT70C/D18 H13
PT70D/VREF2_1 J13
PT71A/QOUT B16
PT71B/D0
A16
PT73A/D1
A15
PT71C/D17/PCLKT1_3 H14
PT71D/D16/PCLKC1_3 J14
PT73B/D2
B15
PT73C/D3
K13
PT73D/D4
K14
PT74A/D5
F15
PT74B/D6
G15
PT74C/D7
K16
PT75A/RDN E14
PT75C/D10 L14
PT75D/D9 L15
PT77B/D8 F14
VCC
GND
TDO TDI ispEN_N
NC
TMS TCK
DONE
INITN
J2 HEADER 10
VCC
GND
TDO TDI ispEN_N
NC
TMS TCK
DONE
INITN
J2 HEADER 10
1
2 3
4 5 6
7
8 9
10
R6
220R-0603SMT
R6
220R-0603SMT
U5
NC7WZ16-MACO6A/Fairchild TinyLogic
U5
NC7WZ16-MACO6A/Fairchild TinyLogic
IN A1 1
GND
2
IN A2 3
OUT Y2
4
VCC 5
OUT Y1
6
R
D3 LED-SMT1206_RED
R
D3 LED-SMT1206_RED
RN2G
EXB2HV103JV
10K
RN2G
EXB2HV103JV
10K
710
R1964_7K-0603SMT R1964_7K-0603SMT
1
0
SW2B
1
0
SW2B
10
2
3
R28
470R-1206SMT
R28
470R-1206SMT
R324_7K-0603SMT R324_7K-0603SMT
R13
470R-1206SMT
R13
470R-1206SMT
Y
D21 LED-SMT1206_RED
Y
D21 LED-SMT1206_RED
J100 JUMPER1 J100 JUMPER1
1 2
RN2H
EXB2HV103JV
10K
RN2H
EXB2HV103JV
10K
8 9
R11
10K-0603SMT
R11
10K-0603SMT
R8
680R-0603SMT
R8
680R-0603SMT
Q4 2N2222/SOT23 Q4 2N2222/SOT23
3
1
2
RN1B
EXB2HV471JV
470R
RN1B
EXB2HV471JV
470R
215
RN2B
EXB2HV103JV
10K
RN2B
EXB2HV103JV
10K
215
SW4
B3F-1150
Momentary Switch
SW4
B3F-1150
Momentary Switch
13
24
C6
100NF-0603SMT
C6
100NF-0603SMT
1
0
SW2A
1
0
SW2A
12
11
1
Y
D6 LED-SMT1206_YELLOW
Y
D6 LED-SMT1206_YELLOW
Y
D23 LED-SMT1206_RED
Y
D23 LED-SMT1206_RED
RN1E
EXB2HV471JV
470R
RN1E
EXB2HV471JV
470R
512
R24
470R-1206SMT
R24
470R-1206SMT
R7
680R-0603SMT
R7
680R-0603SMT
1
0
SW1A
1
0
SW1A
12
11
1
R36
4_7K-0603SMT
R36
4_7K-0603SMT
R12
680R-0603SMT
R12
680R-0603SMT
1
0
SW2C
1
0
SW2C
9
8
4
Q6 2N2222/SOT23 Q6 2N2222/SOT23
3
1
2
R170 680R-0603SMT R170 680R-0603SMT
R30
4_7K-0603SMT
R30
4_7K-0603SMT
R214_7K-0603SMT R214_7K-0603SMT
R17
4_7K-0603SMT
R17
4_7K-0603SMT
R314_7K-0603SMT R314_7K-0603SMT
U6A
SN74LVC125A/SO14
U6A
SN74LVC125A/SO14
1OE_N 1
1A 2
1Y
3
2OE_N 4
2A 5
2Y
6
GND
7
G
D4
LED-SMT1206_GREEN
G
D4
LED-SMT1206_GREEN
U22
M25P64-FLASH
U22
M25P64-FLASH
S#
7
Q
8
DU1
3
DU2
4
VCC
2HOLD# 1
DU4
6DU3
5
W# 9
VSS 10
DU5 11
DU6 12 DU7 13
DU8 14
D15
CK 16
1
0
SW1B
1
0
SW1B
10
2
3
R41
0R-0603SMT
R41
0R-0603SMT
R10
680R-0603SMT
R10
680R-0603SMT
R67
4_7K-0603SMT
R67
4_7K-0603SMT
C497
100NF-0603SMT
C497
100NF-0603SMT
RN1F
EXB2HV471JV
470R
RN1F
EXB2HV471JV
470R
611
1
0
SW1C
1
0
SW1C
9
8
4
R9
680R-0603SMT
R9
680R-0603SMT
1
0
SW2D
1
0
SW2D
7
5
6
RN1D
EXB2HV471JV
470R
RN1D
EXB2HV471JV
470R
413
C3
100NF-0603SMT
C3
100NF-0603SMT
1
0
SW1D
1
0
SW1D
7
5
6
R1
470R-1206SMT
R1
470R-1206SMT
R37
100R-0603SMT
R37
100R-0603SMT
R
D1
LED-SMT1206_RED
R
D1
LED-SMT1206_RED
G
D8 LED-SMT1206_GREEN
G
D8 LED-SMT1206_GREEN
SW7
B3F-1150
Momentary Switch
SW7
B3F-1150
Momentary Switch
1 3
2 4
J105 HEADER 3X2 J105 HEADER 3X2
2 4 6
1 3 5
RN1G
EXB2HV471JV
470R
RN1G
EXB2HV471JV
470R
710
RN2E
EXB2HV103JV
10K
RN2E
EXB2HV103JV
10K
512
J95 JUMPER1 J95 JUMPER1
1 2
SW5
B3F-1150
Momentary Switch
SW5
B3F-1150
Momentary Switch
13
24
R224_7K-0603SMT R224_7K-0603SMT
R162 680R-0603SMT R162 680R-0603SMT
PP11PP11
12
Q3
2N2222/SOT23
Q3
2N2222/SOT23
3
1
2
R2
470R-1206SMT
R2
470R-1206SMT
C4
100NF-0603SMT
C4
100NF-0603SMT
R160
4_7K-0603SMT
R160
4_7K-0603SMT

17
LatticeSC PCI Express x4 Evaluation Board
Lattice Semiconductor User’s Guide
Figure 8. Power Supplies
5
5
4 4
3
3
2 2
1
1
D D C C BB A A
MC_VREF_REG
VTT_6_7 VTT_2_3
VTT_2_3 VTT_6_7
VCC_CORE
1_2V
1_5V
1_5V 1_5V
VDDRX VDDTX
2_5V
VDDP
VDDRX VDDP
VDDTX
1_2V VDDP
VDDRX
1_8V
2_5V
2_5V 1_8V
1_8V
SC_VTT
2_5V
3_3V
VCC_CORE
2_5V
VDDRX
1_8V
VDDTX
VDDP
VDDTX
SC_VTT
3_3V
VCCIO1
2_5V
MC_VREF_REG[6]
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
Power Supplies
C
311
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
Power Supplies
C
311
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
Power Supplies
C
311
2.5V PROBE POINT
1.8V PROBE POINT
VDDOB PROBE POINT
VDDIB PROBE POINT
VDDAX25 PROBE POINT
VDDP PROBE POINT VDDTX PROBE POINT VDDRX PROBE POINT
VCC12 PROBE POINT
VCCAUX PROBE POINT
0.9V VTT PROBE POINT
VCCIO1 SELECT
VCCIO1PROBE POINT
C281 100NF-0603SMT C281 100NF-0603SMT
C20
1UF-16V-0805SMT
C20
1UF-16V-0805SMT
ANALOG POWER
LFSC 1152BGA
LFSC1152BGA
U1B
ANALOG POWER
LFSC 1152BGA
LFSC1152BGA
U1B
A_VDDIB0_L
D32
A_VDDIB0_R
D3
A_VDDIB1_L
D31
A_VDDIB1_R
D4
A_VDDIB2_L
D30
A_VDDIB2_R
D5
A_VDDIB3_L
D29
A_VDDIB3_R
D6
A_VDDOB0_L
F29
A_VDDOB0_R
F6
A_VDDOB1_L
F28
A_VDDOB1_R
F7
A_VDDOB2_L
F27
A_VDDOB2_R
F8
A_VDDOB3_L
F26
A_VDDOB3_R
F9
A_VDDP_L
H25
A_VDDP_R
H10
A_VDDRX0_L
C32
A_VDDRX0_R
C3
A_VDDRX1_L
C29
A_VDDRX1_R
C6
A_VDDRX2_L
C28
A_VDDRX2_R
C7
A_VDDRX3_L
C25
A_VDDRX3_R
C10
A_VDDTX0_L
E30
A_VDDTX0_R
E5
A_VDDTX1_L
E29
A_VDDTX1_R
E6
A_VDDTX2_L
E28
A_VDDTX2_R
E7
A_VDDTX3_L
E27
A_VDDTX3_R
E8
B_VDDIB0_L
D28
B_VDDIB0_R
D7
B_VDDIB1_L
D27
B_VDDIB1_R
D8
B_VDDIB2_L
D26
B_VDDIB2_R
D9
B_VDDIB3_L
E26
B_VDDIB3_R
E9
B_VDDOB0_L D25
B_VDDOB0_R D10
B_VDDOB1_L D24
B_VDDOB1_R D11
B_VDDOB2_L D23
B_VDDOB2_R D12
B_VDDOB3_L D22
B_VDDOB3_R D13
B_VDDP_L L22
B_VDDP_R L13
B_VDDRX0_L G25
B_VDDRX0_R G10
B_VDDRX1_L G24
B_VDDRX1_R G11
B_VDDRX2_L G23
B_VDDRX2_R G12
B_VDDRX3_L G22
B_VDDRX3_R G13
B_VDDTX0_L K25
B_VDDTX0_R K10
B_VDDTX1_L L25
B_VDDTX1_R L10
B_VDDTX2_L K24
B_VDDTX2_R K11
B_VDDTX3_L L24
B_VDDTX3_R L11
VDDAX25_L
M23
VDDAX25_R
M12
+
C13
47UF-16V_TANTBSMT
+
C13
47UF-16V_TANTBSMT
C456
10NF-0603SMT
C456
10NF-0603SMT
C284
100NF-0603SMT
C284
100NF-0603SMT
PP64PP64
12
C219
100NF-0603SMT
C219
100NF-0603SMT
C449 10NF-0603SMT C449 10NF-0603SMT
LFSC 1152BGA
VCC CORE
LFSC1152BGA
U1J
LFSC 1152BGA
VCC CORE
LFSC1152BGA
U1J
VCC
N13 VCC
N22 VCC
P14 VCC P17 VCC
P16 VCC
P19 VCC P18 VCC
P21 VCC
U14 VCC R15 VCC R17 VCC R18 VCC
R20 VCC U21 VCC
T14 VCC T16 VCC T19 VCC T21 VCC
U15 VCC
U17 VCC U18 VCC U20 VCC
V15 VCC V17 VCC
V18 VCC V20 VCC
W14 VCC W16 VCC W19 VCC W21 VCC
V14 VCC Y15 VCC
Y17 VCC
Y18 VCC
Y20 VCC
V21 VCC
AA14 VCC
AA17 VCC
AA16 VCC AA19 VCC
AA18 VCC AA21 VCC
AB13 VCC AB22
C467
10NF-0603SMT
C467
10NF-0603SMT
+
C498
22UF-16V_TANTBSMT
+
C498
22UF-16V_TANTBSMT
C212
100NF-0603SMT
C212
100NF-0603SMT
C12
100NF-0603SMT
C12
100NF-0603SMT
C446
10NF-0603SMT
C446
10NF-0603SMT
C488 100NF-0603SMT C488 100NF-0603SMT
C283
100NF-0603SMT
C283
100NF-0603SMT
C28
100NF-0603SMT
C28
100NF-0603SMT
C15
100NF-0603SMT
C15
100NF-0603SMT
C221
100NF-0603SMT
C221
100NF-0603SMT
C484 10NF-0603SMT C484 10NF-0603SMT
PP12PP12
12
C26
100NF-0603SMT
C26
100NF-0603SMT
+
C53
22UF-16V_TANTBSMT
+
C53
22UF-16V_TANTBSMT
C455
10NF-0603SMT
C455
10NF-0603SMT
C445
10NF-0603SMT
C445
10NF-0603SMT
C54
1UF-16V-0805SMT
C54
1UF-16V-0805SMT
C239
100NF-0603SMT
C239
100NF-0603SMT
C454
10NF-0603SMT
C454
10NF-0603SMT
C18
100NF-0603SMT
C18
100NF-0603SMT
C280 100NF-0603SMT C280 100NF-0603SMT
C502 10NF-0603SMT C502 10NF-0603SMT
C11
1UF-16V-0805SMT
C11
1UF-16V-0805SMT
C14
100NF-0603SMT
C14
100NF-0603SMT
C241
10NF-0603SMT
C241
10NF-0603SMT
C278 100NF-0603SMT C278 100NF-0603SMT
C479 10NF-0603SMT C479 10NF-0603SMT
C17
100NF-0603SMT
C17
100NF-0603SMT
C16
100NF-0603SMT
C16
100NF-0603SMT
+
C51
22UF-16V_TANTBSMT
+
C51
22UF-16V_TANTBSMT
C453
10NF-0603SMT
C453
10NF-0603SMT
C462
100NF-0603SMT
C462
100NF-0603SMT
C447 10NF-0603SMT C447 10NF-0603SMT
C44 100NF-0603SMT C44 100NF-0603SMT
C450 10NF-0603SMT C450 10NF-0603SMT
C468
100NF-0603SMT
C468
100NF-0603SMT
C451
10NF-0603SMT
C451
10NF-0603SMT
C485 10NF-0603SMT C485 10NF-0603SMT
C52
1UF-16V-0805SMT
C52
1UF-16V-0805SMT
TP4
TESTPOINT
TP4
TESTPOINT
1
C242
100NF-0603SMT
C242
100NF-0603SMT
C27
100NF-0603SMT
C27
100NF-0603SMT
PP10PP10
12
C496 100NF-0603SMT C496 100NF-0603SMT
R394_7K-0603SMT R394_7K-0603SMT
C213
100NF-0603SMT
C213
100NF-0603SMT
C243
10NF-0603SMT
C243
10NF-0603SMT
C245
100NF-0603SMT
C245
100NF-0603SMT
C279 100NF-0603SMT C279 100NF-0603SMT
+
C29
100UF-FKSMT
+
C29
100UF-FKSMT
C452
10NF-0603SMT
C452
10NF-0603SMT
C492
100NF-0603SMT
C492
100NF-0603SMT
C487 10NF-0603SMT C487 10NF-0603SMT
R199
0R-0805SMT
R199
0R-0805SMT
C495 100NF-0603SMT C495 100NF-0603SMT
C43 10NF-0603SMT C43 10NF-0603SMT
PP13PP13
12
C214
100NF-0603SMT
C214
100NF-0603SMT
C448 10NF-0603SMT C448 10NF-0603SMT
J106 JUMPER1 J106 JUMPER1
1 2
C246
10NF-0603SMT
C246
10NF-0603SMT
C42 100NF-0603SMT C42 100NF-0603SMT
+
C45
22UF-16V_TANTBSMT
+
C45
22UF-16V_TANTBSMT
PP1PP1
12
C494 100NF-0603SMT C494 100NF-0603SMT
C285
100NF-0603SMT
C285
100NF-0603SMT
C244
10NF-0603SMT
C244
10NF-0603SMT
R198
0R-0805SMT
R198
0R-0805SMT
C501 100NF-0603SMT C501 100NF-0603SMT
+
C47
22UF-16V_TANTBSMT
+
C47
22UF-16V_TANTBSMT
LFSC 1152BGA
VCCIO
LFSC1152BGA
U1I
LFSC 1152BGA
VCCIO
LFSC1152BGA
U1I
VCCIO1
D17
VCCIO1
C18
VCCIO1
F16
VCCIO1
G19
VCCIO1
K12
VCCIO1
K15
VCCIO1
J20
VCCIO1
L23
VCCIO1
J9
VCCIO1
J25
VCCIO2
E3
VCCIO2
G6
VCCIO2
H4
VCCIO2
K7
VCCIO2
L3
VCCIO2
M11
VCCIO2
N6
VCCIO2
P4
VCCIO2
R9
VCCIO3
T7
VCCIO3
U3
VCCIO3
V4
VCCIO3
W6
VCCIO3
Y10
VCCIO3
AA3
VCCIO3
AB7
VCCIO3
AC10
VCCIO3
AD4
VCCIO3
AE6
VCCIO3
AG3
VCCIO3
AK4
VCCIO4
AF9
VCCIO4
AD12
VCCIO4
AF15
VCCIO4
AJ7
VCCIO4
AH10
VCCIO4
AJ13
VCCIO4
AH16
VCCIO4
AM5
VCCIO4
AL8
VCCIO4
AM11
VCCIO4
AL14
VCCIO4
AM17
VCCIO5
AE20
VCCIO5
AE23
VCCIO5
AE26
VCCIO5
AJ19
VCCIO5
AH22
VCCIO5
AJ25
VCCIO5
AH28
VCCIO5
AL18
VCCIO5
AM21
VCCIO5
AL24
VCCIO5
AM27
VCCIO5
AL30
VCCIO6
AK32
VCCIO6
AG31
VCCIO6
AE28
VCCIO6
AD32
VCCIO6
AC24
VCCIO6
AB29
VCCIO6
AA31
VCCIO6
Y26
VCCIO6
W28
VCCIO6
V32
VCCIO6
U31
VCCIO6
T29
VCCIO7
R25
VCCIO7
P32
VCCIO7
N28
VCCIO7
M25
VCCIO7
L31
VCCIO7
K29
VCCIO7
H32
VCCIO7
G28
VCCIO7
E31
C49
100NF-0603SMT
C49
100NF-0603SMT
TP1
TESTPOINT
TP1
TESTPOINT
1
+
C40
22UF-16V_TANTBSMT
+
C40
22UF-16V_TANTBSMT
C282 100NF-0603SMT C282 100NF-0603SMT
C41
1UF-16V-0805SMT
C41
1UF-16V-0805SMT
C36 10NF-0603SMT C36 10NF-0603SMT
LFSC 1152BGA
SUPPLIES
LFSC1152BGA
U1H
LFSC 1152BGA
SUPPLIES
LFSC1152BGA
U1H
PROBE_GND
AF8 PROBE_VCC
AF7
TEMP
AF27
VCC12
N15 VCC12 N20 VCC12 R13 VCC12 R22 VCC12
Y13 VCC12 Y22 VCC12
AB15 VCC12 AB20 VCC12
N21 VCC12
P22 VCC12
AA22 VCC12
AB21 VCC12 AB14 VCC12 AA13 VCC12
P13 VCC12
N14
VCCAUX
N16 VCCAUX N17 VCCAUX N18 VCCAUX N19 VCCAUX
M18 VCCAUX M13 VCCAUX M14 VCCAUX
N12 VCCAUX
P12 VCCAUX
U12 VCCAUX
T13 VCCAUX
U13 VCCAUX
V13 VCCAUX
W13 VCCAUX
AA12 VCCAUX AB12 VCCAUX
AC12 VCCAUX AC13 VCCAUX AC14 VCCAUX
AB16 VCCAUX AB17 VCCAUX
AC17 VCCAUX
AB18 VCCAUX AB19 VCCAUX
AC21 VCCAUX AC22 VCCAUX AC23 VCCAUX
AB23 VCCAUX AA23 VCCAUX
W22 VCCAUX
V22 VCCAUX V23 VCCAUX
U22 VCCAUX
T22 VCCAUX P23 VCCAUX
N23 VCCAUX
M22 VCCAUX M21
VCCJ
C2
XRES
AF28 VTT _7
T23 VTT_7
R23 VTT_7 N24 VTT_6
Y23 VTT _6
W23 VTT_6
AB24 VTT _5
AD22 VTT _5 AC20 VTT _5 AC19 VTT _4 AC16 VTT _4 AC15 VTT _4 AD13 VTT _3
AB11 VTT _3
Y12 VTT _3
W12 VTT_2
T12 VTT_2
R12 VTT_2 N11
C46
1UF-16V-0805SMT
C46
1UF-16V-0805SMT
C444
10NF-0603SMT
C444
10NF-0603SMT
C460
10NF-0603SMT
C460
10NF-0603SMT
C493 100NF-0603SMT C493 100NF-0603SMT
U8
LP2996-SO8
U8
LP2996-SO8
GND
1
SD
2
VSENSE 3
VREF
4
VDDQ
5
AVIN 6
PVIN 7
VTT 8
C217
100NF-0603SMT
C217
100NF-0603SMT
+
C30
22UF-16V_TANTBSMT
+
C30
22UF-16V_TANTBSMT
C465
10NF-0603SMT
C465
10NF-0603SMT
+
C39
22UF-16V_TANTBSMT
+
C39
22UF-16V_TANTBSMT
C48
1UF-16V-0805SMT
C48
1UF-16V-0805SMT
C463
100NF-0603SMT
C463
100NF-0603SMT
PP3PP3
12
C442 10NF-0603SMT C442 10NF-0603SMT
+
C23
10UF-16V_TANTBSMT
+
C23
10UF-16V_TANTBSMT
+
C32
22UF-16V_TANTBSMT
+
C32
22UF-16V_TANTBSMT
C499
1UF-16V-0805SMT
C499
1UF-16V-0805SMT
C38 100NF-0603SMT C38 100NF-0603SMT
C31
1UF-16V-0805SMT
C31
1UF-16V-0805SMT
C34
1UF-16V-0805SMT
C34
1UF-16V-0805SMT
C464
10NF-0603SMT
C464
10NF-0603SMT
R43
1K-0603SMT
R43
1K-0603SMT
C481
10NF-0603SMT
C481
10NF-0603SMT
R40
0R-0603SMT
R40
0R-0603SMT
C33
1UF-16V-0805SMT
C33
1UF-16V-0805SMT
C503 100NF-0603SMT C503 100NF-0603SMT
FB5
BLM41PG600SN1
FB5
BLM41PG600SN1
C459
10NF-0603SMT
C459
10NF-0603SMT
C469
100NF-0603SMT
C469
100NF-0603SMT
C37 10NF-0603SMT C37 10NF-0603SMT
C216
100NF-0603SMT
C216
100NF-0603SMT
PP9PP9
12
C22
1UF-16V-0805SMT
C22
1UF-16V-0805SMT
C483
10NF-0603SMT
C483
10NF-0603SMT
C491
100NF-0603SMT
C491
100NF-0603SMT
C458
10NF-0603SMT
C458
10NF-0603SMT
C215
100NF-0603SMT
C215
100NF-0603SMT
TP2
TESTPOINT
TP2
TESTPOINT
1
+
C24
22UF-16V_TANTBSMT
+
C24
22UF-16V_TANTBSMT
C480
10NF-0603SMT
C480
10NF-0603SMT
PP2PP2
12
FB3
BLM41PG600SN1
FB3
BLM41PG600SN1
C35 100NF-0603SMT C35 100NF-0603SMT
C490
100NF-0603SMT
C490
100NF-0603SMT
C10
100NF-0603SMT
C10
100NF-0603SMT
C25
1UF-16V-0805SMT
C25
1UF-16V-0805SMT
C286
100NF-0603SMT
C286
100NF-0603SMT
C461
10NF-0603SMT
C461
10NF-0603SMT
C482
10NF-0603SMT
C482
10NF-0603SMT
C457
10NF-0603SMT
C457
10NF-0603SMT
FB7
BLM41PG600SN1
FB7
BLM41PG600SN1
C220
100NF-0603SMT
C220
100NF-0603SMT
C443
10NF-0603SMT
C443
10NF-0603SMT
+
C8
22UF-16V_TANTBSMT
+
C8
22UF-16V_TANTBSMT
C500 10NF-0603SMT C500 10NF-0603SMT
C247
10NF-0603SMT
C247
10NF-0603SMT
PP4PP4
12
J107 HEADER 3X1 J107 HEADER 3X1
11
2
233
PP5PP5
12
C466
100NF-0603SMT
C466
100NF-0603SMT
PP8PP8
12
TP3
TESTPOINT
TP3
TESTPOINT
1
C489
100NF-0603SMT
C489
100NF-0603SMT
C21
100NF-0603SMT
C21
100NF-0603SMT
C240
100NF-0603SMT
C240
100NF-0603SMT
C218
100NF-0603SMT
C218
100NF-0603SMT
PP6PP6
12
PP7PP7
12
C9
1UF-16V-0805SMT
C9
1UF-16V-0805SMT
+
C19
22UF-16V_TANTBSMT
+
C19
22UF-16V_TANTBSMT
C486 10NF-0603SMT C486 10NF-0603SMT

18
LatticeSC PCI Express x4 Evaluation Board
Lattice Semiconductor User’s Guide
Figure 9. DC/DC Conversion
5
5
4 4
3
3
2 2
1
1
D D C C BB A A
2_5_TRIM
CORE_TRIM
1_2_TRIM
VCCA
3_3_TRIM
VCCA
12_0V
GND
12_0V
VCCA
12_0V
2_5V
3_3V12_0V
VCC_CORE
1_5V
2_5V12_0V
1_2V
1_8V
12_0V
12_0V
VCC_CORE
3_3VIN
12_0V
1_8V
1_5V
1_2V
3_3VIN
3_3VIN
12_0V
12_0V
12_0V
12_0V
3_3VIN 3_3V
12_0V 12_0V
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
DC/DC Conversion
C
411
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
DC/DC Conversion
C
411
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
DC/DC Conversion
C
411
GND Pads Distributed around the board
2.5V
POWER RAIL GOOD INDICATORS
VCC CORE
V5.2V8.1 3.3V1.2V
1.5V
SC VCC_CORE
1.8V
1.5V
1.2V
12V INPUT GOOD
+12VDC GND
3.3V
4.32K Typical
SET VALUE 1V= 36.5K 1.2V=17.4K
POWER INPUT
VCC12 power supply must always be higher than VCC Core, or if lower, then well within 150mV of VCC Core
C66
100NF-0603SMT
C66
100NF-0603SMT
TP6
TESTPOINT
TP6
TESTPOINT
1
R45 470R-1206SMT R45 470R-1206SMT
C74
22UF-16V_TANTBSMT
C74
22UF-16V_TANTBSMT
R49 100R-0603SMT R49 100R-0603SMT
R50 150R-0603SMT R50 150R-0603SMT
R75
124R-0603SMT
R75
124R-0603SMT
R204
100R-0603SMT
R204
100R-0603SMT
R72
0R-0603SMT
R72
0R-0603SMT
R77
OPEN-0805SMT
R77
OPEN-0805SMT
TB1 Terminal Block/ED1202DS TB1 Terminal Block/ED1202DS
1 2
R68
124R-0603SMT
R68
124R-0603SMT
TP7
TESTPOINT
TP7
TESTPOINT
1
R66 15_4K/SMT0603 R66 15_4K/SMT0603
TP16
TESTPOINT
TP16
TESTPOINT
1
G
D12
LED-SMT1206_GREEN
G
D12
LED-SMT1206_GREEN
TP11
TESTPOINT
TP11
TESTPOINT
1
C70
10UF-16V_TANTBSMT
C70
10UF-16V_TANTBSMT
R165
OPEN-0805SMT
R165
OPEN-0805SMT
U10
PTH12060W
U10
PTH12060W
GND
1
VIN
2
INHIBIT#
3
ADJUST
4
SENSE 5
VOUT 6
GND
7TRACK 8
MDWN 9
MUP 10
R76
3_3K-0603SMT
R76
3_3K-0603SMT
U14
PTH12060W
U14
PTH12060W
GND
1
VIN
2
INHIBIT#
3
ADJUST
4
SENSE 5
VOUT 6
GND
7TRACK 8
MDWN 9
MUP 10
C63
10UF-16V_TANTBSMT
C63
10UF-16V_TANTBSMT
C75
100NF-0603SMT
C75
100NF-0603SMT
TP15
TESTPOINT
TP15
TESTPOINT
1
R71
100K-0603SMT
R71
100K-0603SMT
R81
1M-0603SMT
R81
1M-0603SMT
C73
100NF-0603SMT
C73
100NF-0603SMT
F2 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse F2 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse
C68
10UF-16V_TANTBSMT
C68
10UF-16V_TANTBSMT
R55
100K-0603SMT
R55
100K-0603SMT
C65
22UF-16V_TANTBSMT
C65
22UF-16V_TANTBSMT
U16
AMS1503CT
U16
AMS1503CT
VPOW ER
5
VCONTROL
4OUTPUT 3
ADJUST_GND
2SENSE 1
R164
0R-0805SMT
R164
0R-0805SMT
TP14
TESTPOINT
TP14
TESTPOINT
1
+
C72 330UF-FKSMT
+
C72 330UF-FKSMT
C71
10UF-16V_TANTBSMT
C71
10UF-16V_TANTBSMT
F4 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse F4 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse
C60 10UF-16V_TANTBSMT C60 10UF-16V_TANTBSMT
R80 BOURNS-3224W-10K R80 BOURNS-3224W-10K
R59
0R-0603SMT
R59
0R-0603SMT
+
C55
470UF-FKSMT
+
C55
470UF-FKSMT
J98 JUMPER1 J98 JUMPER1
1 2
R203
49_9R-0603SMT
R203
49_9R-0603SMT
R73
0R-0603SMT
R73
0R-0603SMT
R200
100R-0805SMT
R200
100R-0805SMT
+
C62 330UF-FKSMT
+
C62 330UF-FKSMT
+
C59 330UF-FKSMT
+
C59 330UF-FKSMT
+
C69 330UF-FKSMT
+
C69 330UF-FKSMT
G
D14
LED-SMT1206_GREEN
G
D14
LED-SMT1206_GREEN
F1 F1251CT-ND 10A Fast-Blo SMT Socketed Fuse F1 F1251CT-ND 10A Fast-Blo SMT Socketed Fuse
+
C56
100UF-FKSMT
+
C56
100UF-FKSMT
F3 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse F3 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse
TP12
TESTPOINT
TP12
TESTPOINT
1
R156 24K/SMT0603 R156 24K/SMT0603
R53
10K-0603SMT
R53
10K-0603SMT
C61
10UF-16V_TANTBSMT
C61
10UF-16V_TANTBSMT
J3
22HP037
Male Power Jack 2.1mm
J3
22HP037
Male Power Jack 2.1mm
1
3
2
R46 470R-1206SMT R46 470R-1206SMT
R201 0R-0603SMTR201 0R-0603SMT
R63
OPEN-0805SMT
R63
OPEN-0805SMT
Q11
2N2222/SOT23
Q11
2N2222/SOT23
3
1
2
R62
1_8K-0603SMT
R62
1_8K-0603SMT
R44
470R-1206SMT
R44
470R-1206SMT
R58
100K-0603SMT
R58
100K-0603SMT
U12
AMS1503CT
U12
AMS1503CT
VPOW ER
5
VCONTROL
4OUTPUT 3
ADJUST_GND
2SENSE 1
G
D15 LED-SMT1206_GREEN
G
D15 LED-SMT1206_GREEN
R78 BOURNS-3224W-2K R78 BOURNS-3224W-2K
TP10
TESTPOINT
TP10
TESTPOINT
1
TP13
TESTPOINT
TP13
TESTPOINT
1
R60 BOURNS-3224W-10K R60 BOURNS-3224W-10K
Q13
2N2222/SOT23
Q13
2N2222/SOT23
3
1
2
R202
10K-0603SMT
R202
10K-0603SMT
R74
OPEN-0805SMT
R74
OPEN-0805SMT
R51
10K-0603SMT
R51
10K-0603SMT
R64 BOURNS-3224W-10K R64 BOURNS-3224W-10K
Q10
2N2222/SOT23
Q10
2N2222/SOT23
3
1
2
R69
OPEN-0603SMT
R69
OPEN-0603SMT
R101 BOURNS-3224W-5K R101 BOURNS-3224W-5K
G
D13
LED-SMT1206_GREEN
G
D13
LED-SMT1206_GREEN
G
D16 LED-SMT1206_GREEN
G
D16 LED-SMT1206_GREEN
C64
100NF-0603SMT
C64
100NF-0603SMT
TP5
TESTPOINT
TP5
TESTPOINT
1
F6 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse F6 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse
C58
10UF-16V_TANTBSMT
C58
10UF-16V_TANTBSMT
R54
10K-0603SMT
R54
10K-0603SMT
TP8
TESTPOINT
TP8
TESTPOINT
1
R70
100K-0603SMT
R70
100K-0603SMT
G
D17 LED-SMT1206_GREEN
G
D17 LED-SMT1206_GREEN
TP9
TESTPOINT
TP9
TESTPOINT
1
R163
0R-0805SMT
R163
0R-0805SMT
R52
10K-0603SMT
R52
10K-0603SMT
R47 470R-1206SMT R47 470R-1206SMT
R65 BOURNS-3224W-10K R65 BOURNS-3224W-10K
G
D18
LED-SMT1206_GREEN
G
D18
LED-SMT1206_GREEN
R79
2_2K-0603SMT
R79
2_2K-0603SMT
U11
PTH03010W
U11
PTH03010W
GND
1
VIN
2
INHIBIT#
3
ADJUST
4
SENSE 5
VOUT 6
GND
7TRACK 8
MDWN 9
MUP 10
R61
0R-0603SMT
R61
0R-0603SMT
F5 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse F5 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse
U25
SC1592
U25
SC1592
ILIM 1
IN 2
CNTL 3
GND 4
OUT 5
SENSE 6
EN 7
TAB
8
Q12
2N2222/SOT23
Q12
2N2222/SOT23
3
1
2
J60 HEADER 3x1 J60 HEADER 3x1
1V 1
ADJ
2
1.2V 3
U15
PTH12060W
U15
PTH12060W
GND
1
VIN
2
INHIBIT#
3
ADJUST
4
SENSE 5
VOUT 6
GND
7TRACK 8
MDWN 9
MUP 10
R48
470R-1206SMT
R48
470R-1206SMT

19
LatticeSC PCI Express x4 Evaluation Board
Lattice Semiconductor User’s Guide
Figure 10. SERDES
5
5
4 4
3
3
2 2
1
1
D D C C BB A A
B_HDINP1_R PETp2
50
B_HDINN1_R PETn2
50
B_HDINP2_R PETp150
B_HDINN2_R PETn150
B_HDINP3_R PETp0
50
B_HDINP0_R PETp350
B_HDINN3_R PETn0
50
B_HDINN0_R PETn3
50
B_HDOUTP1_R
50
B_HDOUTN1_R50
B_HDOUTP2_R50
B_HDOUTN2_R
50
B_HDOUTP3_R
50
B_HDOUTN3_R
50
B_HDOUTP0_R
50
B_HDOUTN0_R
50
PERp0 PERn0 PERp1 PERn1
PETp3
PERp2 PERn2
PERp3 PERn3
PCIE_3V3
PETp0 PETn0
PETp1 PETn1 PETp2 PETn2
PETn3
PCIE_3V3
3G_361_INN0
3G_361_INN1
3G_361_INP1 3G_361_INN2 3G_361_INP2 3G_361_INN3 3G_361_INP3
3G_361_OUTN0
3G_361_OUTN1 3G_361_OUTP1 3G_361_OUTN2 3G_361_OUTP2 3G_361_OUTN3
3G_361_OUTP3
3G_361_OUTP03G_361_INP0
A_HDINP1_LSMPTE_360_INP1
SMPTE_360_INN1 A_HDINN1_L
A_HDOUTP1_L
A_HDOUTN1_L
A_REFCLKP_L
PCIE_CLKN PCIE_CLKP
3G_361_INN0
3G_361_INN1 3G_361_INP1 3G_361_INN2 3G_361_INP2 3G_361_INN3
3G_361_INP3 3G_361_INP0
3G_361_OUTN0 3G_361_OUTN1
3G_361_OUTP1
3G_361_OUTN2
3G_361_OUTP2
3G_361_OUTN3
3G_361_OUTP3 3G_361_OUTP0
A_HDINN1_L
A_HDINP1_L
PERp3
PERn3 PERp2 PERn2
PERp1
PERn1
PERp0
PERn0
B_REFCLKP_L B_REFCLKN_L
A_REFCLKN_L
A_HDOUTN1_L
A_HDOUTP1_L
B_HDINP0_R
B_HDINN0_R B_HDINP1_R B_HDINN1_R B_HDINP2_R B_HDINN2_R B_HDINP3_R B_HDINN3_R B_HDOUTP0_R
B_HDOUTN0_R
B_HDOUTP1_R B_HDOUTN1_R
B_HDOUTP2_R
B_HDOUTN2_R B_HDOUTN3_R B_HDOUTP3_R
x1
x4
x4 x1
A_REFCLKP_L A_REFCLKN_L
B_REFCLKN_LB_REFCLKP_L
A_RXREFCLK_L
A_RESP_L
A_RESP_R
A_RESP_L
A_RESP_R
LOOPp LOOPn
A_HDINN0_L A_HDINP0_L A_HDINN3_L
A_HDINP3_L
A_HDOUTN0_L
CON2_HDOUTN
CON2_HDOUTP
A_HDOUTN3_L A_HDOUTP3_L
A_HDINP3_L
A_HDINN3_L
CON1_HDOUTN
CON1_HDOUTN
CON1_HDOUTP
CON1_HDOUTPA_HDOUTP0_L CON2_HDOUTN CON2_HDOUTPA_HDOUTP3_L
A_HDOUTN3_L
2_CREFCLK- 2_CREFCLK+
A_HDINP0_L A_HDINN0_L
A_HDOUTN0_L A_HDOUTP0_L
1_CREFCLK-
1_CREFCLK+
12_0V
PCIE_CLKN[8]
PCIE_CLKP[8]
A_REFCLKN_L[9] A_REFCLKP_L[9]
B_REFCLKP_L [9]
B_REFCLKN_L [9]
PCIE_PERSTN[2]
A_RXREFCLK_L[9]
2_CREFCLK+[8] 2_CREFCLK-[8]
1_CREFCLK+[8]
1_CREFCLK-[8]
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
SERDES
C
511
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
SERDES
C
511
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
SERDES
C
511
3G SMAs
VIDEO BNCs
X4 PCIe Board Fingers
B side = Primary Component Side(TOP) A side = Secondary Component Side(BOTTOM)
PRSNT SELECT
LVDS Ref Clk Terminations Place close to U1
J97 JUMPER1 J97 JUMPER1
1 2
CON2
X1 PCIE RECPT
CON2
X1 PCIE RECPT
PERn0
A1
PERp0
A2
RSVD
A3
SB_RTN
A4
CREFCLK-
A5
CREFCLK+
A6
PWR_RTN
A7
CPERST#
A8
GND
A9
GND B1
RSVD B2
CWAKE# B3
CPRSNT# B4
GND B5
PWR B6
CPWRON B7
PETn0 B8
PETp0 B9
R190 4_02K-0603SMT R190 4_02K-0603SMT
R222 0R-0603SMT R222 0R-0603SMT
R223 0R-0603SMT R223 0R-0603SMT
J22
Rosenberger 32K153-400E3
J22
Rosenberger 32K153-400E3
1
2
C109100NFX5R-0402SMT C109100NFX5R-0402SMT
CN1
PCI Express x4 Edge Finger Conn.
CN1
PCI Express x4 Edge Finger Conn.
PRSNT1#
A1
+12V
A2
+12V
A3
GND
A4
JTAG2
A5
JTAG3
A6
JTAG4
A7
JTAG5
A8
+3.3V
A9
+3.3V
A10
PERST#
A11
GND
A12
REFCLK+
A13
REFCLK-
A14
GND
A15
PERp0
A16
PERn0
A17
GND
A18
RSVD_A19
A19
GND
A20
PERp1
A21
PERn1
A22
GND
A23
GND
A24
PERp2
A25
PERn2
A26
GND
A27
GND
A28
PERp3
A29
PERn3
A30
GND
A31
+12V B1 +12V B2
RSVD_B3 B3
GND B4
SMCLK B5
SMDAT B6
GND B7
+3.3V B8
JTAG1 B9
3.3Vaux B10
WAKE# B11
RSVD_B12 B12
GND B13
PETp0 B14 PETn0 B15
GND B16
PRSNT3# B17
GND B18
PETp1 B19 PETn1 B20
GND B21 GND B22
PETp2 B23
PETn2 B24
GND B25
GND B26
PETp3 B27 PETn3 B28
GND B29
RSVD_B30 B30
PRSNT4# B31
GND B32
RSVD_A32
A32
J14 BNC-Trompeter/UCBBJE20-7 J14 BNC-Trompeter/UCBBJE20-7
1
2
J23
Rosenberger 32K153-400E3
J23
Rosenberger 32K153-400E3
1
2
C103100NFX5R-0402SMT C103100NFX5R-0402SMT
J96
HEADER 2X2
J96
HEADER 2X2
3 4
12
J26
Rosenberger 32K153-400E3
J26
Rosenberger 32K153-400E3
1
2
C108100NFX5R-0402SMT C108100NFX5R-0402SMT
SERDES
LFSC-1152BGA
LFSC1152BGA
U1A
SERDES
LFSC-1152BGA
LFSC1152BGA
U1A
A_HDOUTN0_L
B31 A_HDOUTN0_R B4
A_HDOUTN1_L
B30 A_HDOUTN1_R B5
A_HDOUTN2_L
B27 A_HDOUTN2_R B8
A_HDOUTN3_L
B26 A_HDOUTN3_R B9
A_HDOUT P0_L
A31 A_HDOUTP0_R A4
A_HDOUT P1_L
A30 A_HDOUTP1_R A5
A_HDOUT P2_L
A27 A_HDOUTP2_R A8
A_HDOUT P3_L
A26 A_HDOUTP3_R A9
A_REFCLKN_L
H27
A_REFCLKN_R
H8
A_REFCLKP_L
G27
A_REFCLKP_R
G8
ULC_RESP
H26
URC_RESP
H9
RESERVED1
G26
RESERVED2
G9
A_HDINP3_L
A25
A_HDINP2_L
A28
A_HDINP1_L
A29
A_HDINP0_L
A32
A_HDINN3_L
B25
A_HDINN2_L
B28
A_HDINN1_L
B29
A_HDINN0_L
B32
A_HDINP3_R A10
A_HDINP2_R A7
A_HDINP1_R A6 A_HDINP0_R A3
A_HDINN3_R B10 A_HDINN2_R B7 A_HDINN1_R B6 A_HDINN0_R B3
B_HDINP3_L
E22
B_HDINN3_L
F22
B_HDINP2_L
E23
B_HDINN2_L
F23
B_HDINP1_L
E24
B_HDINN1_L
F24
B_HDINP0_L
E25
B_HDINN0_L
F25
B_HDOUT P3_L
A21
B_HDOUTN3_L
B21
B_HDOUT P2_L
A22
B_HDOUT N2_L
B22
B_HDOUT P1_L
A23
B_HDOUT N1_L
B23
B_HDOUT P0_L
A24
B_HDOUT N0_L
B24
B_REFCLKN_R
J11
B_REFCLKP_L
H24
B_REFCLKP_R
H11
RESERVED4
J23
RESERVED6
J12
RESERVED3
H23
RESERVED5
H12
B_HDINN0_R F10
B_HDINN1_R F11 B_HDINN2_R F12
B_HDINN3_R F13
B_HDINP0_R E10 B_HDINP1_R E11 B_HDINP2_R E12 B_HDINP3_R E13
B_HDOUTN0_R B11 B_HDOUTN1_R B12 B_HDOUTN2_R B13
B_HDOUTN3_R B14
B_HDOUTP0_R A11 B_HDOUTP1_R A12
B_HDOUTP2_R A13
B_HDOUTP3_R A14
B_REFCLKN_L
J24
J29
Rosenberger 32K153-400E3
J29
Rosenberger 32K153-400E3
1
2
J27
Rosenberger 32K153-400E3
J27
Rosenberger 32K153-400E3
1
2
C107100NFX5R-0402SMT C107100NFX5R-0402SMT
R224 0R-0603SMT R224 0R-0603SMT
J15
Rosenberger 32K153-400E3
J15
Rosenberger 32K153-400E3
1
2
C105100NFX5R-0402SMT C105100NFX5R-0402SMT
C520100NFX5R-0402SMT C520100NFX5R-0402SMT
CON1
X1 PCIE RECPT
CON1
X1 PCIE RECPT
PERn0
A1
PERp0
A2
RSVD
A3
SB_RTN
A4
CREFCLK-
A5
CREFCLK+
A6
PWR_RTN
A7
CPERST#
A8
GND
A9
GND B1
RSVD B2
CWAKE# B3
CPRSNT# B4
GND B5
PWR B6
CPWRON B7
PETn0 B8 PETp0 B9
C111
2.7UF-0603SMT
C111
2.7UF-0603SMT
J31
Rosenberger 32K153-400E3
J31
Rosenberger 32K153-400E3
1
2
J16
Rosenberger 32K153-400E3
J16
Rosenberger 32K153-400E3
1
2
C104100NFX5R-0402SMT C104100NFX5R-0402SMT
R221 0R-0603SMT R221 0R-0603SMT
R185 OPEN-0603SMTR185 OPEN-0603SMT
J19
Rosenberger 32K153-400E3
J19
Rosenberger 32K153-400E3
1
2
C106100NFX5R-0402SMT C106100NFX5R-0402SMT
J5
Rosenberger 32K153-400E3
J5
Rosenberger 32K153-400E3
1
2
J21 BNC-Trompeter/UCBBJE20-7 J21 BNC-Trompeter/UCBBJE20-7
1
2
J6
Rosenberger 32K153-400E3
J6
Rosenberger 32K153-400E3
1
2
TP17 TESTPOINT TP17 TESTPOINT
1
C110100NFX5R-0402SMT C110100NFX5R-0402SMT
J20
Rosenberger 32K153-400E3
J20
Rosenberger 32K153-400E3
1
2
J10
Rosenberger 32K153-400E3
J10
Rosenberger 32K153-400E3
1
2
J11
Rosenberger 32K153-400E3
J11
Rosenberger 32K153-400E3
1
2
R186 OPEN-0603SMTR186 OPEN-0603SMT
C519100NFX5R-0402SMT C519100NFX5R-0402SMT C521100NFX5R-0402SMT C521100NFX5R-0402SMT
J28
Rosenberger 32K153-400E3
J28
Rosenberger 32K153-400E3
1
2
C518100NFX5R-0402SMT C518100NFX5R-0402SMT
J9 BNC-Trompeter/UCBBJE20-7 J9 BNC-Trompeter/UCBBJE20-7
1
2
J30
Rosenberger 32K153-400E3
J30
Rosenberger 32K153-400E3
1
2
R189 4_02K-0603SMT R189 4_02K-0603SMT
J4 BNC-Trompeter/UCBBJE20-7 J4 BNC-Trompeter/UCBBJE20-7
1
2
C112
2.7UF-0603SMT
C112
2.7UF-0603SMT

20
LatticeSC PCI Express x4 Evaluation Board
Lattice Semiconductor User’s Guide
Figure 11. DDR2
5
5
4 4
3
3
2 2
1
1
D D C C BB A A
MemIntf_BA1
MemIntf_BA0
MemIntf_RAS# MemIntf_WE#
MemIntf_CAS#
MemIntf_A5 MemIntf_A3 MemIntf_A0
MemIntf_A8
MemIntf_A4 MemIntf_A1 MemIntf_A7 MemIntf_A6
MemIntf_A2
MemIntf_A9
MemIntf_A12
MemIntf_A11 MemIntf_A10
MemIntf_A[0:12]
MC_VREF
MemIntf_DQ1 MemIntf_DQ4
MemIntf_DQ6
MemIntf_DQ2 MemIntf_DQ0 MemIntf_DQ5 MemIntf_DQ7 MemIntf_DQ3 MemIntf_DQ8
MemIntf_DQ[0:15]
MemIntf_DQ9
MemIntf_DQ14 MemIntf_DQ13 MemIntf_DQ11
MemIntf_DQ10
MemIntf_DQ15 MemIntf_DQ12
MemIntf_A5
MemIntf_A3 MemIntf_A0 MemIntf_A8
MemIntf_A4 MemIntf_A1
MemIntf_A7 MemIntf_A6 MemIntf_A2 MemIntf_A9 MemIntf_A10 MemIntf_A12 MemIntf_A11
MemIntf_A[0:12]
MemIntf_ODT0 MemIntf_RAS#
MemIntf_WE#
MemIntf_CS0# MemIntf_CE0# MemIntf_BA0 MemIntf_BA1
MemIntf_K# MemIntf_K
MemIntf_CAS#
MemIntf_DQS0 MemIntf_DQS1
MemIntf_DM0
MemIntf_DM1
MemIntf_CS0# MemIntf_CE0#
MemIntf_ODT0
VDDL
MemIntf_ODT0 MemIntf_BA0 MemIntf_BA1 MemIntf_WE# MemIntf_CAS#
MemIntf_CE0#
MemIntf_A5 MemIntf_A3 MemIntf_A0 MemIntf_A8 MemIntf_A4 MemIntf_A1 MemIntf_A7 MemIntf_A6 MemIntf_A2 MemIntf_A9
MemIntf_A10 MemIntf_A11 MemIntf_A12 MemIntf_K# MemIntf_K MemIntf_DM0 MemIntf_DM1 MemIntf_DQ0 MemIntf_DQ1
MemIntf_DQ2
MemIntf_DQ3 MemIntf_DQ4 MemIntf_DQ5
MemIntf_DQ6
MemIntf_DQ10 MemIntf_DQ11 MemIntf_DQ9 MemIntf_DQ8 MemIntf_DQ7
MemIntf_DQ13
MemIntf_DQ12
MemIntf_DQ14
MemIntf_DQ15
MC_VREF MC_VREF MemIntf_RAS# MemIntf_CS0#
MemIntf_DQS0 MemIntf_DQS1
MemIntf_DQS0# MemIntf_DQS1#
MemIntf_DQS0#
MemIntf_DQS1#
DDR_VTT
1_8V
2_5V
2_5V
1_8V
1_8V
1_8V
DDR_VTT
1_8V
1_8V
1_8V 1_8V
1_8V
DDR_VTT
MC_VREF_REG [3]
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
DDR2
C
611
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
DDR2
C
611
Title Size Project Rev Date: Sheet of
SC80 X4 PCI EXPRESS Card
3.0
DDR2
C
611
ALL Memory controller buses, clocks, and control traces must be 50 Ohm Transmission lines
U1 Pin
U18 Pin
X1
X2 Termination
at end of line
VTT
X1
needs to be matched length for all traces
R1R1
R1=50 Ohm
RP1
CTS-RT1402B7
R1R1
R1=50 Ohm
RP1
CTS-RT1402B7
A2 A2
B2 B2
C2 C2
D2 D2
E2 E2
F2 F2
G2 G2
H2 H2
J2 J2
A3
A3
B3
B3
C3
C3
D3
D3
E3
E3
F3
F3
G3
G3
H3
H3
J3
J3
A1 A1
B1 B1
C1 C1
D1 D1
E1 E1
F1 F1
G1 G1
H1 H1
J1 J1
C143
10NF-0603SMT
C143
10NF-0603SMT
C133
1UF-16V-0805SMT
C133
1UF-16V-0805SMT
C337 10NF-0603SMT C337 10NF-0603SMT
C148
10NF-0603SMT
C148
10NF-0603SMT
C361 10NF-0603SMT C361 10NF-0603SMT
FB9
BLM41PG600SN1
FB9
BLM41PG600SN1
C155
100NF-0603SMT
C155
100NF-0603SMT
C395 100NF-0603SMT C395 100NF-0603SMT
SP59SP59
1
C128
10NF-0603SMT
C128
10NF-0603SMT
R108
1K-0603SMT
R108
1K-0603SMT
SP66SP66
1
C154
10NF-0603SMT
C154
10NF-0603SMT
C394 10NF-0603SMT C394 10NF-0603SMT
C338 100NF-0603SMT C338 100NF-0603SMT
C119
100NF-0603SMT
C119
100NF-0603SMT
C146
100NF-0603SMT
C146
100NF-0603SMT
R107 OPEN-0603SMT R107 OPEN-0603SMT
C145
10NF-0603SMT
C145
10NF-0603SMT
C362 100NF-0603SMT C362 100NF-0603SMT
SP57SP57
1
+
C116
47UF-16V_TANTBSMT
+
C116
47UF-16V_TANTBSMT
SP61SP61
1
R106 1K_ADJ/SMT3MM R106 1K_ADJ/SMT3MM
R1R1
R1=50 Ohm
RP2
CTS-RT1402B7
R1R1
R1=50 Ohm
RP2
CTS-RT1402B7
A2 A2
B2 B2
C2 C2
D2 D2
E2 E2
F2 F2
G2 G2
H2 H2
J2 J2
A3
A3
B3
B3
C3
C3
D3
D3
E3
E3
F3
F3
G3
G3
H3
H3
J3
J3
A1 A1 B1 B1
C1 C1
D1 D1
E1 E1
F1 F1
G1 G1
H1 H1
J1 J1
+
C123
22UF-16V_TANTBSMT
+
C123
22UF-16V_TANTBSMT
C124
1UF-16V-0805SMT
C124
1UF-16V-0805SMT
SP67SP67
1
R104 0R-0603SMT R104 0R-0603SMT
U18A
DDR2-SDRAM-84FBGA
U18A
DDR2-SDRAM-84FBGA
NC_A2 A2
DQ14 B1 DQ15 B9
DQ9 C2 DQ8 C8
DQ12 D1 DQ11 D3 DQ10 D7 DQ13 D9
DQ6 F1 DQ7 F9 DQ1 G2 DQ0 G8 DQ4 H1 DQ3 H3 DQ2 H7 DQ5 H9
NC_E2 E2
LDQS#/NU E8
LDM F3
LDQS F7
CK J8
CK# K8
CKE K2
WE# K3
RAS# K7
ODT K9
BA0 L2 BA1 L3
CAS# L7
CS# L8
RFU_L1 L1
A0 M8
A1 M3 A2 M7
A3 N2
A4 N8 A5 N3
A6 N7
A7 P2 A8 P8
A9 P3
A10 M2 A11 P7 A12 R2
RFU_R3 R3 RFU_R7 R7
NC_R8 R8
UDM B3
UDQS B7
UDQS#/NU A8
C114
1UF-16V-0805SMT
C114
1UF-16V-0805SMT
C152
10NF-0603SMT
C152
10NF-0603SMT
C127
100NF-0603SMT
C127
100NF-0603SMT
C151
100NF-0603SMT
C151
100NF-0603SMT
C398 100NF-0603SMT C398 100NF-0603SMT
C147
10NF-0603SMT
C147
10NF-0603SMT
R102 0R-0603SMT R102 0R-0603SMT
SP62SP62
1
C125
10NF-0603SMT
C125
10NF-0603SMT
C129
100NF-0603SMT
C129
100NF-0603SMT
SP65SP65
1
R105
1K-0603SMT
R105
1K-0603SMT
R103
4_7K-0603SMT
R103
4_7K-0603SMT
C115
100NF-0603SMT
C115
100NF-0603SMT
R111 0R-0603SMT R111 0R-0603SMT
C396 10NF-0603SMT C396 10NF-0603SMT
C113
100NF-0603SMT
C113
100NF-0603SMT
U18B
DDR2-SDRAM-84FBGA
U18B
DDR2-SDRAM-84FBGA
VDD
A1
VDD
E1
VDD
J9
VDD
M9
VDD
R1
VSS
A3
VSS
E3
VSS
J3
VSS
N1
VSS
P9
VDDQ
A9
VDDQ
C1
VDDQ
C3
VDDQ
C7
VDDQ
C9
VDDQ
E9
VDDQ
G1
VDDQ
G3
VDDQ
G7
VDDQ
G9
VSSQ
A7
VSSQ
B2
VSSQ
B8
VSSQ
D2
VSSQ
D8
VSSQ
E7
VSSQ
F2
VSSQ
F8
VSSQ
H2
VSSQ
H8
VDDL
J1 VREF J2
VSSDL
J7
PP59PP59
12
SP64SP64
1
C136
100NF-0603SMT
C136
100NF-0603SMT
+
C120
100UF-FKSMT
+
C120
100UF-FKSMT
SP60SP60
1
C144
100NF-0603SMT
C144
100NF-0603SMT
SP58SP58
1
C137
10NF-0603SMT
C137
10NF-0603SMT
SP63SP63
1
C149
100NF-0603SMT
C149
100NF-0603SMT
C135
10NF-0603SMT
C135
10NF-0603SMT
C360 100NF-0603SMT C360 100NF-0603SMT
+
C117
22UF-16V_TANTBSMT
+
C117
22UF-16V_TANTBSMT
R109
1K-0603SMT
R109
1K-0603SMT
R113
1K-0603SMT
R113
1K-0603SMT
C131
100NF-0603SMT
C131
100NF-0603SMT
R112
OPEN-0603SMT
R112
OPEN-0603SMT
C397 100NF-0603SMT C397 100NF-0603SMT
C118
1UF-16V-0805SMT
C118
1UF-16V-0805SMT
C134
100NF-0603SMT
C134
100NF-0603SMT
C153
100NF-0603SMT
C153
100NF-0603SMT
U17
LP2996-SO8
U17
LP2996-SO8
GND
1
SD
2
VSENSE 3
VREF
4
VDDQ
5
AVIN 6
PVIN 7
VTT 8
C130
10NF-0603SMT
C130
10NF-0603SMT
C236 10NF-0603SMT C236 10NF-0603SMT
C138
100NF-0603SMT
C138
100NF-0603SMT
PP58PP58
12
C126
10NF-0603SMT
C126
10NF-0603SMT
LFSC 1152BGA BOTTOM
BANK 5
BANK 6
LFSC1152BGA
U1C
LFSC 1152BGA BOTTOM
BANK 5
BANK 6
LFSC1152BGA
U1C
PB121C AK7
PB121D AK6
PB123A AN5 PB123B AN4
PB123C/VREF1_4 AH9
PB123D AH8
PB124A/LRC_DLLT_IN_C/LRC_DLLT_FB_D AM3
PB124B/LRC_DLLC_IN_C/LRC_DLLC_FB_D AM4
PB124C AG9
PB124D AG8
PB125A/LRC_PLLT_IN_A/LRC_PLLT_FB_B AN2
PB125B/LRC_PLLC_IN_A/LRC_PLLC_FB_B AM2
PB125C/LRC_DLLT_IN_D/LRC_DLLT_FB_C AJ6
PB125D/LRC_DLLC_IN_D/LRC_DLLC_FB_C AH6
PB3A/LLC_PLLT_IN_A/LLC_PLLT_FB_B
AM33
PB3B/LLC_PLLC_IN_A/LLC_PLLC_FB_B
AN33
PB3C/LLC_DLLT_IN_C/LLC_DLLT_FB_D
AH29
PB3D/LLC_DLLC_IN_C/LLC_DLLC_FB_D
AJ29
PB51B/PCLKC5_0
AM22
PB51C
AJ24
PB51D/VREF2_5
AJ23
PB52A/PCLKT5_1
AN21
PB52B/PCLKC5_1
AN20
PB52C/PCLKT5_6
AE19
PB52D/PCLKC5_6
AD19
PB53A/PCLKT5_2
AK21
PB53B/PCLKC5_2
AK20
PB53C/PCLKT5_7
AK23
PB53D/PCLKC5_7
AK22
PB55A
AP23
PB55B
AP22
PB55C
AG21
PB55D
AG20
PB56A
AL20
PB56B
AL19
PB56C
AG19
PB56D
AF19
PB57A
AP21
PB57B
AP20
PB57C
AH21
PB57D
AH20
PB59A
AM20
PB59B
AM19
PB59C
AJ21
PB59D
AJ20
PB65A AP17
PB7D
AE25 PB7C
AF25 PB7B
AP32 PB7A/ODT 0
AN32
PB99D AF13
PB79C/DIFFR_4 AH12
PB79B/PCLKC4_5 AL12
PB79A/PCLKT4_5 AL13
PB77D AJ11
PB77C/VREF2_4 AJ12
PB77B/PCLKC4_0 AM12
PB77A/PCLKT4_0 AM13
PB75D/PCLKC4_6 AG14
PB75C/PCLKT 4_6 AG15
PB75B/PCLKC4_1 AK14
PB75A/PCLKT4_1 AK15
PB74D/PCLKC4_7 AD16
PB74C/PCLKT 4_7 AE16 PB74B/PCLKC4_2 AN14
PB74A/PCLKT4_2 AN15
PB73D AK12
PB73C AK13
PB73B AP12
PB73A AP13
PB71D AH14 PB71C AH15
PB71B AP14
PB71A AP15
PB70D AF16 PB70C AG16
PB70B AL15 PB70A AL16
PB65D AH17 PB65C AJ17
PB65B AP16
PB11C
AD24 PB11B
AP30 PB11A
AP31
PB101A AM10 PB101B AM9
PB101C AE14 PB101D AE13
PB104A AP9
PB104B AP8
PB104C AK11
PB104D AK10
PB107A AL10 PB107B AL9
PB107C AF12
PB107D AF11
PB109A AN9 PB109B AN8
PB109C AG11
PB109D AG10
PB111A AP7 PB111B AP6
PB111C AG13 PB111D AG12
PB113A AN7 PB113B AN6
PB113C AK9
PB113D AK8
PB115A AP5 PB115B AP4
PB115C AD11
PB115D AE11
PB117A AM7
PB117B AM6
PB117C AJ9 PB117D AJ8
PB119A AP3
PB119B AN3
PB119C AF10 PB119D AE10
PB121A AL7
PB121B AL6
PB69D AJ14
PB69C AJ15
PB69B AM15 PB69A AM16
PB67D AF17 PB67C AG17
PB67B AK16 PB67A AK17
PB66D AD17 PB66C AE17
PB66B AN16 PB66A AN17
PB4A/LLC_DLLT_IN_D/LLC_DLLT_FB_C
AM32
PB4B/LLC_DLLC_IN_D/LLC_DLLC_FB_C
AM31
PB4C
AG27
PB4D
AG26
PB5A
AL29
PB5B
AL28
PB5C
AH27
PB5D/VREF1_5
AH26
PB9D
AK28 PB9C
AK29 PB9B
AN30 PB9A AN31
PB11D
AE24
PB13A
AM29
PB13B
AM28
PB13C
AJ27
PB13D
AJ26
PB15A
AP29
PB15B
AP28
PB15C
AK27
PB15D
AK26
PB17A
AN29
PB17B
AN28
PB17C
AG25
PB17D
AG24
PB19A
AL26
PB19B
AL25
PB19C
AG23
PB19D
AG22
PB21A
AN27
PB21B
AN26
PB21C
AF24
PB21D
AF23
PB24A
AP27
PB24B
AP26
PB24C
AK25
PB24D
AK24
PB27A
AN25
PB27B
AN24
PB27C
AE22
PB27D
AE21
PB29A
AM26
PB29B
AM25
PB29C
AF22
PB29D
AF21
PB45A
AN23
PB45B
AN22
PB48A/PCLKT5_3
AP25
PB48B/PCLKC5_3
AP24
PB48C/PCLKT 5_4
AD21
PB48D/PCLKC5_4
AD20
PB49A/PCLKT5_5
AL23
PB49B/PCLKC5_5
AL22
PB49C/DIFFR_5
AH24
PB49D
AH23
PB51A/PCLKT5_0
AM23
PB60A
AK19
PB60B
AK18
PB60C
AE18
PB60D
AD18
PB61A
AN19
PB61B
AN18
PB61C
AG18
PB61D
AF18
PB63A
AP19
PB63B
AP18
PB63C
AJ18
PB63D
AH18
PB99C AF14
PB99B AN10 PB99A AN11
PB83B AP10 PB83A AP11
PB80D/PCLKC4_4 AD15
PB80C/PCLKT 4_4 AD14 PB80B/PCLKC4_3 AN12
PB80A/PCLKT4_3 AN13
PB79D AH11
PP63PP63
12
+
C122
10UF-16V_TANTBSMT
+
C122
10UF-16V_TANTBSMT
C139
10NF-0603SMT
C139
10NF-0603SMT
C276 100NF-0603SMT C276 100NF-0603SMT
C275 10NF-0603SMT C275 10NF-0603SMT
SP37SP37
1
C142
100NF-0603SMT
C142
100NF-0603SMT
R110
1K_ADJ/SMT3MM
R110
1K_ADJ/SMT3MM
C237 100NF-0603SMT C237 100NF-0603SMT
C140
100NF-0603SMT
C140
100NF-0603SMT
+
C132
22UF-16V_TANTBSMT
+
C132
22UF-16V_TANTBSMT
C141
10NF-0603SMT
C141
10NF-0603SMT
C150
10NF-0603SMT
C150
10NF-0603SMT
C121
1UF-16V-0805SMT
C121
1UF-16V-0805SMT