Lattice Semiconductor Himax HM01B0 User manual

Himax HM01B0 UPduino Shield
User Guide
FPGA-UG-02081 Version 1.0
November 2018

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
2 FPGA-UG-02081-1.0
Contents
Acronyms in This Document .................................................................................................................................................3
1. Introduction..................................................................................................................................................................4
1.1. Further Information................................................................................................................................................4
2. Power Supply ................................................................................................................................................................5
3. Board Overview ............................................................................................................................................................5
4. iCE40 UltraPlus Pin Summary .......................................................................................................................................7
5. Software Requirements ................................................................................................................................................9
6. Board Configuration and Programming........................................................................................................................9
6.1. Board Configuration ...............................................................................................................................................9
6.2. Programming the SPI Flash...................................................................................................................................10
6.3. Programming the CRAM Directly .........................................................................................................................11
7. Storage and Handling..................................................................................................................................................13
8. Ordering Information..................................................................................................................................................13
References ..........................................................................................................................................................................14
Technical Support Assistance .............................................................................................................................................14
Appendix A. Himax HM01B0 UPduino Shield Board Schematics........................................................................................15
Revision History...................................................................................................................................................................19
Figures
Figure 1.1. Himax HM01B0 UPduino Shield..........................................................................................................................4
Figure 3.1. UPduino v2.0 –Front View .................................................................................................................................5
Figure 3.2. UPduino v2.0 –Back View ..................................................................................................................................5
Figure 3.3. Himax HM01B0 Adapter Board –Front View .....................................................................................................6
Figure 3.4. Himax HM01B0 Adapter Board –Back View ......................................................................................................6
Figure 6.1. Programming Settings.........................................................................................................................................9
Figure 6.2. Device Family and Device Setting .....................................................................................................................10
Figure 6.3. Onboard SPI Flash Device Properties Settings..................................................................................................11
Figure 6.4. Device Family and Device Settings....................................................................................................................12
Figure 6.5. Device Properties for iCE40 Device Configuration Memory .............................................................................12
Figure A.1. UPduino 2.0 FPGA Schematic ...........................................................................................................................15
Figure A.2. UPduino 2.0 SPI Flash/I/O Pins/Regulator Connections...................................................................................16
Figure A.3. UPduino 2.0 FTDI Chip Connection...................................................................................................................17
Figure A.4. Himax HM01B0 Adapter Board Schematic.......................................................................................................18
Tables
Table 4.1. Upstream Connector Mapping.............................................................................................................................7
Table 8.1. Reference Part Number .....................................................................................................................................13

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0 3
Acronyms in This Document
A list of acronyms used in this document.
Acronym
Definition
FPGA
Field-Programmable Gate Array
FTDI
Future Technology Devices International
I²S
Inter-IC Sound
LED
Light-Emitting Diode
SOIC
Small Outline Integrated Circuit
SPI
Serial Peripheral Interface
USB
Universal Serial Bus

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
4 FPGA-UG-02081-1.0
1. Introduction
The Himax HM01B0 UPduino Shield is an evaluation and development platform based on the iCE40™UltraPlus FPGA
(Field-Programmable Gate Array). It consists of two boards –the UPduino v2.0 and the Himax HM01B0 Aapter Board.
The UPduino v2.0 is an efficient, low-cost base platform designed by Gnarly Grey, including the iCE40UP5K FPGA, and
basic power and programming control. The Himax HM01B0 Adapter Board adds a camera with a low-power Himax
image sensor, two microphones, and multiple LEDs for quick visual feedback.
This flexible and powerful platform enables designers to investigate and experiment with key features of the iCE40
UltraPlus FPGA and assists with rapid prototyping and testing of specific designs.
Key features of the Himax HM01B0 UPduino Shield include:
UPduino v2.0
iCE40 FPGA - iCE40UP5K-SG48I (5K LUTs, 39 I/Os, 120 Kbits Embedded Block RAM, 1 PLL and more in a 7 mm x
7 mm 48-pin QFN package.)
USB connection for UART and device programming
On-board Boot Flash
RGB LED
Himax HM01B0 Adapter Board
Camera module with Himax HM01B0 image sensor
Two I2S microphones
Six green LEDs
Also included with the kit
3 ft Micro USB cable for programming and power
QuickStart Guide
Figure 1.1. Himax HM01B0 UPduino Shield
1.1. Further Information
This board features an iCE40UP5K-SG48I FPGA. More information about this FPGA can be found on the Lattice web site
at: www.latticesemi.com/iCE40UltraPlus. A complete description of this device can be found in iCE40 UltraPlus Family
Data Sheet (FPGA-DS-02008).

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0 5
2. Power Supply
External 5 V Power from the USB Connector (J7) provides power to the entire two board set.
Alternately, power can be applied to headers on the UPduino v2.0 board:
J6 - 5.0 V
J9 –Ground
3. Board Overview
The following diagrams show key features of the Himax HM01B0 Adapter and UPduino v2.0 boards.
RGB LED iCE40 UltraPlus FPGA Micro USB Connector
Figure 3.1. UPduino v2.0 –Front View
FTDI FT2232HL
USB uC SPI Flash
Figure 3.2. UPduino v2.0 –Back View

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
6 FPGA-UG-02081-1.0
Camera Module with
Himax HM01B0 Sensor Holes for Microphone
Audio Input LEDs
Figure 3.3. Himax HM01B0 Adapter Board –Front View
Dual I2S Microphones
Figure 3.4. Himax HM01B0 Adapter Board –Back View

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0 7
4. iCE40 UltraPlus Pin Summary
The following is a reference to indicate the connection of the iCE40 UltraPlus FPGA I/O pins on each board.
Table 4.1. Upstream Connector Mapping
SG48
Function
Pin Type
Bank
Differential Pair
UPduino v2.0
Himax HM01B0
Adapter
1
VCCIO_2
VCCIO
2
–
–
–
2
IO B_6a
PIO
2
–
JP6-16
I2S data
3
IO B_9b
DPIO
2
COMP_of_IOB_8a
JP6-11
Molex1 –8: SDA
4
IO B_8a
DPIO
2
TRUE_of_IOB_9b
JP6-10
Molex1 –7: SCL
5
VCC
VCC
VCC
–
–
–
6
IO B_13b
DPIO
1
COMP_of_IOB_12a
JP6-8
Molex1 –5: FVLD
7
CDONE
CONFIG
1
–
LED –D2
–
8
creset_b
CONFIG
1
–
–
–
9
IO B_16a
PIO
1
–
JP6-7
Molex1 –4: TRIG
10
IO B_18a
PIO
1
–
TP3
–
11
IO B_20a
PIO
1
–
JP6-6
MCLK
12
IO B_22a
DPIO
1
TRUE_of_IOB_23b
JP6-1
Molex1 –18: D1
13
IO B_24a
DPIO
1
TRUE_of_IOB_25b
JP6-3
RESET_CAM (NC)
14
IO B_32a_SPI_SO
DPIO/CONFIG_SPI
1
–
SPI Flash –SDO
–
15
IO B_34a_SPI_SCK
DPIO/CONFIG_SPI
1
–
SPI Flash –SCK
–
16
IO B_35b_SPI_SS
DPIO/CONFIG_SPI
1
–
SPI Flash –CS
–
17
IO B_33b_SPI_SI
DPIO/CONFIG_SPI
1
–
SPI Flash –SDI
–
18
IO B_31b
PIO
1
–
JP6- 5
PWDN (NC)
19
IO B_29b
PIO
1
–
JP6- 4
Molex1 –16: PCLK
20
IO B_25b_G3
DPIO/GBIN
1
COMP_of_IOB_24a
TP4
–
21
IO B_23b
DPIO
1
COMP_of_IOB_22a
JP6- 2
Molex1 –17: D0
22
SPI_VCCIO1
VCCIO
1
–
–
–
23
IOT_37a
DPIO/I3C
0
TRUE_of_IOT_36b
JP5- 3
D9
24
VPP_2V5
VPP
VPP
–
–
–
25
IOT_36b
DPIO/I3C
0
COMP_of_IOT_37a
JP5- 4
D8
26
IOT_39a
DPIO
0
TRUE_of_IOT_38b
JP5- 5
Molex1 –24: D7
27
IOT_38b
DPIO
0
COMP_of_IOT_39a
JP5- 6
Molex1 –23: D6
28
IOT_41a
PIO
0
–
JP5- 16
LED5
29
VCCPLL
VCCPLL
–
–
–
30
VCC
VCC
VCC
–
–
–
31
IOT_42b
DPIO
0
COMP_of_IOT_43a
JP5- 9
Molex1 –20: D3
32
IOT_43a
DPIO
0
TRUE_of_IOT_42b
JP5- 7
Molex1 –22: D5
33
VCCIO_0
VCCIO
0
–
–
–
34
IOT_44b
DPIO
0
COMP_of_IOT_45a
JP5- 11
LEDO
35
IOT_46b_G0
DPIO/GBIN
0
–
JP5- 8
Mole x1 –21: D4
36
IOT_48b
DPIO
0
COMP_of_IOT_49a
JP5- 13
LED2
37
IOT_45a_G1
DPIO/GBIN
0
TRUE_of_IOT_44b
JP5- 10
Molex1 –19: D2
38
IOT_50b
DPIO
0
COMP_of_IOT_51a
JP5- 15
LED4
39
RGB0
LED
0
–
RGB LED –Red
–
40
RGB1
LED
0
–
RGB LED –Green
–
41
RGB2
LED
0
–
RGB LED –Blue
–
42
IOT_51a
DPIO
0
TRUE_of_IOT_50b
JP5- 14
LED3
43
IOT_49a
DPIO
0
TRUE_of_IOT_48b
JP5- 12
LED1

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
8 FPGA-UG-02081-1.0
SG48
Function
Pin Type
Bank
Differential Pair
UPduino v2.0
Himax HM01B0
Adapter
44
IO B_3b_G6
DPIO/GBIN
2
COMP_of_IOB_2a
JP6- 9
Molex1 –6: LVLD
45
IO B_5b
DPIO
2
COMP_of_IOB_4a
JP6- 13
U2 –2: STBY
46
IO B_0a
PIO
2
–
JP6- 15
I25 Clk
47
IO B_2a
DPIO
2
TRUE_of_IOB_3b
JP6- 14
I25 WS
48
IO B_4a
DPIO
2
TRUE_of_IOB_5b
JP6- 12
–
Paddle
GND
GND
GND
–
–
Molex1 –9: INT

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0 9
5. Software Requirements
Install the following software before you begin developing designs for the board:
Lattice Radiant 1.0 (or higher)
Used for developing your own custom designs for the iCE40 UltraPlus FPGA
Download at: www.latticesemi.com/radiant
Radiant Programmer 1.0 (or higher)
Used to program the iCE40 UltraPlus FPGA
This is included with Radiant software installation, or as a stand-alone tool.
Download at: www.latticesemi.com/radiant
6. Board Configuration and Programming
6.1. Board Configuration
The iCE40 UltraPlus on Himax HM01B0 UPduino Shield can be programmed via the included micro-USB cable using a PC
running Lattice Radiant Programmer software. After the software is installed and launched, and the USB cable is
connected to the board, see below for programming procedures.
There are two modes to program the iCE40 UltraPlus FPGA on the UPduino v2.0 board.
SPI Flash Programming (default): In this mode, the on-board SPI Flash is programmed, which in-turn programs the
iCE40 UltraPlus FPGA at power-up or reset. This allows the user program to be stored in non-volatile memory
when the board is powered-off or reset. This is the default programming mode.
Direct CRAM Programming: In this mode, the iCE40 UltraPlus FPGA CRAM memory is programmed directly. This
may allow for more rapid reconfiguration (if you need to regularly re-program the iCE40 UltraPlus while
debugging), but the program is not be retained when the board is powered-off. To use this mode, a modification to
the board is required.
The default programming mode is SPI Flash programming. To change the programming mode, resistor R4 and R3 must
be removed and replaced in the orientation shown in Figure 6.1.
Figure 6.1. Programming Settings

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User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
10 FPGA-UG-02081-1.0
6.2. Programming the SPI Flash
To program the SPI Flash:
1. Set board resistors to horizontal for SPI Flash programming.
Note: This is the default mode.
2. Connect the Himax HM01B0 UPduino Shield via USB cable to PC with Radiant Programmer installed.
3. Start Radiant Programmer.
4. Set Device Family to iCE40 UltraPlus and Device to iCE40UP5K as shown in Figure 6.2.
Figure 6.2. Device Family and Device Setting
5. Click the iCE40 UltraPlus row, and select Edit > Device Properties.
6. In the Device Properties dialog box, apply the settings below that are common to the three files to program (see
Figure 6.3).
a. Under Device Operation, select the options below:
Target Memory —External SPI Flash Memory (SPI FLASH)
Port Interface —SPI
Access Mode—Direct Programming
Operation —Erase, Program, Verify
b. Under Programming Options, select the option below:
Programming File —<Select desired file to program>
c. Under SPI Flash Options, select the options below:
Family —SPI Serial Flash
Vendor —Winbond
Device —W25P32
Package —16-pin SOIC

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0 11
Figure 6.3. Onboard SPI Flash Device Properties Settings
7. Click OK to close the Device Properties window.
8. Click the Program button in Radiant Programmer to program the Onboard SPI Flash.
6.3. Programming the CRAM Directly
To program the CRAM directly:
1. Set board resistors to vertical for CRAM Programming.
2. Connect the Himax HM01B0 UPduino Shield via USB cable to PC with Radiant Programmer installed.
3. Start Radiant Programmer.
4. Set Device Family to iCE40 UltraPlus and Device to iCE40UP5K as shown in Figure 6.4.
5. Click the iCE40 UltraPlus row, and select Edit > Device Properties.

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
12 FPGA-UG-02081-1.0
Figure 6.4. Device Family and Device Settings
6. In the Device Properties dialog box, apply the as shown in Figure 6.5.
Target Memory —Compressed Random Access Memory (CRAM)
Port Interface —Slave SPI
Access Mode —Direct Programming
Operation —Fast Configuration
7. Click OK to close the Device Properties window.
8. Click the Program button in Radiant Programmer to begin programming.
Figure 6.5. Device Properties for iCE40 Device Configuration Memory

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User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0 13
7. Storage and Handling
Static electricity can shorten the life span of electronic components. Observe these tips to prevent damage that can
occur from electrostatic discharge:
Use antistatic precautions such as operating on an antistatic mat and wearing an antistatic wristband.
Store the development board in the provided packaging.
Touch a metal USB housing to equalize voltage potential between you and the board.
8. Ordering Information
Table 8.1. Reference Part Number
Description
Ordering Part Number
China RoHS Environment-Friendly Use Period (EFUP)
Himax HM01B0 UPduino Shield
HM01B0-UPD-EVN

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
14 FPGA-UG-02081-1.0
References
For more information, refer to
iCE40 Ultra Plus Family Data Sheet (FPGA-DS-02008)
www.latticesemi.com/iCE40UltraPlus
Technical Support Assistance
Submit a technical support case through www.latticesemi.com/techsupport.

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0 15
Appendix A. Himax HM01B0 UPduino Shield Board Schematics
Figure A.1. UPduino 2.0 FPGA Schematic
DUT CONNECTION
PART NO= 77311-801-02LF
VCC
VCC
VCCPLL
VPP_2V5
VCCIO_0
IOT_37A
IOT_36B
IOT_39A
IOT_38B
IOT_43A
IOT_42B
IOT_45A_G1
IOT_44B
IOT_49A
IOT_48B
IOT_51A
IOT_50B
IOT_41A
IOT_46B_G0
RGB2
RGB1
RGB0
GND
IOB_6A
IOB_0A
IOB_3B_G6
IOB_2A
IOB_5B
IOB_4A
IOB_9B
IOB_8A
VCCIO_2
IOB_13B
IOB_16A
IOB_18A
IOB_20A
IOB_31B
IOB_29B
IOB_25B_G3
IOB_24A
IOB_23B
IOB_22A
CDONE
CRESET_B
IOB_32A_SPI_SO
IOB_33B_SPI_SI
IOB_34A_SPI_SCK
IOB_35B_SPI_SS
SPI_VCCIO1
ICE40UP5K/3K-SG48
1
100
CDBU0130R
0.1uF
GND
0.1uF
GND
GND
10k
00
00
TP
TP
2.2k
GND
GND
GND
0.1uF
0.1uF
5
30
29
24
33
23
25
26
27
32
31
37
34
43
36
42
38
28
35
39
40
41
49
2
46
44
47
45
48
3
4
1
6
9
10
11
18
19
20
13
21
12
7
8
14
17
15
16
22
U4
R1
R2
D1
C6
C8
R7
J3
ABLU
GRN
RED
LED
LED-TRICOLOR
J2
J4J5
TP4
TP3
R17
C4
C9
VCC+1.2V
+1.2V
+1.2V
+1.2V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
IOT_37A
IOT_36B
IOT_39A
IOT_38B
IOT_43A
IOT_42B
IOT_45A_G1
IOT_44B
IOT_49A
IOT_48B
IOT_51A
IOT_50B
IOT_41A
IOT_46B_G0
LED_BLUE
LED_GREEN
LED_RED
IOB_0A
IOB_3B_G6
IOB_2A
IOB_5B
IOB_4A
IOB_9B
IOB_8A
IOB_13B
IOB_16A
IOB_18A
IOB_20A
IOB_31B
IOB_29B
IOB_25B_G3
IOB_24A
IOB_23B
IOB_22A
CRESET_B
CRESET_B
ICE_MISO
ICE_MOSI
ICE_SCK
ICE_SS
IOB_6AVCCIO2
VCCIO2
VCCIO3
VCCIO3

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© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
16 FPGA-UG-02081-1.0
Figure A.2. UPduino 2.0 SPI Flash/I/O Pins/Regulator Connections
For programming Flash - Shunt 1,3 and 2,4 (default)
For programming iCE - Shunt 3,4 and 1,2
Remove shunt only for Programming iCE.
Replace shunt for programming Flash and for normal operation.
SPI
REGULATOR CONNECTION
PMOD AND I/O PINS
VCC
SDI
SCK
WP
CS
GND
HOLD
SDO
10K 10K 10K
10K
GND
GND
0.1uF
GND
M161X16_NO_SILK
M161X16_NO_SILK
GND
0.1uF
GND
GND
0
1p-2.54
1p-2.54
5
6
3
1 7
2
84
R13 R14 R15
R16
C20
JP5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
JP6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R3
R4
C1
J6
1
2
R5
J8
1
J9
1
GND
GND
ICE_SS
ICE_MOSI
ICE_SCK
+3.3V
+3.3V
+3.3V
+3.3V
IOT_38B
IOT_39A
IOT_43A
IOT_42B
IOT_37A
IOT_36B
IOT_44B
IOT_49A
IOB_8A
IOB_9B
IOB_4A
IOB_5B
IOB_2A
IOB_0A
IOB_6A
FLASH_MISO
FLASH_MISO
FLASH_MOSI
FLASH_MOSI
+1.2V
IOB_22A
IOB_23B
IOB_24A
IOB_29B
IOB_31B
IOB_20A
IOB_16A
IOB_13B
IOT_45A_G1
IOT_48B
IOT_51A
IOT_50B
IOT_41A
IOT_46B_G0
ICE_MISO IOB_3B_G6
+5V
OSC_OUT

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User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0 17
Figure A.3. UPduino 2.0 FTDI Chip Connection
FT232HQ
+5V
GND
GND
CSTCR 12MHz
GND
1.8V
+3V3
GND
+3V3 +3V3
GND
+3V3
GND
GND
93LC56B
green
red
+3V3 +3V3
+3V3
GND
+5V
GND
+5V
GND
GND
IC2
ADBUS0/TXD 13
ADBUS1/RXD 14
ADBUS2/RTS# 15
ADBUS3/CTS# 16
ADBUS4/DTR# 17
ADBUS5/DSR# 18
ADBUS6/DCD# 19
ADBUS7/RI# 20
ACBUS0/TXDEN 21
ACBUS1 25
ACBUS2 26
ACBUS3/RXLED# 27
ACBUS4/TXLED# 28
ACBUS5 29
ACBUS6 30
ACBUS7 31
VREGIN
40
VCCCORE
38
USBD-
6
USBD+
7
REF
5
RESET
34
GND
48 GND 47 GND 36 GND 35 GND 23 GND 22 GND 11 GND 10
AGND
4
EECS
45
EECLK
44
EEDATA
43
OSCIN
1
OSCOUT
2
TEST
42
VCCD
39
VCCIO 46 VCCIO 24 VCCIO 12
VPLL 8
VPHY 3
VCCA
37
AGND
9
AGND
41
ACBUS8 32
ACBUS9 33
PAD THERMAL
Q1
VCC
GND
IC1
62
CLK 4
DO
1
DI 3
CS 5
LED1 LED2
D+
D-
VBUS
GND
ID
MT1*4
+5V
D+
D+
D-
D-
GND
OSC_OUT
C8
C9
C7
ICE_SCK
D3
ICE_SS
D5
D6
CRESET_B
C0
C1
C2
C3
C4
C5
C6
FLASH_MOSI
FLASH_MISO
Array EEPROM
A
B
C
D
1 2 3 4 5 6
A
B
C
D
1 2 3 4 5 6
o
gtjennings_pcb_121217_1200_release
12/12/2017 8:04 AM
2014
C
ISSUE
DRAWN
CHECKED
DATE
>COMPANY
>DRAWN
>CHECKED
>DATE
>DRGNO
>REV
USB

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
18 FPGA-UG-02081-1.0
Figure A.4. Himax HM01B0 Adapter Board Schematic
AGND
0
AGND GND
1k
GREEN
GND
1k
GREEN
GND
1k
GREEN
GND
1k
GREEN
GND
1k
GREEN
GND
1k
GREEN
GND
GNDGND
AGND
10k 10k
AGND
GND
GND GND
BU6651NUX_BU6651NUX-TR
10k
GND
22
GND
GND
DNI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R1
R2
D1
R3
D2
R4
D3
R5
D4
R6
D5
R7
D6
WS
1
SELECT
2
BCLK
4
VDD 5
GND
3
DATA 6
IC1
WS
1
SELECT
2
BCLK
4
VDD 5
GND
3
DATA 6
IC2
R8 R9
8
7
6
54
3
2
1
P$9
U$2
R10
R11
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
GND1 GND2
GND3 GND4
MOLEX1
R12
D7
D7
D6
D6
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0
D0
PCLK
PCLK
MCLK
MCLK
TRIG
TRIG
FVLD
FVLD
LVLD
LVLD
SCL
SCL
SCL
SDA
SDASDA
INT
INT
GND
GND
GND
LED5
LED5
LED0
LED0
LED1
LED1
LED2
LED2
LED3
LED3
LED4
LED4
PWDN
D8
RESET_CAMD9
AVDD
AVDD
AVDD
IOVDD
IOVDD
IOVDD
DVDD
DVDD
DVDD
3_3V 3_3V 3_3V 3_3V 3_3V 3_3V
3_3V 3_3V
3_3V
3_3V
3_3V 3_3V
3_3V
STBY
STBY
I2S_CLK I2S_CLK
I2S_CLK
I2S_DATA I2S_DATA
I2S_DATA
I2S_WSI2S_WS
I2S_WS
BU6651NUX-TR
503772-2410, Molex
1.8V
1.5V
2.8V

Himax HM01B0 UPduino Shield
User Guide
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0 19
Revision History
Revision 1.0, November 2018
Section
Change Summary
All
Initial release.

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