Motorola DSP56F801 Instructions for use

© Motorola, Inc., 2001. All rights reserved.
Semiconductor Products Sector
DSP56F801 Evaluation Module
Hardware User’s Manual
Order this document by
DSP56F801EVMUM/D
Rev. 0, 05/17/2001

Table of Contents i
Preface
Audience . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .vii
Organization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
Suggested Reading. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
Notation Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii
Definitions, Acronyms, and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
Chapter 1
Introduction
1.1 DSP56F801EVM Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2 DSP56F801EVM Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1.3 DSP56F801EVM Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Chapter 2
Technical Summary
2.1 DSP56F801 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.2 RS-232 Serial Communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.3 Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.4 Debug LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.5 Debug Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2.5.1 JTAG Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2.5.2 Parallel JTAG Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.6 External Interrupt. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.7 Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.8 Power Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.9 UNI-3 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2.10 Speed Up/Down Switches and Run/Stop Switch. . . . . . . . . . . . . . . . . . . . . . . . 2-13
2.11 Motor Control PWM Signals and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2.12 Motor Protection Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2.12.1 UNI-3 Motor Protection Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
2.13 Back-EMF and Motor Phase Current Sensing. . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
2.14 Quadrature Encoder/Hall-Effect Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
2.15 Zero-Crossing Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
Table of Contents

ii DSP56F801EVM Hardware User’s Manual 
2.16 Peripheral Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
2.16.1 External Control Signal Expansion Connector . . . . . . . . . . . . . . . . . . . . . . 2-19
2.16.2 Timer Channel D Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
2.16.3 A/D Port Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
2.16.4 Serial Communications Port Expansion Connector. . . . . . . . . . . . . . . . . . . 2-20
Appendix A
DSP56F801EVM Schematics
Appendix B
DSP56F801EVM Bill of Material

List of Figures iii
1-1 Block Diagram of the DSP56F801EVM . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1-2 DSP56F801EVM Jumper Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1-3 Connecting the DSP56F801EVM Cables. . . . . . . . . . . . . . . . . . . . . . . . . 1-4
2-1 Block Diagram of the RS-232 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2-2 Block Diagram of the Clock Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2-3 Block Diagram of the Debug LED Interface . . . . . . . . . . . . . . . . . . . . . . 2-5
2-4 Block Diagram of the Parallel JTAG Interface. . . . . . . . . . . . . . . . . . . . . 2-7
2-5 Block Diagram of the User Interrupt Interface. . . . . . . . . . . . . . . . . . . . . 2-8
2-6 Block Diagram of the RESET Interface . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2-7 Block Diagram of the Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2-8 RUN/STOP and General Purpose Switches . . . . . . . . . . . . . . . . . . . . . . 2-13
2-9 PWM Interface and LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2-10 FAULT0 Selection Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
2-11 Back-EMF or Motor Phase Current Sense Signals. . . . . . . . . . . . . . . . . 2-17
2-12 Zero-Crossing Encoder Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
A-1 DSP56F801 Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-2
A-2 RESET, MODE, CLOCK, IRQ AND RUN/STOP SWITCH . . . . . . . . .A-3
A-3 DSP56F801 PWM LEDS AND USER LED . . . . . . . . . . . . . . . . . . . . . . A-4
A-4 RS-232 AND SCI CONNECTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
A-5 PARALLEL JTAG HOST TARGET INTERFACE AND JTAG
CONNECTOR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6
A-6 OVER VOLTAGE/CURRENT DETECTORS &
BACK-EMF/PHASE-CURRENT INPUT SELECTORS . . . . . . . . . A-7
A-7 HALL-EFFECT/ZERO-CROSSING AND PFC SELECTION. . . . . . . .A-8
A-8 UNI-3 INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-9
A-9 PORT TIMER D, A/D, SPI, SCI, PWM AND CONTROL LINE
CONNECTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10
A-10 POWER SUPPLIES +3.3V AND +5.0V . . . . . . . . . . . . . . . . . . . . . . . .A-11
A-11 BYPASS CAPACITORS AND SPARE GATES. . . . . . . . . . . . . . . . . .A-12
List of Figures

iv DSP56F801EVM Hardware User’s Manual 

List of Tables v
1-1 DSP56F801EVM Default Jumper Options. . . . . . . . . . . . . . . . . . . . . . . . 1-3
2-1 RS-232 Serial Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2-2 JTAG Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2-3 Parallel JTAG Interface Disable Jumper Selection. . . . . . . . . . . . . . . . . . 2-6
2-4 Parallel JTAG Interface Connector Description. . . . . . . . . . . . . . . . . . . . 2-7
2-5 UNI-3 Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2-6 FAULT0 Source Selection Jumper. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
2-7 External Control Signal Connector Description . . . . . . . . . . . . . . . . . . . 2-19
2-8 Timer D Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
2-9 A/D Port Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
2-10 SCI0 Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
List of Tables

vi DSP56F801EVM Hardware User’s Manual 

Preface vii
Preface
This reference manual describes in detail the hardware on the DSP56F801 Evaluation
Module.
Audience
This document is intended for application developers who are creating software for
devices using the Motorola DSP56F801 part.
Organization
This manual is organized into two chapters and two appendixes.
•Chapter 1, Introduction - provides an overview of the EVM and its features.
•Chapter 2, Technical Summary - describes in detail the DSP56F801 hardware.
•Appendix A, DSP56F801EVM Schematics - contains the schematics of the
DSP56F801EVM.
•Appendix B, DSP56F801EVM Bill of Material - provides a list of the materials used on
the DSP56F801EVM board.
Suggested Reading
More documentation on the DSP56F801 and the DSP56F801EVM kit may be found at
URL:
http://www.mot.com/SPS/DSP/documentation/index.html

viii DSP56F801EVM Hardware User’s Manual 
Notation Conventions
This manual uses the following notational conventions:
Definitions, Acronyms, and Abbreviations
Definitions, acronyms and abbreviations for terms used in this document are defined
below for reference.References
Term or Value Symbol Examples Exceptions
Active High Signals
(Logic One) No special symbol attached to the signal
name
A0
CLKO
Active Low Signals
(Logic Zero) Noted with an overbar in text and in
most figures
WE
OE In schematic drawings,
Active Low Signals may
be noted by a back-
slash: /WE
Hexadecimal Values Begin with a “$” sym-
bol $0FF0 $80
Decimal Values No special symbol
attached to the
number
10
34
Binary Values Begin with the letter
“b” attached to the
number
b1010
b0011
Blue Text Linkable on-line ...refer to Chapter 7,
License
Bold Reference sources,
paths, emphasis ...see:
http://www.mot.com/SP
S/DSP...
A/D Analog to Digital
D/A Digital to Analog
DSP Digital Signal Processor or Digital Signal Processing
EVM Evaluation Module
GPIO General Purpose Input and Output Port on Motorola’s Family of DSPs
IC Integrated Circuit
JTAG Joint Test Action Group. A bus protocol/interface used for test and
debug.
LQFP Low profile Quad Flat Pack

Preface ix
References
The following sources were referenced to produce this manual:
[1] DSP56800 Family Manual, Motorola
[2] DSP56F801 Digital Signal Processor User’s Manual, Motorola
[3] DSP56F801 Digital Signal Processor Technical Data, Motorola
MPIO Multi Purpose Input and Output Port on Motorola’s Family of DSPs.
Shares package pins with other peripherals on the chip and can function
as a GPIO.
OnCETM On-Chip Emulation, a debug bus and port created by Motorola to enable
designers to create a low-cost hardware interface for a professional
quality debug environment.
PCB Printed Circuit Board
PLL Phase Locked Loop
PWM Pulse Width Modulation
RAM Random Access Memory
ROM Read Only Memory
SCI Serial Communications Interface
SPI Serial Peripheral Interface Port on Motorola’s Family of DSPs
SRAM Static Random Access Memory

xDSP56F801EVM Hardware User’s Manual 

Introduction 1-1
Chapter 1
Introduction
The DSP56F801EVM is used to demonstrate the abilities of the DSP56F801 and to
provide a hardware tool allowing the development of applications that use the
DSP56F801.
The DSP56F801EVM is an evaluation module board that includes a DSP56F801 part,
peripheral expansion connectors, external memory and a JTAG interface. The expansion
connectors are for signal monitoring and user feature expandability.
The DSP56F801EVM is designed for the following purposes:
• Allowing new users to become familiar with the features of the 56800 architecture.
The tools and examples provided with the DSP56F801EVM facilitate evaluation of
the feature set and the benefits of the family.
• Serving as a platform for real-time software development. The tool suite enables
the user to develop and simulate routines, download the software to on-chip or
on-board RAM, run it, and debug it using a debugger via the JTAG/OnCETM port.
The breakpoint features of the OnCE port enable the user to easily specify complex
break conditions and to execute user-developed software at full-speed, until the
break conditions are satisfied. The ability to examine and modify all user
accessible registers, memory and peripherals through the OnCE port greatly
facilitates the task of the developer.
• Serving as a platform for hardware development. The hardware platform enables
the user to connect external hardware peripherals. The on-board peripherals can be
disabled, providing the user with the ability to reassign any and all of the DSP's
peripherals. The OnCE port's unobtrusive design means that all of the memory on
the board and on the DSP chip are available to the user.

1-2 DSP56F801EVM Hardware User’s Manual 
1.1 DSP56F801EVM Architecture
The DSP56F801EVM facilitates the evaluation of various features present in the
DSP56F801 part. The DSP56F801EVM can be used to develop real-time software and
hardware products based on the DSP56F801. The DSP56F801EVM provides the features
necessary for a user to write and debug software, demonstrate the functionality of that
software and interface with the customer’s application-specific device(s). The
DSP56F801EVM is flexible enough to allow a user to fully exploit the DSP56F801’s
features to optimize the performance of their product, as shown in Figure 1-1.
Figure 1-1. Block Diagram of the DSP56F801EVM
DSP56F801
RESET
MODE/IRQ
JTAG/OnCE
XTAL/EXTAL
SCI
SPI
TIMER
PWM
A/D
+3.3V & GND
Peripheral
Expansion
Connector(s)
RESET
LOGIC
MODE/IRQ
LOGIC
JTAG
Connector
Parallel
JTAG
Interface
Low Freq
Crystal
DSub
25-Pin
DSub
9-Pin
Debug LEDs
PWM LEDs
Over V Sense
Over I Sense
Zero Crossing
Detect
UNI-3
RS-232
Interface
Power Supply
+3.3V, +5.0V & +3.3VA

DSP56F801EVM Configuration Jumpers
Introduction 1-3
1.2 DSP56F801EVM Configuration Jumpers
Nine jumper groups, (JG1-JG9), shown in Figure 1-2, are used to configure various
features on the DSP56F801EVM board. Table 1-1 describes the default jumper group
settings.
Figure 1-2. DSP56F801EVM Jumper Reference
Table 1-1. DSP56F801EVM Default Jumper Options
Jumper
Group Comment Jumpers Connections
JG1 UNI-3 serial selected 1–2, 3–4
JG2 Encoder Input Selected 2–3, 5–6 & 8–9
JG3 UNI-3 Over-Voltage Selected for FAULT0 1–2
JG4 UNI-3 3-Phase Current Sense Selected as inputs to A/D 2–3, 5–6 & 8–9
JG5 Enable on-board Parallel JTAG Host/Target Interface NC
JG6 Enable RS-232 output NC
JG7 Use on-board EXTAL crystal input for DSP oscillator 1-2
JG8 Use on-board XTAL crystal input for DSP oscillator 1–2
JG9 Encoder Input Selected to TD1 and TD2 2–3, 5–6
DSP56F801EVM
J3
J8
JTAG
P3
Y1
U1
S1
S5
S2
P1
JG2
1
3
2
J7 JG3
JG7
U5
RESET
DOWN
IRQA
3
1
2
JG2
JG5
JG8
JG4
1
3
2JG6
JG8
P4
3
1
2
JG4
1
JG3
3
J6
JG5
JG1
JG9
J5
S4
UP
S3
RUN/STOP
P2
J2
J4
J1
U2 JG6
12
34
JG1
1
JG7
3
3
1
2
JG9

1-4 DSP56F801EVM Hardware User’s Manual 
1.3 DSP56F801EVM Connections
An interconnection diagram is shown in Figure 1-3 for connecting the PC and the external
+12V DC power supply to the DSP56F801EVM board.
Perform the following steps to connect the DSP56F801EVM cables:
1. Connect the parallel extension cable to the Parallel port of the host computer.
2. Connect the other end of the parallel extension cable to P2, shown in Figure 1-3,
on the DSP56F801EVM board. This provides the connection which allows the host
computer to control the board.
3. Make sure that the external +12V DC, 4.0A power supply is not plugged into a
120V AC power source.
4. Connect the 2.1mm output power plug from the external power supply into P1,
shown in Figure 1-3, on the DSP56F801EVM board.
5. Apply power to the external power supply. The green Power-On LED, LED8, will
illuminate when power is correctly applied.
Figure 1-3. Connecting the DSP56F801EVM Cables
PC-compatible
Cable
Computer
Parallel Extension
DSP56F801EVM
External
+12V
Power
P2
P1
Connect cable
to Parallel/Printer port
with 2.1mm,
receptacle
connector

Technical Summary 2-1
Chapter 2
Technical Summary
The DSP56F801EVM is designed as a versatile Digital Signal Processor, (DSP),
development card for developing real-time software and hardware products to support a
new generation of applications in digital and wireless messaging, servo and motor control,
digital answering machines, feature phones, modems, and digital cameras. The power of
the 16-bit DSP56F801 DSP, combined with the Hall-Effect/Quadrature Encoder interface,
motor zero crossing logic, motor bus over-current logic, motor bus over-voltage logic and
parallel JTAG interface, makes the DSP56F801EVM ideal for developing and
implementing many motor controlling algorithms, as well as for learning the architecture
and instruction set of the DSP56F801 processor.
The main features of the DSP56F801EVM, with board and schematic reference
designators include:
• DSP56F801 16-bit +3.3V Digital Signal Processor operating at 80MHz [U1]
• 8.00MHz crystal oscillator for DSP frequency generation [Y1]
• Optional external oscillator frequency input connector [JG7 and JG8]
• Joint Test Action Group (JTAG) port interface connector for an external debug
Host Target Interface [J8]
• On-board Parallel JTAG Host Target Interface, with a connector for a PC printer
port cable [P2]
• RS-232 interface for easy connection to a host processor [U2 and P4]
• Connector to allow the user to connect their own SCI / MPIO compatible peripheral
[J6]
• Connector to allow the user to connect their own SPI / MPIO compatible peripheral
[J3]
• Connector to allow the user to connect their own PWM or MPIO compatible
peripheral [J1]
• Connector to allow the user to connect their own Timer D/ MPIO compatible
peripheral [J5]

2-2 DSP56F801EVM Hardware User’s Manual 
• Connector to allow the user to attach their own A/D port compatible peripheral [J4]
• On-board power regulation from an external 12V DC-supplied power input [P1]
• Light Emitting Diode (LED) power indicator [LED8]
• One on-board real-time user debugging LED [LED7]
• Six on-board PWM monitoring LEDs [LED1-6]
• UNI-3 Motor interface [P3]
— Encoder/Hall-Effect interface and selector [JG2 & JG9]
— Over-Voltage sensing [U6]
— Over-Current sensing [U6]
— Back-EMF sensing and selector [JG4]
— Zero Crossing detection and selector [JG2 & JG9]
— Pulse Width Modulation
• Manual RESET push button [S2]
• Manual interrupt push button for IRQA [S1]
• General purpose push-button on AN6 for Speed UP [S4]
• General purpose push button on AN6 for Speed DOWN [S5]
• General purpose toggle switch for RUN/STOP control(AN7) [S3]
2.1 DSP56F801
The DSP56F801EVM uses a Motorola DSP56F801FV80 part, designated as U1 on the
board and in the schematics. This part will operate at a maximum speed of 80MHz. A full
description of the DSP56F801, including functionality and user information, is provided
in these documents:
•DSP56F801 Technical Data,(DSP56F801/D):Provides features list and
specifications including signal descriptions, DC power requirements, AC timing
requirements and available packaging.
•DSP56F801 User’s Manual,(DSP56F801UM/AD): Provides an overview
description of the DSP and detailed information about the on-chip components
including the memory and I/O maps, peripheral functionality, and control/status
register descriptions for each subsystem.
• DSP56F80x Family Manual,(DSP56F80xFM/AD): Provides a detailed description
of the core processor, including internal status and control registers and a detailed
description of the family instruction set.

DSP56F801
Technical Summary 2-3
Refer to these documents for detailed information about chip functionality and operation.
They can be found on this URL:
http://www.mot.com/SPS/DSP/documentation/index.html

2-4 DSP56F801EVM Hardware User’s Manual 
2.2 RS-232 Serial Communications
The DSP56F801EVM provides an RS-232 interface by the use of an RS-232 level
converter, (Maxim MAX3245EEAI, designated as U2). Refer to the RS-232 schematic
diagram in Figure 2-1. The RS-232 level converter transitions the SCI UART’s +3.3V
signal levels to RS-232 compatible signal levels and connects to the host’s serial port via
connector P4. Flow control is not provided, but could be implemented using uncommitted
GPIO signals. The pinout of connector P4 is listed in Table 2-1. The RS-232 level
converter/transceiver can be disabled by placing a jumper at JG6.
Figure 2-1. Block Diagram of the RS-232 Interface
.Table 2-1. RS-232 Serial Connector Description
P4
Pin # Signal Pin # Signal
1 Jumper to 6 & 4 6 Jumper to 1 & 4
2 TXD 7 Jumper to 8
3 RXD 8 Jumper to 7
4 Jumper to 1 & 6 9 N/C
5GND
DSP56F801 RS-232
Level Converter
Interface
TXDO
RXDO R1in
T1out
T1in
R1out
FORCEOFF
JG6
1
2
6
3
2
7
8
4
5
x
1
9
+3.3V
Jumper Removed:
Enable RS-232
Jumper Pin 1-2:
Disable RS-232