Motorola MC68824 User manual

Introduction
II
Tables
II
Commands
II
Buffer Structures
II
Signals
II
Bus Operation
II
TBC Interfaces
II
Electrical Specifications
II
Ordering Information and Mechanical Data II
IEEE 802.4 Operation II
Frame Formats and Addressing II
Bridging II
Performance ..

This document contains information on a new product. Specifications and information
herein are subjecttochange withoutnotice. Motorola reserves the rightto make changes
to any products herein to improve functioning or design. Although the information
in
this document has been carefully reviewed and is believed to be reliable, Motorola does
not assume any liability arising out of the application or
use of any product or circuit
described herein; neither does it convey any license under its patent right northe rights
of others.
Motorola, Inc. general policy does not recommend the use of its components in life support applications
wherein a failure or malfunction of the component may directly threaten life or injury. Per Motorola Terms
and Conditions
of Sale, the user of Motorola components in life support applications assumes all risk of
such use and indemnifies Motorola against all damages.
©MOTOROLA INC., 1987

Paragraph
Number
1.1
1.2
1.2.1
1.2.2
1.3
1.3.1
1.3.2
1.4
1.5
1.6
1.7
1.8
1.8.1
1.8.2
1.8.3
2.1
2.1.1
2.1.2
2.1.3
2.1.4
2.1.5
2.1.6
2.1.7
2.1.8
2.1.9
2.1.10
2.1.11
2.1.12
2.1.13
2.1.14
2.1.15
2.1.16
2.1.17
2.1.18
2.1.19
2.1.20
TABLE OF CONTENTS
Page
Title Number
Section 1
Introduction
Features....................................... .................................. .......... ..... 1-1
Logical Area Network Standards ........ ........................ ............ ............ 1-2
150/051 Reference Model............................................................ 1-2
IEEE Local Area Network Standards.............................................. 1-3
IEEE 802.4 Token Bus Local Area Networks.......... ................................ 1-3
Token Bus Operation............. ............................... ...... ........... ..... 1-3
Options Within IEEE 802.4...... ........ ................ .................... .... ..... 1-4
TBC Environment. .......... ............ ........ ............ ........................ .... ..... 1-4
Physical Layer Interface.................................................................... 1-5
Microprocessor System Bus Interface. ........ .................... ............ ......... 1-5
Shared Memory.............................................................................. 1-6
Overview of TBC Functional Operation ................................................ 1-6
Command Structure Overview .... ................................................. 1-6
Frame Reception Overview.......................................................... 1-6
Frame Transmission Overview.... ........................................ ......... 1-7
Section 2
Tables
TBC Private Area ............................................................................ 2-1
Next Station Address................................................................. 2-1
Previous Station Address............................................................ 2-3
Hi-Priority-Token-Hold Time....................................................... 2-3
Last Token-Rotation-Time ....................................... ................... 2-3
Token Rotation Time at Start of Access Classes............................... 2-4
Target Token Rotation Time for Access Classes............................... 2-4
Token Rotation Time at Start of Ring Maintenance........................... 2-4
Target Rotation Time for Ring Maintenance.................................... 2-4
Ring Maintenance Time Initial Value.............................................. 2-5
Source Routing -Source Segment/Bridge 10 (SID) .......................... 2-5
Source Routing -Target Segment/Bridge 10 (TID) ..... ...................... 2-5
Segment Number Mask for Source Routing.................................... 2-5
Max-Inter-Solicit-Count ........ ............................... ...... ...... .......... 2-5
RX Frame Status Error Mask.................................... .................... 2-6
TX Queue Access Class Status............................ .......................... 2-6
TX Queue Access Class Pointers................................................... 2-6
RX Queue Access Class Pointers................................................... 2-6
Free Frame Descriptor Pointer...................................................... 2-7
Free Buffer Descriptor Pointer ...................................................... 2-7
Group Address Mask............................................. ..................... 2-7
MC68824 USER'S MANUAL
MOTOROLA
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Paragraph
Number
2.1.21
2.1.22
2.1.23
2.1.24
2.1.25
2.1.26
2.1.27
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2.2.10
2.2.11
2.2.11.1
2.2.11.2
2.2.12
2.2.13
2.2.13.1
2.2.13.2
2.2.13.3
2.2.13.4
2.2.13.5
2.2.13.6
2.2.13.7
2.2.13.8
2.2.14
2.2.14.1
2.2.14.2
2.2.14.3
2.2.14.4
2.2.15
TABLE OF CONTENTS (Continued)
Page
Title Number
Individual Address Mask............................................................. 2-8
Non-RWR Maximum Retry Limit................................................... 2-8
RWR Maximum Retry Limit......................................................... 2-9
Slot Time................................................................................. 2-9
This Station Address.... ....... ........ ............ ......... ..... ...... ....... ........ 2-9
Manufacturer Product Revision and 802.4 Standard Revision Number.. 2-9
Transmitter Fault Count ............. ~................................................ 2-10
Initialization Table ....... ........... .... ................. .......... ..... ...... ............... 2-10
Private Area Function Code......................................................... 2-10
Private Area Pointer ............ ........ .... ................. ...................... .... 2-10
Parameters Initializing the Private Area ............ ...... ........................ 2-10
Initial Pad Timer Preset (PTP) .................. ...................... ...... ......... 2-13
Initial In-Ring Desired ..... ...... ...... ........... ........ ....... ...... ............... 2-13
Initial Address Length............ ...... ........... ......... ...... ...... ............... 2-13
Response Destination Address Pointer ............................ ............... 2-13
Response Pointer. ....... .... ................ ........... .......... ....... ..... ......... 2-13
Request with Response Pointer .............. ........ .................... .......... 2-14
Command Parameter Area .......................................................... 2-14
Interrupt Status Words ............................................................... 2-15
Interrupt Status Word 0........ ....... ................ ..... ...... ......... ...... 2-15
Interrupt Status Word 1 ....... :................................................. 2-17
Interrupt Masks......... ............................ .... ........ .... ............ ......... 2-19
Statistics ................................................................................. 2-19
Number of Tokens Passed ..................................................... 2-20
Number of Tokens Heard....................................................... 2-20
Number of Passes Through No Successor 8 .......... .................... 2-20
Number of Who Follows............................................... ......... 2-20
Number of Token Pass Failed................................................. 2-20
Number of Frames Too Long (>8K Bytes)................................. 2-20
Number of No FD/BD Errors................................................... 2-20
Number of Overruns............................................................. 2-21
Modem Error Counters............................................................... 2-21
Non-Silence........................................................................ 2-21
FCS Errors.......................................................................... 2-21
E-Bit Errors......................................................................... 2-21
Frame Fragments................................................................. 2-21
DMA Dump Area....................................................................... 2-21
Section 3
Commands
3.1 Registers...... ........................................... ............ ........... ..... ...... .... 3-2
3.1.1 TBC Register Map...................................................................... 3-3
3.1.2 Command Register (CR).............................................................. 3-3
3.1.3 Data Register (DR) ..................................................................... 3-3
3.1.4 Interrupt Vector Register (IV)............ ........ ............ ........................ 3-3
3.1.5 Semaphore Register.............. ..................................................... 3-4
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MC68824 USER'S MANUAL

TABLE OF CONTENTS (Continued)
Paragraph
Number Title Page
Number
3.2
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
3.3
3.3.1
3.3.2
3.3.3
3.3.4
3.4
3.4.1
3.4.2
3.4.3
3.5
3.5.1
3.5.2
3.5.3
3.5.3.1
3.5.3.2
3.5.3.3
3.5.3.4
3.5.3.5
3.5.3.6
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
3.6.6
3.7
3.7.1
3.7.2
3.8
3.8.1
3.8.1.1
3.8.1.2
3.8.2
3.9
Initialization................................................................................... 3-4
LOAD INITIALIZATION TABLE FUNCTION CODE Command ................ 3-5
INITIALIZE Command.............................................. ................... 3-5
OFFLINE Command.............................................. ..................... 3-5
IDLE Command......................................................................... 3-6
RESET Command.............................................. ........................ 3-6
Set Operation Mode........................................................................ 3-7
SET MODE 1 Command.............................................................. 3-7
SET MODE 2 Command.............................................................. 3-8
SET MODE 3 Command .............................................................. 3-10
SET/CLEAR IN-RING DESIRED Command... .................... ................ 3-11
TX Data Frames............................. ................ ................................. 3-23
STOP Command .................................................................... ... 3-12
RESTART Command .................................................................. 3-12
START Command........... ..... ........................................ .............. 3-12
Set/Read Value
............................................................................... 3-13
Command Parameter Area
.......................................................... 3-13
READ VALUE Command ............................................................. 3-16
SET VALUE Command .............. ................................................. 3-16
Buffer Descriptor Function
Code......................... ..................... 3-17
Frame Descriptor Function Code
............................................. 3-17
Data Buffers Function Code...
................................... .............. 3-17
Set Pad Timer Preset Register (PTP).......................... ............... 3-17
Set One Word ..................................................................... 3-18
Set Two Words................................................................... 3-18
Testing
.............................. ..................................... ...................... 3-18
SET INTERNAUEXTERNAL LOOPBACK MODE Command .................. 3-19
HOST INTERFACE TEST Command ............................................... 3-19
FULL-DUPLEX LOOPBACK TEST Command .................................... 3-20
TRANSMITTER TEST Command ......... ............... ........................... 3-22
RECEIVER TEST Command.......................................................... 3-23
Sequence for Running all the Tests ............................................... 3-24
Notify
TBC..................................................................................... 3-26
CLEAR INTERRUPT STATUS Command......................................... 3-26
RESPONSE READY Command......... ............................................. 3-27
Modem
Control.............................................................................. 3-27
PHYSICAL Command................................................................. 3-27
Immediate Commands...................... .................................... 3-28
Data Transfer
Commands...................................................... 3-29
END PHYSICAL Command.......................... ............ ..................... 3-30
Illegal
Commands.............................................. ............................. 3-30
Section 4
Buffer
Structures
4.1 Buffer Structures ... .......... .... ...... ...... ............................ ................... 4-2
4.1.1 Frame
Descriptors................ ...... .... ... ................. .... ....... ............ 4-2
4.1.1.1
FD Confirmation/Indication Word Format.................................. 4-3
MC68824 USER'S MANUAL
MOTOROLA
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Paragraph
Number
4.1.1.2
4.1.1.3
4.1.1.4
4.1.1.5
4.1.1.6
4.1.1.7
4.1.1.8
4.1.1.9
4.1.1.10
4.1.2
4.1.2.1
4.1.2.2
4.1.2.3
4.1.2.4
4.1.2.5
4.1.3
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.3
4.3.1
4.3.2
4.3.3
4.4
4.5
TABLE OF CONTENTS (Continued)
Page
Title Number
Receive Status Word ..... ................................. ...................... 4-5
Control for Next Frame Descriptor Pointer............. .................... 4-5
Next Frame Descriptor Pointer..... ............ ..... ........... ............... 4-6
First Buffer Descriptor Pointer.............. ........ ................. ....... ... 4-6
Frame Data Length............................................................... 4-6
Immediate Response Frame Descriptor Pointer.......................... 4-6
Frame Control..................................................................... 4-6
MAC Destination Address...................................................... 4-6
MAC Source Address............................................................ 4-6
Buffer Descriptors....... ..... .... ....................................... ............... 4-6
Data Buffer Pointer............................................................... 4-7
Buffer Descriptor Control and Offset ......................... ............... 4-7
Buffer Length...................................................................... 4-8
Receive Indication Word........................................................ 4-8
Next Buffer Descriptor Pointer....... ..... .... ........... ..................... 4-8
Data Buffers.. .......... ............. .................... ................................ 4-8
Transmission of a Frame.... ......... .... ................... .................... .......... 4-8
Initialization Performed by Host.................................................... 4-9
Management of Transmission Queues........................................... 4-9
Examples of TBC Transmission Queues......................................... 4-10
Adding a Frame to a Transmission Queue...................................... 4-11
TBC's Actions Upon Transmission ................................. ............... 4-11
Reception of Frames............................................. ..................... ...... 4-12
Initialization Performed by Host............................... .... ................. 4-12
Reception Queues and Free Pools ............................ ... ............ ...... 4-13
TBC's Action Upon Reception ...................................................... 4-14
Request with Response (RWR) Transmission ........................................ 4-15
Reception of RWR Frames and Transmission of Response ...... ............ ..... 4-16
Section 5
Signals
5.1 Address Bus (A1-A31) ...................................................................... 5-1
5.2 Data Bus (00-015)........................................................................... 5-1
5.3 Bus Control ................................................................................... 5-1
5.3.1 Function Codes (FCO-FC3) ........................................................... 5-1
5.3.2 Bus Exception Conditions (BECO-BEC2) ............................... ..... ...... 5-2
5.3.3 Data Transfer Acknowledge (DTACK) ............................................. 5-3
5.3.4 ReadIWrite (RIW)....................................................................... 5-3
5.3.5 Upper Data Strobe (UDS/AO), Lower Data Strobe (LOS/OS).... ....... ...... 5-3
5.3.6 Address Strobe (AS) .................................................................. 5-3
5.3.7 Chip Select (CS) ....... ........................... ................................ ...... 5-4
5.4 Bus Arbitration............................................................................... 5-4
5.4.1 Bus Request (BR) ...................................................................... 5-4
5.4.2 Bus Grant (BG) ... ..... ............. .......... ..... ............. ... ........... .......... 5-4
5.4.3 Bus Grant Acknowledge (BGACK) ................................................. 5-4
MOTOROLA
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MC68824 USER'S MANUAL

Paragraph
Number
5.5
5.5.1
5.5.2
5.6
5.6.1
5.6.1.1
5.6.1.2
5.6.1.3
5.6.1.4
5.6.2
5.6.2.1
5.6.2.2
5.6.2.3
5.6.2.4
5.7
TABLE OF CONTENTS (Continued)
Page
Title Number
Interrupt Control............................................................................. 5-4
Interrupt Request (lRO) ... ............................................................ 5-5
Interrupt Acknowledge (lACK) ...................................................... 5-5
Serial Interface............................................................................... 5-5
Physical Data Request Channel.................................. ................... 5-5
Station Management Request (SMREO).................................... 5-6
Transmit Clock (TXCLK)......................................................... 5-6
TXSYM2, TXSYM1, and TXSYMO in MAC Mode ......................... 5-6
TXSYM2, TXSYM1, and TXSYMO in Station Management Mode.... 5-6
Physical Data Indication Channel............................. ..................... 5-7
Station Management Indication (SMIND) ............. ........... .......... 5-7
Receive Clock (RXCLK) ........ ;................................................. 5-7
RXSYMO, RXSYM1, and RXSYM2 in MAC Mode......................... 5-7
RXSYM2, RXSYM1, and RXSYMO in Station Management Mode.... 5-8
Signal Summary............................................................................. 5-9
Section 6
Bus Operation
6.1 Host Processor Operation Mode......................................................... 6-1
6.1.1 Host Processor Read Cycles......................................................... 6-1
6.1.2 Host Processor Write Cycles........................................................ 6-1
6.1.3 Interrupt Acknowledge Cycles...................................................... 6-2
6.2 DMA Operation.............................................................................. 6-3
6.2.1 DMA Burst Control.................................................................... 6-3
6.2.2 TBC Read Cycles....................................................................... 6-4
6.2.3 TBC Write Cycles....................................................................... 6-4
6.3 Bus Exception Control Functions........................................................ 6-4
6.3.1 Normal Termination....................... ................. .... ........................ 6-6
6.3.2 Halt................ .... ............. ..... ................. ............. .......... .......... 6-6
6.3.3 Bus Error................................................................................. 6-6
6.3.4 Retry................................ .... ................. ............... .................. 6-6
6.3.5 Relinquish and Retry.................................................................. 6-8
6.3.6 Reset..................... ..................... ............................................ 6-8
6.3.7 Undefined BEC Codes ................................................................ 6-8
6.4 Bus Arbitration ............. ................ ........... ............ ........................... 6-8
6.4.1 Requesting the Bus .................................................................... 6-10
6.4.2 Receiving the Bus Grant ....... ...... ..................... ....... ..... ........ ....... 6-10
6.4.3 Acknowledgement of Mastership.. .................... ........ .................... 6-10
6.4.4 Bus Arbitration Control............................................................... 6-10
6.4.5 Reset Operation............ ................ ................. ...... ....... ............. ....... 6-10
6.5 Bus Overhead Time......................................................................... 6-11
6.5.1 Front-End Overhead................................................................... 6-11
6.5.2 Back-End Overhead.................................................................... 6-12
6.6 Registers....................................................................................... 6-12
MC68824 USER'S MANUAL
MOTOROLA
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TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
Section 7
TBC Interfaces
7.1 T8C-to-Host Processor Interface.. .................................. ..................... 7-1
7.2 Non-M68000 8us Interface ................ ................................................ 7-1
7.3 MAC Sublayer-to-Physical-Layer Interface...................... ...................... 7-4
Section 8
Electrical Specifications
8.1 Maximum Ratings........................................................................... 8-1
8.2 Thermal Characteristics.... .................... ............................................ 8-1
8.3 Power Considerations...................................................................... 8-1
8.4 DC Electrical Characteristics.............................................................. 8-2
8.5 AC Electrical Characteristics.............................................................. 8-2
Section 9
Ordering Information and Mechanical Data
9.1 Package Types............................................................................... 9-1
9.2 Standard Ordering Information.......................................................... 9-1
9.3 Pin Assignments............................................................................. 9-2
9.4 Package Dimensions........................................................................ 9-3
Appendix A
IEEE 802.4 Operation
A.1 Fu nctions ................ ......................... . ................................ ............ A-1
A.2 Steady Station Operation.................................................................. A-1
A.3 Initialization................................................................................... A-2
A.4 Passing the Token........................................................................... A-2
A.5 Adding New Stations................. ...................... ........ ........................ A-3
A.6 Priority................................. .................. ............ .............. ............ A-4
Appendix B
Frame Formats and Addressing
8.1 Frame Formats and Addressing......................................................... 8-1
8.1.1 Preamble...................................................................... ........... 8-1
8.1.2 Start Delimiter .......................................................................... 8-1
8.1.3 Frame Control.......................................................................... 8-2
8.1.4 Address Fields.......................................................................... 8-3
8.1.5 Data.......................................... ........................... .. ................ 8-3
8.1.6 Frame Check Sequence (FCS)................ ....................................... 8-3
8.1.7 End Delimiter ........................................................................... 8-3
8.1.8 Invalid Frames.......................................................................... 8-3
8.1.9 Abort Sequence........................................................................ 8-4
MOTOROLA
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MC68824 USER'S MANUAL

Paragraph
Number
B.2
B.2.1
B.2.2
B.2.3
B.2.4
C.1
C.2
C.2.1
C.2.2
C.3
C.3.1
C.3.2
C.3.3
TABLE OF CONTENTS (Concluded)
Page
Title Number
Addressing.................................................................................... B-4
IEEE Addressing........................................................................ B-4
Individual Addressing................................................................. B-4
Group Addressing..................................................................... B-6
Promiscuous Listener...................................................................... B-6
Appendix C
Bridging
Interconnection of Networks......................................................... ..... C-1
Hierarchical Addressed Bridging ........................................................ C-1
Hierarchical Addressed Bridging Implementation............................. C-2
Lower Bridges.......................................................................... C-3
Flat Addressed Bridging Overview...................................................... C-3
Source Routing Implementation................................................... C-4
Route Designators..................................................................... C-5
Source Routing Operation ........................................................... C-6
Appendix 0
Performance
MC68824 USER'S MANUAL
MOTOROLA

LIST OF ILLUSTRATIONS
Figure Page
Number Title Number
1-1 10S/OSI Model ............................................................................... 1-2
1-2 IEEE Standard Modem ........ ..................... ........ .... ......... ....... ............ 1-3
1-3 Token Bus LAN Node. ....... ............ ..... ........... ............ ..... ........ ......... 1-5
2-1 Data Organization in Memory........ ............ ................ ........................ 2-1
2-2 TBC Private Area ............................................................................ 2-2
2-3 Initialization Table........................................................................... 2-11
3-1 Command Parameter Area................................................................ 3-13
4-1 Linked Buffer Structures ..... ............ ....... ......... ........... ............... ........ 4-1
4-2 TBC Queues................................................................................... 4-2
4-3 Frame Descriptor Format.................................................................. 4-3
4-4 Buffer Descriptor Format.................................................................. 4-7
4-5 Examples of Queues Status. ............ ................ ............ ..... ........ ......... 4-10
4-6 Free Frame Descriptor and Buffer Descriptor Pools................................ 4-12
4-7 Initialization of a Reception Queue.. ...................... .............................. 4-14
4-8 Reception Queue After Receivi ng 0 ne Fra me............ ............................ 4-14
5-1 MC68824 Signals............................................................................ 5-2
5-2 Data Strobe Control of Data Bus in Master Mode................................... 5-3
5-3 Physical Layer Interface.................................................................... 5-5
5-4 Request Channel Encodings for MAC Mode (SMREQ = 1)......................... 5-6
5-5 Request Channel Encodings for Station Management Mode (SMREQ=O).... 5-7
5-6 Indication Channel Encodings for MAC Mode (SMIND = 1) ....................... 5-7
5-7 Encodings for Station Management Mode (SMIND=O) ........................... 5-8
5-8 Typical Station Management Sequence............................................... 5-8
6-1 Host Processor Read Cycle with Two Wait States................................... 6-2
6-2 Host Processor Write Cycle ..... .... ................ ........ .... ........ ......... ......... 6-2
6-3 Interrupt Acknowledge Cycle............................................................. 6-3
6-4 Read Cycle and Slow Read Cycle........................................................ 6-4
6-5 Write Cycle and Slow Write Cycle....................................................... 6-5
6-6 BEC Encoding Definitions.. ...... ...... .................... ........ .... ........ ........... 6-5
6-7 TBC Write Cycle with HALT............................................................... 6-6
6-8 TBC Read Cycle with Bus Error.......................................................... 6-7
6-9 TBC Read Cycle with RETRy.............................................................. 6-7
6-10 TBC Read Cycle with Relinquish and Retry, Early and Late............ ........... 6-8
6-11 TBC Read Cycle with Undefined Bus Exception ............................ ......... 6-9
6-12 Bus Arbitration............................................................................... 6-9
6-13 Bus Arbitration Unit State Diagram..................................................... 6-11
6-14 Bus Timing Diagram........................................................................ 6-12
MOTOROLA
MC68824 USER'S MANUAL
)(

LIST OF ILLUSTRATIONS (Continued)
Figure Page
Number Title Number
7-1 TBC to MC68020 Interface.................. .............. ................................. 7-2
7-2 TBC to iAPX 80186 Interface.............................................................. 7-3
7-3 Memory Organization.................................................... .................. 7-4
8-1 Host Processor Read Cycle .................... :........................................... 8-5
8-2
Host Processor Write Cycle............................................................... 8-6
8-3
Interrupt Acknowledge Cycle............................................................. 8-6
8-4
Bus Arbitration............................................................................... 8-7
8-5 Read Cycle and Slow Read Cycle........................................................ 8-8
8-6
Write Cycle.................................................................................... 8-9
8-7 TBC Read Cycle with RETRy.............................................................. 8-10
8-8 Read Cycle with Bus Error................................................................ 8-11
8-9 BR After Previous Exception ........................................................ ;..... 8-12
8-10 Short Exception Cycle...................................................................... 8-12
8-11 Clock, ClK....... ............................... ................. .............................. 8-13
8-12
TBC Serial Data (RXD and TXD) and Serial Clocks (RClK and TClK) .......... 8-13
MC68824 USER'S MANUAL
MOTOROLA
vi

LIST OF TABLES
Table Page
Number Title Number
3-1 TBC Commands by Categories............................................... ............... 3-1
3-2 TBC Commands................................................................................. 3-2
3-3 Register Map.................................................................................... 3-3
3-4 Data Register Format.......................................................................... 3-3
3-5
Interrupt Vector ................................... ............. ............. .................... 3-4
3-6 Read Value Opcodes.. .............................. .................. .......... ............... 3-14
3-7 Set Value Opcodes.............................................................................. 3-15
3-8 Test Buffer Format............................................................................. 3-20
3.9 Test Buffer for Returned Data............................................................... 3-21
5-1 Bus Exception Conditions.................................................................... 5-2
5-2 Signal Summary................................................................................ 5-9
6-1 Bit Bus Access (CS=O and R/w=O) ....................................................... 6-12
6-2 16-Bit Bus Access (CS=O and R/w=O) ................................................... 6-12
MOTOROLA
xii MC68824 USER'S
MANUAL

SECTION 1
INTRODUCTION
The Motorola MC68824 Token Bus Controller (TBC) is a silicon integrated circuit implementing
the media
access control (MAC) portion of the IEEE 802.4 token passing bus standard. IEEE 802.4
defines the physical and MAC portion
of the data link layer standards of the Manufacturing
Automation Protocol (MAP) specification.
The
TBC simplifies interfacing a microcomputer to a MAP network by providing the link layer
services including managing ordered access to the token bus medium, providing a means
for
admission and deletion of stations, and handling fault recovery. Some extra features have been
added to enhance the token bus controller for real time applications. These enhancements consist
of the four levels of priority for transmit and receive and the request with response mechanism.
These features, combined with the basic functionality
of the token bus controller, make it ideally
suited
for both seven layer MAP networks and the Enhanced Performance Architecture (EPA)
networks defined by MAP version 3.0.
The TBC functions as an intelligent peripheral device to a microprocessor. An on-chip DMA
transfers data frames to and from a buffer memory with minimal microprocessor interface
re-
quired. A microcoded fully linked buffer management scheme queues frames during transmission
and reception, and optimizes memory
use. This VLSI implementation significantly reduces the
cost
of a MAP network.
1.1 FEATURES
The MC68824 provides the following:
• Low Power Consumption through 2 Micron HCMOS Fabrication
• MAC Options Suitable for Real Time Environments
Four Receive and Four Transmit Queues Supporting Four Priority Levels
Immediate Response Mechanism using the Request with Response
(RWR) Frame Type
• On-chip Network Monitoring and Diagnostics
• Two Separate Ways of Bridging -Hierarchial and IBM Defined Source Routing
• Powerful Addressing -Group Address Recognition and Multidrop Capability
• System Clock Rate up to 16.67 MHz
• Serial Data Rates from 10 Kbits/Second to 16.67 Mbits/Second
• IEEE 802.4 Recommended Serial Interface Supporting Various Physical Layers
• Simple Interface to Higher Level Software by Means of a Powerful, Fully-Linked Data
Structure
• Highly Integrated M68000 Family Bus Master/Slave Interface
Four Channel DMA for Transfer
of Data Frames to and from Memory
40-Byte
FIFO to Efficiently Support High Data Rate
32-Bit Address Bus with Virtual Address Capabilities
• Simplified Interface to Other Processor Environments
Byte Swapping Capability for Alternate Memory Structures
8- or 16-Bit Data Bus
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II 1.2 LOCAL AREA NETWORK STANDARDS
Until recently, proprietary local area networks were the only way to tie equipment together to
share information and resources. These proprietary local
area networks allowed the user to con-
nect small segments
of one vendor's computers together. This was all the user needed or wanted.
Today, with the increasing complexity
of factories and offices, there is a significant increase in
the requirements
for local area network functionality. Users need to connect more than just a
small segment of one vendor's equipment. Since each vendor has its own proprietary protocol,
connecting equipment together from more than one vendor or placing a different vendor's ma-
chine into a proprietary network
can cost up to 80% of the price of the actual equipment. This
cost
is mainly attributed to the time necessary to write special software programs.
Users began to
see that this situation left them with two choices; to buy everything from one
vendor, or to buy standard equipment. Since
it is obviously not reasonable to buy everything
from one vendor, local
area network standards began to receive attention. General Motors has
specifically addressed the standardization of the factory local area network through the Manu-
facturing Automation Protocol (MAP) specification based on the 150/051 reference model.
1.2.1 150/051 Reference Model
The industry accepted communications model is the Inter-
national Standards Organization (ISO) reference model of
Open Systems Interconnection (051). The model specifies
seven layers, with
each layer responsible for providing spe-
cific services to the layer above it. These layers are inde-
pendent
of each other and peer-to-peer layer interfaces are
defined and standardized
(see Figure 1-1).
Application Layer
Provides the network services necessary
for the user to
run his application program.
Presentation Layer
Provides the services necessary to format data ex-
change and to manage session dialog.
Session Layer
ISO LAYER
APPLICATION
PRESENTATION
SESSION
STATION
TRANSPORT
MANAGEMENT
NETWORK
OATA LINK
PHYSICAL
I
()
PHYSICAL MEOlA
)
Figure 1-1. 105/051 Model
Handles connection establishment, connection termination, and arbitrates session user rights
to services.
Transport Layer
Provides the functions necessary for error free delivery
of messages (flow control, acknowl-
edgement, error recovery).
Network Layer
Routes frames between multiple network segments.
Data Link Layer
Is responsible for sending frames across the physical link in a reliable manner.
Physical Layer
Transmits data bits across the physical medium.
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1.2.2 IEEE Local Area Network Standards
The IEEE 802 standards body has specified a set of standards based on the lowest two layers of
the ISO/OSI model. In order to meet the diverse requirements of the user community, the 802
standards body has defined five different standards so far. These standards are:
1. IEEE 802.3 Carrier Sense Multiple Access with Collision Detection (CSMAlCD) on a Bus
Topology
2. IEEE 802.4 Token Bus
3. IEEE 802.5 Token Ring
4. IEEE 802.6 Metropolitan Area Network (MAN)
5. IEEE 802.9 Intergrated Voice Data LAN Access Method
The
IEEE standards do not directly correspond to the ISO/OSI model as shown in Figure 1-1. IEEE
breaks the data link layer into the media access control (MAC) and the logical link control (LLC)
sublayers (see Figure 1-2). The MAC layers are specified by working groups 802.3, 802.4, 802.5,
802.6, and
802.9. The LLC sublayer is specified by 802.2. IEEE has othersupporting working groups
which consist
of network management and interworking (802.1), broadband advisory (802.7), and
fiber optic advisory (802.8).
802.1 MANAGEMENT
802.2 LLC I
BBBBB
Figure 1·2. IEEE Standard Model
1.3 IEEE 802.4 TOKEN BUS LOCAL AREA NETWORKS
DATA LLC
LINK
LAYER MAC
PHYSICAL
LAYER
The following paragraphs briefly describe the token bus operation and the options outlined in
the
IEEE 802.4 standard.
1.3.1 Token Bus Operation
The IEEE 802.4 token passing bus standard is a deterministic protocol. This means that the user
is guaranteed
access to the network on or before certain predefined intervals. The predefined
intervals are dependent on network characteristics such as number of stations and token hold
times within each station. A station is only allowed to transmit onto the network when it holds
the token. A token is an 8·bit pattern in the frame control portion of the frame. There is only one
token on a network. This token is passed from the station with the highest address
to the station
having the next highest address and
so on, with the lowest addressed station passing the token
back to the highest addressed station. This circular passing
of the token forms a logical ring.
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The initialization of atoken bus network is accomplished by each station listening to the network.
When a particular station hears nothing for a specified period,
it will try to claim the token. A
number
of stations can try to claim the token at the same time but only the highest addressed
station will win the token.
Periodically, each station on the network checks to see if a station that has an address between
that
of itself and the station it-passes the token to (its successor in the logical ring), wants to enter
the network. If there is such a station, the original station makes the new station the recipient
of
the token (its successor), therefore allowing the new station to enter the ring. It is conceivable
that more than one station could
try to enterthe logical ring at the same time (i.e., have addresses
between the same
two stations). The protocol is set up such that the highest addressed station
will be allowed into the ring and the other station(s) will have to try again at the next opportunity.
When a station no longer desires to
be a part of the logical ring, it tells the station preceeding it
(previous station) that it is leaving the ring. The previous station will then determine its new
successor, and
pass it the token.
For more detailed information
on how the IEEE 802.4 standard works, refer to APPENDIX A IEEE
802.4 OPERATION or the IEEE 802.4 standard.
1.3.2 Options Within
IEEE 802.4
The token bus controller implements both the priority and request with response (RWR) options
outlined in the IEEE 802.4 standard. These options make the TBe suitable for use in real time
networks
as specified in MAP version 3.0.
The request with response option allows any station that is a member of the logical ring to
communicate with any station(s) that is not a member
of the logical ring. This is useful in real
time networks because stations that do not have much data to transmit do not add unnecessary
delay to the token rotation time. The longer the token rotation time is, the longer
it is between
each station's opportunity to transmit. Not being a part of the logical ring allows these stations
to have less functionality, simpler software, and lower cost. Whenever a station needs data from
a station that
is not a member of the logical ring, the requesting station sends a request with
response frame to the station it wants a response from. The responding station then returns a
response while the requesting station still holds the token.
The four levels of priority are optional. If the user chooses not to implement priority, all frames
are received and transmitted out
of the highest priority queue. If priority is implemented, frames
are linked into one
of the four queues according to their priority. The TBe implements priority
by transmitting out
of the highest priority queue until there are no more frames in that queue or
until the timer for that priority
has elapsed. The timer for the highest priority queue is set by the
userwhile the timer
for lower priorities is set partially by the user and partially by network history.
The TBethen eitherpasses the token orchecks the next lower priorityqueue
for frames totransmit.
Ifthe timer for the next lower queue has not elapsed (the TBe has not passed the token), the TBe
transmits out
of that queue until there are no more frames to transmit or until the timer for that
priority (which
has been set by the user) has elapsed, and so on through all four queues. Finally
the TBe passes the token to the next station. While receiving, frames
of the same priority are
linked together so the host can easily read the data by priority queue.
1.4 TBe ENVIRONMENT
The token bus controller provides ordered access to the token bus medium while underthe overall
supervision of a microprocessor. The communication between the microprocessor and the TBe
is primarily through shared memory, but also uses a command structure. .
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Figure 1-3 illustrates a typical system configuration using the TBC. The TBC, memory, and CPU II
all communicate through a local bus. On the serial side, the TBC communicates through the IEEE
802.4G recommended standard serial interface to any modem also implementing this interface.
~T
II Ie BUS
STANDARD
PHYSICAL
INTERFACE
Figure 1-3. Token Bus LAN Node
1.5
PHYSICAL LAYER INTERFACE
COAX
CABLE
The TBC is a half-duplex controller which can be interfaced to any physical layer that implements
the IEEE 802.4 recommended standard serial interface at 1, 5, or 10 Mbps. The serial interface
supports two modes
of operation: station management mode and MAC mode. In station man-
agement mode, commands may
be given to an intelligent modem through the TBC. The serial
interface consists of a request channel and an indication channel. The request channel is from
the
TBC to the modem and consists of TXCLK (supplied by the modem), TXSYMO, TXSYM1,
TXSYM2, and
SMREQ. The indication channel is from the modem to the TBC and consists of
RXCLK (supplied by the modem), RXSYMO, RXSYM1, RXSYM2, and SMIND.
Both the TBC and the modem can request station management mode. The TBC requests station
management mode in order to give commands and the modem requests station management
mode
in order to report error conditions. The TBC can either encode commands on its TXSYM
lines or send serial data commands on one
of the TXSYM lines.
1.6 MICROPROCESSOR SYSTEM BUS INTERFACE
The host microprocessor can be any 8-, 16-, or32-bit microprocessor. The microprocessor interface
on the
TBC is that of the M68000 Family. The TBC provides byte swapping capability to enable
the user to operate with either Motorola or Intel byte ordering convention.
The
TBC has a 32-bit non-multiplexed address bus and a separate 16-bit data bus, which may be
configured for 8-bit operation.
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1.7 SHARED MEMORY
The TBC and the host microprocessor interface through shared memory which consists of:
Initialization Table
Private Area
Fully Linked Buffer Structure
Frame Descriptors
Buffer Descriptors
Data Buffers
Initialization Table
Contains all of the initial parameters necessary for TBC network operation and is prepared
by the host prior to the initialization
of the TBC.
Private Area
An external scratchpad
for the TBC containing some TBC parameters.
Fully Linked Buffer Structure
Consists
of frame descriptors, buffer descriptors, and data buffers.
Frame descriptors contain control information
for each frame and are linked together to form
each priority queue.
Buffer descriptors are pointed to by frame descriptors and contain control information
for
the data. Buffer descriptors contain an offset value set by the user which tells how far from
the beginning
of the data buffer the actual data begins. The offset feature can be used to
add or subtract upper layer headers making it unnecessary to recopy data.
Data buffers contain only data and are flexible in size.
1.8 OVERVIEW OF TBC FUNCTIONAL OPERATION
The following paragraphs provide a high level summary of the command structure, frame recep-
tion, and frame transmission.
1.8.1 COMMAND STRUCTURE OVERVIEW
The host issues a command to the TBC by writing the 8-bit command into the command register.
The commands belong to one
of the following categories:
Initialization
Set Operation Mode
Transmit
Data Frames
Set/Read Value
Test
Notify
TBC
Modem Control
1.8.2 FRAME RECEPTION OVERVIEW
A frame is received by a station if the address comparison is true. For group addressed frame
reception, the address comparison uses the group address mask, this station's address, and the
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destination address of the frame. The address comparison for a non-group (individual) addressed
frame uses the individual address mask, this station's address, and the destination address
of the
frame. Broadcast frames are always accepted. Once the station determines that
it is to receive
the frame, the frame is transferred by DMA into the linked buffer portion of shared memory into
the appropriate priority queue. The
TBC does all of the linking and transferring. After the frame
has been written into shared memory,
an indication of its reception and its status are written into
the frame descriptor.
1.8.3 FRAME TRANSMISSION OVERVIEW
Data frames are transmitted from one of four transmission priority queues. Frames are only
transmitted out of the enabled priority queues. On reception of the token by the station, the TBC
checks the transmission queues for frames to be sent. If frames are present on one or more of
the queues, the TBC will send the frames until its allotted transmission time has expired, then
pass the token. Confirmation that a specific frame has been sent, along with the transmission
status is written into its frame descriptor.
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