Motorola MVME162LX 300 Series Quick start guide

MVME162LX 200/300 Series
Embedded Controller
Installation and Use
V162LX2-3A/IH3

Notice
While reasonable efforts have been made to assure the accuracy of this document,
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the use of the information obtained therein. Motorola reserves the right to revise this
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Computer Group
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Tempe, Arizona 85282

Preface
The MVME162LX 200/300 Series Embedded Controller Installation and Use Manual
provides a board-level description of the MVME162LX Embedded Controller. It contains
a general overview of the product along with a list of hardware features and a detailed
functional description.
The information contained in this manual applies to the MVME162LX-2xx and
MVME162LX-3xx (200 and 300 series) models that are currently shipping as of the
publication date of this manual.
Motorola®and the Motorola symbol are registered trademarks of Motorola, Inc.
All other products mentioned in this document are trademarks or registered trademarks of
their respective holders.
© Copyright Motorola, Inc. 1998
All Rights Reserved
Printed in the United States of America
November 1998

Safety Summary
Safety Depends On You
The following general safety precautions must be observed during all phases of operation, service, and repair of this
equipment. Failureto complywith these precautions or with specific warnings elsewhere in thismanual violates safety
standards of design, manufacture, and intended use of the equipment. Motorola, Inc. assumes no liability for the
customer’s failure to comply with these requirements.
The safety precautions listed below represent warnings of certain dangers of which Motorola is aware. You, as the
user of the product, should follow these warnings and all other safety precautions necessary for the safe operation of
the equipment in your operating environment.
Ground the Instrument.
To minimize shock hazard, the equipment chassis and enclosure must be connected to an electrical ground. The
equipment is supplied with a three-conductor AC power cable. The power cable must be plugged into an approved
three-contact electrical outlet. The power jack and mating plugof the power cable meet International Electrotechnical
Commission (IEC) safety standards.
Do Not Operate in an Explosive Atmosphere.
Do not operate the equipment in the presence of flammable gases or fumes. Operation of any electrical equipment in
such an environment constitutes a definite safety hazard.
Keep Away From Live Circuits.
Operating personnel must not remove equipment covers. Only Factory Authorized Service Personnel or other
qualified maintenance personnel may remove equipment covers for internal subassembly or component replacement
or any internal adjustment. Do not replace components with power cable connected. Under certain conditions,
dangerous voltages may exist even with the power cable removed. To avoid injuries, always disconnect power and
discharge circuits before touching them.
Do Not Service or Adjust Alone.
Do not attempt internal service or adjustment unless another person capable of rendering first aid and resuscitation is
present.
Use Caution When Exposing or Handling the CRT.
Breakage of the Cathode-Ray Tube (CRT) causes a high-velocity scattering of glass fragments (implosion). To
prevent CRT implosion, avoid rough handling or jarring of the equipment. Handling of the CRT should be done only
by qualified maintenance personnel using approved safety mask and gloves.
Do Not Substitute Parts or Modify Equipment.
Because of the danger of introducing additional hazards, do not install substitute parts or perform any unauthorized
modification of the equipment. Contact yourlocal Motorola representative for service andrepair to ensure that safety
features are maintained.
Dangerous Procedure Warnings.
Warnings, such as the example below, precede potentially dangerous procedures throughout this manual. Instructions
contained in the warnings must be followed. You should also employ all other safety precautions which you deem
necessary for the operation of the equipment in your operating environment.
!
WARNING
Dangerous voltages, capable of causing death, are present in
this equipment. Use extreme caution when handling, testing,
and adjusting.

All Motorola printed wiring boards (PWBs) are manufactured by UL-recognized
manufacturers, with a flammability rating of 94V-0.
!
WARNING
This equipment generates, uses, and can radiate electro-
magnetic energy. It may cause or be susceptible to electro-
magnetic interference (EMI) if not installed and used in a
cabinet with adequate EMI protection.
European Notice: Board products with the CE marking comply with the EMC
Directive (89/336/EEC). Marking a system with the CE symbol indicates
compliance of that Motorola system to the applicable directives of the European
Community. A system with the CE marking meets or exceeds the following
technical standards:
EN55022 (CISPR 22): Limits and Methods of Measurement of Radio
Interference Characteristics of Information Technology Equipment. Tested to
Equipment Class B.
EN50082-1, 1992: Electromagnetic Compatibility -- Generic Immunity
Standard, Part 1: Residential, Commercial and Light Industry.
IEC801-2: Electromagnetic Compatibility for Industrial Process
Measurement and Control Equipment, Part 2: Electrostatic Discharge
Requirements.
IEC801-3: Electromagnetic Compatibility for Industrial Process
Measurement and ControlEquipment, Part 3: Radiated Electromagnetic Field
Requirements.
IEC801-4: Electromagnetic Compatibility for Industrial Process
Measurement and Control Equipment, Part 4: Electrical Fast Transient/Burst
Requirements.
The product also fulfills EN60950 (product safety) which is essentially the
requirement for the Low Voltage Directive (73/23/EEC).
In accordance with European Community directives, a “Declaration of
Conformity” has been made and is on file at Motorola, Inc. - Computer Group,
27 Market Street, Maidenhead, United Kingdom, SL6 8AE.
This board product was tested in a representativesystem toshow compliance with
the above mentioned requirements. A proper installation in a CE-marked system
will maintain the required EMC/safety performance.

vii
Contents
CHAPTER 1 Board Level Hardware Description
Introduction................................................................................................................1-1
Overview.............................................................................................................1-1
Related Documentation.......................................................................................1-2
Models Available ................................................................................................1-3
Document Requirements.....................................................................................1-4
Available Software..............................................................................................1-5
Required Equipment ...........................................................................................1-5
Features...............................................................................................................1-5
Specifications......................................................................................................1-7
Cooling Requirements ........................................................................................1-8
Special Considerations for Elevated-Temperature Operation ............................1-9
Manual Terminology.........................................................................................1-10
Block Diagram .........................................................................................................1-11
Functional Description.............................................................................................1-12
Switches and LEDs...........................................................................................1-12
ABORT Switch..........................................................................................1-12
RESET Switch...........................................................................................1-12
Front Panel Indicators................................................................................1-13
Data Bus Structure............................................................................................1-13
MC68040 or MC68LC040 CPU.......................................................................1-14
MC68XX040 Cache ..................................................................................1-14
No VMEbus Interface Option...........................................................................1-14
Memory Options...............................................................................................1-15
DRAM Options..........................................................................................1-15
SRAM Options ..........................................................................................1-15
SRAM Batteries.........................................................................................1-17
EPROM and Flash Memory ......................................................................1-18
Battery Backed Up RAM and Clock ................................................................1-18
VMEbus Interface and VMEchip2 ...................................................................1-19
I/O Interfaces ....................................................................................................1-19
Serial Communications Interface ..............................................................1-19
IndustryPack (IP) Interfaces ......................................................................1-20
Ethernet Interface ......................................................................................1-20
SCSI Interface............................................................................................1-21
SCSI Termination......................................................................................1-21

viii
Local Resources ...............................................................................................1-22
Programmable Tick Timers.......................................................................1-22
Watchdog Timer........................................................................................1-22
Software-Programmable Hardware Interrupts ..........................................1-23
Local Bus Timeout....................................................................................1-23
Local Bus Arbiter.............................................................................................1-24
Connectors........................................................................................................ 1-24
Memory Maps.......................................................................................................... 1-25
Local Bus Memory Map...................................................................................1-25
Normal Address Range .............................................................................1-25
Detailed I/O Memory Maps .............................................................................1-31
IPIC Overall Memory Map.......................................................................1-41
BBRAM, TOD Clock Memory Map ........................................................1-46
Interrupt Acknowledge Map .....................................................................1-49
VMEbus Memory Map ....................................................................................1-49
VMEbus Accesses to the Local Bus .........................................................1-49
VMEbus Short I/O Memory Map ............................................................. 1-49
Software Initialization .............................................................................................1-50
Multi-MPU Programming Considerations....................................................... 1-50
Local Reset Operation......................................................................................1-50
EMC Compliance.............................................................................................1-51
CHAPTER 2 Hardware Preparation and Installation
Introduction ...............................................................................................................2-1
Unpacking Instructions..............................................................................................2-1
Hardware Preparation................................................................................................ 2-1
System Controller Select Header (J1) ................................................................2-2
General-Purpose Readable Jumpers Header (J11) ............................................. 2-4
EPROM/Flash Configuration Header (J12) ....................................................... 2-5
SRAM Backup Power Source Select Headers (J13, J1) ....................................2-9
SCSI Terminator Enable Header (J14).............................................................2-10
Memory Mezzanine Options............................................................................ 2-11
Installation Instructions ...........................................................................................2-12
IP Installation on the MVME162LX................................................................2-12
MVME162LX Module Installation..................................................................2-13
System Considerations ..................................................................................... 2-14
.................................................................................................................................2-18

ix
CHAPTER 3 Debugger General Information
Overview....................................................................................................................3-1
Description of 162Bug...............................................................................................3-1
162Bug Implementation.............................................................................................3-2
Installation and Start-up.............................................................................................3-3
Autoboot ....................................................................................................................3-6
ROMboot ...................................................................................................................3-7
Network Boot.............................................................................................................3-8
Restarting the System ................................................................................................3-9
Reset....................................................................................................................3-9
Abort .................................................................................................................3-10
Break.................................................................................................................3-10
SYSFAIL* Assertion/Negation ........................................................................3-10
MPU Clock Speed Calculation.........................................................................3-11
Memory Requirements.............................................................................................3-11
Terminal Input/Output Control ................................................................................3-12
Disk I/O Support ......................................................................................................3-13
Blocks Versus Sectors.......................................................................................3-13
Device Probe Function......................................................................................3-14
Disk I/O via 162Bug Commands......................................................................3-14
IOI (Input/Output Inquiry).........................................................................3-14
IOP (Physical I/O to Disk).........................................................................3-15
IOT (I/O Teach).........................................................................................3-15
IOC (I/O Control)......................................................................................3-15
BO (Bootstrap Operating System).............................................................3-15
BH (Bootstrap and Halt)............................................................................3-15
Disk I/O via 162Bug System Calls...................................................................3-15
Default 162Bug Controller and Device Parameters .........................................3-17
Disk I/O Error Codes ........................................................................................3-17
Network I/O Support................................................................................................3-18
Intel 82596 LAN Coprocessor Ethernet Driver................................................3-18
UDP/IP Protocol Modules ................................................................................3-18
RARP/ARP Protocol Modules .........................................................................3-19
BOOTP Protocol Module .................................................................................3-19
TFTP Protocol Module .....................................................................................3-19
Network Boot Control Module.........................................................................3-19
Network I/O Error Codes..................................................................................3-19
Multiprocessor Support............................................................................................3-20
Multiprocessor Control Register (MPCR) Method ..........................................3-20
GCSR Method...................................................................................................3-22
Diagnostic Facilities.................................................................................................3-23
Manufacturing Test Process.....................................................................................3-23

x
CHAPTER 4 Using The 162Bug Debugger
Entering Debugger Command Lines.........................................................................4-1
Syntactic Variables .............................................................................................4-2
Expression as a Parameter........................................................................... 4-3
Address as a Parameter ............................................................................... 4-4
Address Formats..........................................................................................4-4
Offset Registers........................................................................................... 4-6
Port Numbers......................................................................................................4-8
Entering and Debugging Programs............................................................................4-9
Calling System Utilities from User Programs...........................................................4-9
Preserving the Debugger Operating Environment...................................................4-10
162Bug Vector Table and Workspace...............................................................4-10
Hardware Functions ......................................................................................... 4-11
Exception Vectors Used by 162Bug................................................................. 4-11
Using 162Bug Target Vector Table..........................................................4-12
Creating a New Vector Table....................................................................4-13
162Bug Generalized Exception Handler...................................................4-15
Floating Point Support.............................................................................................4-17
Single Precision Real........................................................................................4-18
Double Precision Real......................................................................................4-18
Extended Precision Real...................................................................................4-18
Packed Decimal Real........................................................................................4-19
Scientific Notation............................................................................................4-19
The 162Bug Debugger Command Set.....................................................................4-20
.................................................................................................................................4-24
APPENDIX A Configure and Environment Commands
Configure Board Information Block......................................................................... A-1
Set Environment to Bug/Operating System.............................................................. A-3
Configuring the IndustryPacks........................................................................A-16
APPENDIX B Disk/Tape Controller Data
Disk/Tape Controller Modules Supported................................................................ B-1
Disk/Tape Controller Default Configurations .......................................................... B-2
IOT Command Parameters for Supported Floppy Types......................................... B-5

xi
APPENDIX C Network Controller Data
Network Controller Modules Supported...................................................................C-1
APPENDIX D Serial Interface Connections
EIA-232-D Interconnections.....................................................................................D-1
APPENDIX E Network Port Connections
Ethernet Interconnections ......................................................................................... E-1
APPENDIX F SCSI Bus Connections
SCSI Interconnections .............................................................................................. F-1
APPENDIX G Mezzanine Board Connectors
Mezzanine Connector J15 Signals ............................................................................G-1
Mezzanine Connector J16 Signals ............................................................................G-6
Mezzanine Board Dimensions ................................................................................G-11
APPENDIX H Troubleshooting CPU Boards
Solving Startup Problems .........................................................................................H-1
APPENDIX I Input/Output Connections
IndustryPack Logic Interface Interconnections ......................................................... I-1
IndustryPack I/O Interconnections ............................................................................ I-4
Remote Reset/LED Interconnection .......................................................................... I-5
VME Bus Interconnection ......................................................................................... I-6
Connector P1 Interconnect Signals..................................................................... I-6
Connector P2 Interconnect Signals................................................................... I-10
APPENDIX J Related Documentation
Motorola Documentation ........................................................................................... J-1
Non-Motorola Documentation...................................................................................J-2
Support Information...................................................................................................J-3

xii
FIGURES
Figure 1-1. MVME162LX Block Diagram ............................................................. 1-11
Figure 2-1. MVME162LX Switch, Header, Connector, Fuse, and LED Locations..2-3
Figure 2-2. DB25-DTE-to-RJ45 Adapter................................................................2-16
Figure 2-3. DB25-DCE-to-RJ45 Adapter................................................................2-17
Figure 2-4. Typical RJ45 Serial Cable.....................................................................2-17
Figure D-1. Serial Interface Connections.................................................................D-2
Figure D-2. DB25-DTE-to-RJ45 Adapter................................................................ D-3
Figure D-3. DB25-DCE-to-RJ45 Adapter................................................................ D-3
Figure D-4. Typical RJ45 Serial Cable ....................................................................D-4
Figure G-1. Mezzanine Board Dimensions (Parity DRAM).................................. G-11
Figure G-2. Mezzanine Board Dimensions (SRAM and ECC DRAM).................G-12
TABLES
Table 1-1. MVME162LX Embedded Controller Models ......................................... 1-3
Table 1-2. MVME162LX Specifications...................................................................1-7
Table 1-3. Local Bus Arbitration Priority................................................................1-24
Table 1-4. Local Bus Memory Map.........................................................................1-26
Table 1-5. Local I/O Devices Memory Map ...........................................................1-28
Table 1-6. VMEchip2 Memory Map - LCSR Summary (Sheet 1 of 2) ..................1-32
Table 1-7. MCchip Register Map ............................................................................1-36
Table 1-8. MCECC Internal Register Memory Map .............................................. 1-37
Table 1-9. Z85230 SCC Register Addresses ...........................................................1-39
Table 1-10. 82596CA Ethernet LAN Memory Map................................................1-39
Table 1-11. 53C710 SCSI Memory Map.................................................................1-40
Table 1-12. IPIC Overall Memory Map...................................................................1-41
Table 1-13. IPIC Memory Map—Control and Status Registers .............................1-42
Table 1-14. MK48T08 BBRAM/TOD Clock Memory Map...................................1-43
Table 1-15. BBRAM Configuration Area Memory Map .......................................1-44
Table 1-16. TOD Clock Memory Map .................................................................... 1-45
Table 2-1. EPROM/Flash Mapping - 128K x 8 EPROMs ........................................ 2-6
Table 2-2. EPROM/Flash Mapping - 256K x 8 EPROMs ........................................ 2-6
Table 2-3. EPROM/Flash Mapping - 512K x 8 EPROMs ........................................ 2-7
Table 2-4. EPROM/Flash Mapping - 1M x 8 EPROMs............................................2-7
Table 2-5. EPROM/Flash Mapping - 1M x 8 EPROMs, On-Board Flash Disabled.2-8
Table 4-1. Debugger Address Parameter Formats.....................................................4-5
Table 4-2. Exception Vectors Used by 162Bug....................................................... 4-11

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Table 4-3. Debugger Commands ............................................................................4-20
Table A-1. ENV Command Parameters ..................................................................A-4
Table D-1. Connector J17 Interconnect Signals ......................................................D-1
Table E-1. Ethernet Connector J9 Interconnect Signals ......................................... E-1
Table F-1. SCSI Connector J10 Interconnect Signals ............................................ F-1
Table G-1. Mezzanine Connector J15 Interconnect Signals ...................................G-1
Table G-2. Mezzanine Connector J16 Interconnect Signals ...................................G-6
Table H-1. Troubleshooting MVME162LX Boards ...............................................H-1
Table I-1. IndustryPack Interconnect Signals ..........................................................I-1
Table I-2. Remote Reset/LED interconnect Signals.................................................. I-5
Table I-3. Connector P1 Interconnect Signals ......................................................... I-6
Table I-4. Connector P2 Interconnect Signals......................................................... I-10

xiv

1-1
1
1Board Level Hardware
Description
Introduction
This chapter provides a board-level hardware description of the
MVME162LX EmbeddedController. It containsa general overview of the
product along with a list of hardware features and a detailed functional
description. The controller’s front panel switches and indicators are
included in the functional description. Additionally, a section on memory
maps is provided at the end of this chapter to familiarize you with the
controller’s memory addresses and the corresponding devices accessed.
All of the controller’s programmable registers that reside in ASICs are
covered in the MVME162LX Embedded Controller Programmer’s
Reference Guide.
Overview
The MVME162LX Embedded Controller is based on the MC68040 or the
MC68LC040 microprocessor. The MC68040 microprocessor has a
floating-point (math) coprocessor and the MC68LC040 does not.
Various versions of the controller contain the following:
❏1 or 4 MB of parity-protected DRAM
❏4, 8, 16, or 32 MB of ECC-protected DRAM
❏128 KB of SRAM (with battery backup)
❏Time of day clock (with battery backup)
❏An optional LAN Ethernet transceiver interface
❏Four serial ports with an EIA-232-D interface
❏Six tick timers with watchdog timer(s)
❏Four EPROM sockets
❏1 MB flash memory (one flash device)
❏Two IndustryPack (IP) interfaces
❏An optional SCSI bus interface with DMA
❏An optional VMEbus interface (local bus to VMEbus/VMEbus to
local bus, with A16/A24/A32, D8/D16/D32 bus widths and a
VMEbus system controller)

1-2 Computer Group Literature Center Web Site
Board Level Hardware Description
1
Input/Output (I/O)signalsare routed through industry standard connectors
on the controller’s front panel. This includes the I/O for the serial ports,
which is provided by four RJ45 connectors.
The VMEbus interface is provided by an ASIC called the VMEchip2. It
contains two tick timers, a watchdog timer, programmable map decoders
for the master and slave interfaces, a VMEbus to/from local bus DMA
controller, a VMEbus to/from local bus non-DMA programmed access
interface, a VMEbus interrupter, a VMEbus system controller, a VMEbus
interrupt handler, and a VMEbus requester.
Processor-to-VMEbus transfers can be D8, D16, or D32. VMEchip2
DMA transfers to the VMEbus, however, can be D16, D32, D16/BLT,
D32/BLT, or D64/MBLT.
The MCchip ASIC provides fourtick timers, theinterface to the LANchip,
SCSI chip, serial port chip, BBRAM, EPROM/Flash, DRAM and SRAM.
The MCECC memory controller ASIC provides the programmable
interface for the ECC-protected 16 MB DRAM mezzanine board.
The IndustryPack Interface Controller (IPIC) ASIC provides control and
status information for up to two single size IndustryPacks (IPs) or one
double size IP that can be plugged into the controller’s PCB.
Related Documentation
The MVME162LX Embedded Controller does not ship with all of the
documentation that is available for the product. Additional (optional)
publications are available for the controller and are listed in Appendix I.
These publications can provide you with additional information about the
product. Instructions on how to obtain them are also provided in
Appendix I.

Introduction
http://www.mcg.mot.com/literature 1-3
1
Models Available
As of the publication date of this manual, the MVME162LX Embedded
Controller is available in a number of models shown in Table 1-1.
Table 1-1. MVME162LX Embedded Controller Models
Model Description
-200 MC68LC040 25 MHz microprocessor, 1 MB DRAM,
128 KB SRAM,1 MB Flash memory, 2 IndustryPack sites
-201 MC68LC040 25 MHz microprocessor, 1 MB DRAM,
128 KB SRAM,1 MB Flash memory, 2 IndustryPack sites, 4 serial ports
-202 MC68LC040 25 MHz microprocessor, 1 MB DRAM,
128 KB SRAM,1 MB Flash memory, 2 IndustryPack sites, 4 serial ports
-210 MC68LC040 25 MHz microprocessor, 4 MB DRAM, 128 KB SRAM,
1 MB Flash memory, 2 IndustryPack sites, 4 serial ports
-211 MC68LC040 25 MHz microprocessor, 4 MB DRAM, 128 KB SRAM,
1 MB Flash memory, 2 IndustryPack sites, 4 serial ports, SCSI
-212 MC68LC040 25 MHz microprocessor, 4 MB DRAM, 128 KB SRAM,
1 MB Flash memory, 2 IndustryPack sites, 4 serial ports, Ethernet
-213 MC68LC040 25 MHz microprocessor, 4 MB DRAM, 128 KB SRAM,
1 MB Flash memory, 2 IndustryPack sites, 4 serial ports, SCSI &
Ethernet
-216 MC68LC040 25 MHz microprocessor, 4 MB DRAM, 128 KB SRAM,
1 MB Flash memory, 2 IndustryPack sites, Ethernet, No VME
-220 MC68040 25 MHz microprocessor, 4 MB DRAM, 128 KB SRAM,
1 MB Flash memory, 2 IndustryPack sites, 4 serial ports
-222 MC68040 25 MHz microprocessor, 4 MB DRAM, 128 KB SRAM,
1 MB Flash memory, 2 IndustryPack sites, 4 serial ports, Ethernet
-223 MC68040 25 MHz microprocessor, 4 MB DRAM, 128 KB SRAM,
1 MB Flash memory, 2 IndustryPack sites, 4 serial ports, SCSI &
Ethernet
-233 MC68LC040 25 MHz microprocessor, 4 MB ECC DRAM,
128 KB SRAM, 1 MB Flash memory, 2 IndustryPack sites, 4 serial ports,
SCSI & Ethernet

1-4 Computer Group Literature Center Web Site
Board Level Hardware Description
1
Document Requirements
The controller is designed to conform to the requirements of the following
documents:
❏ VMEbus Specification (IEEE 1014-87)
❏ EIA-232-D Serial Interface Specification, EIA
❏ SCSI Specification, ANSI
❏ IndustryPack Specification, GreenSpring
-243 MC68040 25 MHz microprocessor, 4 MB ECC DRAM, 128 KB SRAM,
1 MB Flash memory, 2 IndustryPack sites, 4 serial ports, SCSI &
Ethernet
-253 MC68LC040 25 MHz microprocessor, 16 MB ECC DRAM,
128 KB SRAM, 1 MB Flash memory, 2 IndustryPack sites, 4 serial ports,
SCSI & Ethernet
-262 MC68040 25 MHz microprocessor, 16 MB ECC DRAM,
128 KB SRAM, 1 MB Flash memory, 2 IndustryPack sites, 4 serial ports,
Ethernet
-263 MC68040 25 MHz microprocessor, 16 MB ECC DRAM,
128 KB SRAM, 1 MB Flash memory, 2 IndustryPack sites, 4 serial ports,
SCSI & Ethernet
-322 MC68LC040 25 MHz microprocessor, 8 MB ECC DRAM,
128 KB SRAM, 1 MB Flash memory, 2 IndustryPack sites, 4 serial ports,
Ethernet
-323 MC68LC040 25 MHz microprocessor, 8 MB ECC DRAM,
128 KB SRAM, 1 MB Flash memory, 2 IndustryPack sites, 4 serial ports,
SCSI & Ethernet
-333 MC68040 25 MHz microprocessor, 8 MB ECC DRAM, 128 KB SRAM,
1 MB Flash memory, 4 serial ports, SCSI & Ethernet
-353 MC68040 25 MHz microprocessor, 32 MB ECC DRAM,
128 KB SRAM, 1 MB Flash memory, 4IndustryPack sites, 4 serial ports,
SCSI & Ethernet
Table 1-1. MVME162LX Embedded Controller Models (Continued)
Model Description

Introduction
http://www.mcg.mot.com/literature 1-5
1
Available Software
Available software for thecontroller includes the on-board debugger/monitor
firmware, VMEexec driver packages for various IndustryPack modules, and
numerous third-party applications for MC680
x 0-based systems. Contact your
local Motorola sales office or distribution for more information.
Required Equipment
T he following equipment is required to complete an MVME162LX system:
❏ System console terminal
❏ Disk drives and controllers
❏ Operating system
As mentioned earlier, transition modules are unnecessary, as the controller
incorporates industry-standard SCSI, Ethernet, and RJ45 serial connectors on
its front panel.
Features
General features of the MVME162LX Embedded Controller are shown in
the following table:
Feature Description Models
Microprocessor MC68LC040 See Table 1-1
MC68040 See Table 1-1
Memory 1 or 4 MB of parity-protected DRAM See Table 1-1
4, 8, 16, or 32 MB of ECC-protected DRAM See Table 1-1
128 KB of SRAM (with battery backup) All models
1 MB of Flash memory All models
Real-time clock 8KB NVRAM with RTC and battery backup
(SGS-Thomson M48T18) All models
Switches RESET and ABORT All models
Status LEDs Four: FAIL, RUN, SCON, and FUSES All models
Tick timers Four programmable 32-bit timers All models

1-6 Computer Group Literature Center Web Site
Board Level Hardware Description
1
Watchdog timer Provided in MCchip ASIC (VMEchip2) All models
Serial I/O EIA-232-D DTE serial interface with four
serial ports (Zilog Z85230 controller chips) See Table 1-1
SCSI I/O Optional Small Computer Systems Interface
(SCSI) bus interface with 32-bit local bus
burst Direct Memory Access (DMA) (NCR
53C710 controller)
See Table 1-1
Ethernet I/O Optional LAN Ethernet transceiver interface
with 32-bit local bus DMA (Intel 82596CA
controller)
See Table 1-1
IndustryPack
Interfaces 2 or 4 IndustryPack Interface sites See Table 1-1
VMEbus interface
(Optional)
NOTE:
This option is a
factory installed and
cannot be added in
the field.
VMEbus system controller All models
VMEbus requester
VMEbus interrupter
VMEbus interrupt handler
Eight software interrupts
Programmable map decoders for the master
and slave interfaces
VMEbus to local bus interface (A24/A32,
D8/D16/D32 (D8/D16/D32/D64 BLT)
(BLT = Block Transfer)
Local-bus-to-VMEbus interface
(A16/A24/A32, D8/D16/D32)
Two 32-bit programmable Tick Timers and a
programmable Watchdog Timer (in the
VMEchip2 ASIC) for periodic interrupts
Global CSR for interprocessor
communications
DMA for fast local memory - VMEbus
transfers (A16/A24/A32,
D16/D32 [D16/D32/D64 BLT])
Feature Description Models