NXP Semiconductors UM10741 User manual

UM10741
Fm+ development kit OM13320
Rev. 1 — 1 April 2014 User manual
Document information
Info Content
Keywords I2C-bus, Fm+, development tool, PCA9672, PCA9955
Abstract User manual for the Fm+ development board (OM13260) kit (OM13320).

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 2 of 61
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
NXP Semiconductors UM10741
Fm+ development kit OM13320
Revision history
Rev Date Description
1.0 20140401 User manual; initial release

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 3 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
1. Introduction
The Fm+ Development Kit (OM13320) is intended for several different tasks: from a
hands-on introduction, understanding, and use of the I2C-bus (Inter-Integrated Circuit
bus), to I2C device evaluation, and as a simple product demonstration platform (for trade
shows and sales pitches).
The kit has a core Printed-Circuit Board (PCB) assembly, and three add-on PCBs. Other
PCBs are available for advanced use or to support newly-released I2C-bus components
as they are introduced to the market.
The Fm+ Development Kit (OM13320) is supported by a Graphics User Interface (GUI)
software program that runs on a Personal Computer (PC) under the Microsoft Windows 7
Operation System. In some uses the GUI is not required, and the Fm+ Development Kit
(OM13320) can be run as a standalone demonstration, requiring only an external power
adapter (not included).
2. Key features
I2C-bus masters
Self-contained PCB with two independent I2C buses
Bus 1: On-card I2C MCU master (NXP LPC1343)
Bus 2: NXP LPC Xpresso MCU module (not included), and NXP PCA9665 bus
controller
USB interface to on-card MCU (for connection to a PC running the GUI software)
I2C-bus slaves
General Purpose Input/Output (GPIO): PCA9672 (one each on Bus1 and Bus2)
LED driver, with 16 constant current outputs: PCA9955 (with four RGB and four White
LEDs on Bus1)
Accessory sockets
Connectors for up to four daughter cards, each providing power, Bus1 and Bus2 I2C
signals
Connector for the Bus Buffer Board OM13398 (supplied) containing two PCA9617A bus
buffers
Connector for a third-party I2C-bus logger or I2C-bus controller (Beagle and Aardvark,
from Total Phase)
I2C buses
I2C-bus voltage: jumper select 5 V (external) or 3.3 V (on-card 3.3 V regulator)
I2C-bus pull-up resistors: jumper select of ‘high’, ‘med’ or ‘low’ loading

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 4 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
Other features
SPI ports: One for on-card MCU, two more for LPC Xpresso
Serial Com Port: EIA232 with voltage level shifter and connection to the LPC Xpresso
LED blinker: NXP PCA9901 one-wire with on-card LED
INT (Interrupt) and RST (Reset) Bus signal monitor LEDs (buffered)
Logic probe: Utility LEDs (buffered) to monitor signals by user jumper wire connection
External DC input (6 V DC maximum)
Prototype area: Uncommitted 8 ×8 100 mil pitch tie points for end user component
attachment
Test points and ground: for probe attachment to major signals
Connection of both I2C buses together (supplied 2-wire jumper)
3. Fm+ development kit quick tour
3.1 Kit contents
Before using the kit for the first time, please familiarize yourself with the various
components listed in Table 1. See Figure 1.
Remark: Each PCB assembly is shipped in an anti-static bag. After the first use, these
may be discarded to simplify future storage.
a. Top layer b. Bottom layer
Fig 1. Fm+ development kit

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 5 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
3.1.1 Box contents
The Fm+ Development Kit (OM13320) contains four PCB assemblies, cables, and loose
hardware. These should be retained in the box for future access. Depending upon the
desired use, some of the PCB assemblies may be attached to each other, either by plug
connection or by ‘stacking’ the GPIO PCB assemblies above the Fm+ Development
Board (OM13260), using the supplied ribbon cables and hardware.
Table 1. Fm+ development kit contents
Components
Fm+ development board (OM13260)
GPIO target board (OM13303)
PCA9617A bus buffer demo board (OM13398)
Bridge board (OM13399)
Cable, USB Type A to Type B
Ribbon cable, 10 position (bag of two)
Jumper wires with female terminals (bag of ten)
Shorting jumpers (bag of twenty)
Hardware (bag of M3 screws and standoffs)

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 6 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
3.2 Supplied PCB assemblies
There are four PCB assemblies in the kit. Each has a specific function and not all of them
are used at the same time.
3.2.1 Fm+ Development Board (OM13260)
The large PCB, Figure 2, contains two separate I2C-bus structures, together with
supporting circuitry. Each bus has a bus master, one or more bus slaves, and user options
to change the bus voltage and bus pull-up resistors. Adjusting these changes the
operation of the buses to suit various goals. In addition, the two buses may be linked
together to operate a one I2C-bus structure. This can be done with a two-wire jumper
(supplied) or the Bus Buffer Board OM133998 (supplied). See figure 3.5. Four identical
ports provide access for add-on boards that contain additional I2C-bus devices.
Fig 2. OM13260 Fm+ development board PCB assembly

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 7 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
3.2.2 GPIO target board (OM13303)
Outputs from the GPIO devices on the Fm+ Development Board (OM13260), and those
when using GPIO daughter cards (not supplied in the kit), require the GPIO Target Board
(OM13303). Each one has eight channels of LED indicator and push-button switches for
user input. See Figure 3.
3.2.3 PCA9617A bus buffer demo board (OM13398)
Bus buffers bridge two I2C-bus segments, which are provided on the Fm+ Development
Board (OM13260) by Bus1 and Bus2. Bus buffer daughter cards, such as the PCA9617A
Bus Buffer Demo Board (OM13398) (supplied in the kit) can be installed directly on Port E
(CN12). See Figure 4.
Fig 3. OM13303 GPIO target board PCB assembly
Fig 4. OM13260 bus buffer PCB assembly

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 8 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
3.2.4 Bridge board (OM13398)
Some existing Demo Boards used a single row connector with nine pins. To use these
with the Fm+ Development Kit requires the Bridge Board (OM13399, supplied in the kit).
See Figure 5.
3.2.5 Daughter cards (not supplied in the kit)
These are not in the OM13230 kit, and should be obtained separately. Daughter cards
hedge against obsolescence so that the Fm+ Development Kit (OM13320) can be used
with future devices by adding newly released daughter cards as they become available.
An example daughter card is shown in Figure 6.
Fig 5. OM13399 bridge board PCB assembly
Fig 6. Example daughter card PCB assembly

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 9 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
4. First time setup: Fm+ development board kit (OM13320)
4.1 Before you begin
To use the Fm+ Development Kit (OM13320) for the first time requires some hardware
setup and installation of both firmware (on the Fm+ Development Board OM13260) and
software on the attached computer.
The following three steps must be completed:
1. Install Jumpers on the Fm+ Development Board (OM13260) (see Section 4.3).
2. Install Firmware on the Fm+ Development Board (OM13260) (see Section 4.6).
3. Install the NXP GUI Software on the computer to be used with the kit
(see Section 4.7).
4.2 First time setup of the Fm+ development board (OM13260)
Several jumpers must be installed before using the Fm+ Development Board (OM13260)
PCB. The on-board microcontroller (MCU) must contain the appropriate firmware.
To install the firmware requires the connection to a Personal Computer (PC) running
Microsoft Windows 7/64 Operating System and a USB port.
4.3 OM132680 jumpers
The jumpers and their function are shown in Table 2. Using Figure 7 and the table data,
install the jumpers.
Table 2. OM13260 jumpers
Jumper Label Function First time
JP1 XPRESSO POWER Close
JP2 HDD Open
JP3 CONNECT Close
JP4 RST Open
JP5 PCA9955 address GND
JP6 ISP Open
JP7 SPI SEL 1
JP10 PCA9672 address GND
JP11 SDA1 pull-up A
JP12 SCL1 pull-up A
JP13 Bus1 bus voltage 3V3
JP20 PCA9672 address GND
JP21 SDA2 pull-up A
JP22 SCL2 pull-up A
JP23 Bus2 bus voltage 3V3

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 10 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
4.4 OM13260 Port E bypass
Depending up the intended operation of the Fm+ Development Board (OM13260),
Port E (CN12) should be left open, or linked with a jumper wire, or for the attachment of a
Bus Buffer Board. The PCA9617A Bus Buffer Demo Board (OM13398) is supplied in the
kit.
For the purpose of this quick setup section, install the two-wire jumper (supplied) as
shown in Figure 8.
Remark: The two-wire jumper requires a twist, as shown. The diagonally opposite pins
are linked.
Fig 7. OM13260 test point locations

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 11 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
4.5 OM13260 mounting hardware
To prevent damage to the table surface, it is recommended that metal hardware (supplied
in the kit) is installed in the four mounting holes. This raises the PCB assembly about
6mm.SeeFigure 9.
Remark: Save the completed Fm+ Development Board, now install the NXP USB Driver.
Fig 8. OM13260 Port E jumper
Fig 9. OM13260 mounting hardware

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 12 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
4.6 NXP firmware installation
The micro on the Fm+ Development Board needs firmware running on it to interface with
the GUI running on a Windows 7 PC over USB. The board is shipped with a blank
microprocessor, so user action is necessary for proper operation.
An installation user manual UM10785 (Ref. 1) is available at for a complete explanation of
the process. A quick overview is presented here.
1. Download NXP_Fm+_Eval_Board_V1_0_firmware.zip from
www.nxp.com/demoboard/OM13320.html#documentation
2. Connect a USB cable from the PC USB port to CN5.
3. Install the Connect (JP3) jumper to connect the USB communications.
4. Install the ISP (JP6) jumper to put the MCU into In-System Programming mode.
5. Install and then remove RST (JP4) jumper to reset the MCU.
6. The MCU will enumerate on the PC as a disk drive called CRP_DISABLD.
7. Delete the file on the MCU (size may vary — up to 32 kB).
8. Copy the new firmware file NXP_Fm_Eval_Board_V1_0.bin, extracted from the
zip file to the MCU.
9. Remove the ISP (JP6) jumper.
10. Install and then remove RST (JP4) jumper to reset the MCU.
4.7 NXP GUI installation
A Graphical User Interface (GUI) is provided which allows easy manipulation of the
devices included on the Fm+ Development Board and many others that can be connected
to the board via daughter cards.
An installation user manual UM10785 (Ref. 1) is available for a complete explanation of
the process. A quick overview is presented here.
1. Download NXP_Fm_Board_V1_0_Installation.zip from
www.nxp.com/demoboard/OM13320.html#documentation
2. Extract NXP Fm+ Board V1.0 Installation.exe and run.
3. Follow the instruction prompts. Select the default answers.
This GUI uses a USB Human Interface Driver (HID), so no driver installation is required.
If the firmware and GUI installs are successful, an Fm+ Development Board block
diagram is displayed when the GUI executes (Figure 10).

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 13 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
5. Fm+ development board (OM13260)
The Fm+ Development Board (OM13260) PCB assembly is self-contained, requiring only
DC power to operate. Depending upon the firmware installed on the Fm+ Development
Board (OM13260), it can also operate with a connected Personal Computer (PC) via a
USB cable.
The modular design of the kit and this board in particular allows accessory boards to be
easily connected.
5.1 Theory of operation
An I2C-bus requires a Master and one or more Slaves. The two bus signals, clock SCL
and data SDA, are wired-OR and require pull-ups to a DC power supply. Two similar but
separate I2C buses each support one Master and at least one Slave device on the board.
The two buses may be linked by either a Bus Buffer Board (OM13398 supplied in the kit)
or a wire jumper, at the Port E connector (CN12).
The signals from both buses are available simultaneously at each of four connectors,
Port A through Port D (CN1 through CN4, respectively). These are intended for
attachment of accessory daughter cards, which will be made available as future I2C-bus
devices are released.
The size of the pull-up resistors can be changed by moving shorting jumpers (JP1, JP2,
JP11, and JP12), providing selection of ‘Low’ ‘Med’ and ‘High’ resistor values scaled to the
Fm+ I2C-bus drive strength. When both buses are joined by a jumper wire, the pull-ups
are effectively in parallel, and have one-half the stated resistance values.
Operating voltage of the I2C-bus depends upon the shorting jumpers (JP13 and JP23)
that select either 3.3 V or 5 V connected to the pull-up resistors. Compliant I2C-bus
devices can tolerate 5.5 V (maximum), regardless of the device operating voltage.
Fig 10. Fm+ development board bus structure
aaa-012039
PCA9672
8-channel GPIO
Port B
Port E
Port A
PCA9672
8-channel GPIO
I2C-bus 1
I2C-bus 2
5 V
5 V
Port C
Port D
PCA9955
16-channel LED
3.3 V
PULL-UP
RESISTORS
3.3 V
PULL-UP
RESISTORS
I2C-bus 1
PCA9665
BUS
CONTROLLER
LPC1343
MCU
I2C-bus 2
parallel port
LPC
XPresso

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 14 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
Each bus has a GPIO 8-bit Slave device (PCA9672, IC10 and IC20), and Bus 1 also has
an LED Driver 16-channel device (PCA9955, IC6). All sixteen outputs are connected to
LEDs, for visual indication. The 8-bit GPIOs require connection of GPIO Target Boards
(OM13303, supplied in the kit) to both indicate the output using eight LEDs and allow user
input from eight push switches.
An NXP LPC1343 Microcontroller (MCU) serves as both the Bus 1 Master, and the USB
link. The firmware on the MCU can be replaced by the In-System Programming (ISP)
mode, with data sent over the USB link (CN5).
Bus 2 has a Parallel to I2C-bus Controller device (PCA9665, IC6), which is to be driven by
an optional NXP LPC Xpresso module (not supplied). That module is also an I2C Master
and connected to Bus 2.
Remark: Although Bus 2 has more than one I2C Master, only one is active at any time.
The remaining circuitry is to support the I2C devices,and provide communications with the
PC over a USB link.
The main operating voltage on the Fm+ Development Board (OM13260) is 3.3 V supplied
from a linear regulator (IC1). Some circuits and the optional I2C-bus pull-ups may run from
5 V derived either from the USB host (typically a PC) or an AC-DC power supply (not
supplied in the kit). The actual voltage is seldom 5 V, due to cable losses, plus an
additional drop in a series connected diode used to OR the two inputs. Whichever has the
highest voltage has priority.
A shunt Zener diode (6.2 V) protects the board from reverse polarity and overvoltage at
the DC Power connector (CN6).
To aid in understanding digital signal levels on the board, two ‘logic probe’ circuits are
provided. These are buffered LEDs (Green, D6 and Red, D7), which light if their
respective inputs (CN11) are grounded.
Two global digital signal nets, called INT (interrupt) and RST (reset) connect all I2C-bus
devices on the board and also the Port A – Port E Daughter Card connectors. These are
also connected to the Master (MCU, IC5) on Bus 1, the Master (Bus Controller, IC4), and
the LPC Xpresso module.
Remark: The I2C global Reset is not the same as the MCU Reset. Resetting the MCU will
only reset the I2C-bus if the MCU firmware is intended to create a global reset.
The test points provide monitoring of interrupts (usually generated by I2C-bus Slaves) and
software reset of Fm+ class I2C-bus devices that have that feature.
Additional buffered LEDs are provided (D19, RST and D20, Interrupt) on the Fm+
Development Board (OM13260) for visual indication.
Various MCU and LPC Xpresso signals are made available through additional connectors.
These include a serial Port (CN7) with EIA232 voltage level translation (IC2) and SPI Bus
signals (SP0, CN9 and SP1, CN8) from the LPC Xpresso module, together with SPI Bus
(SP2, CN16) from the MCU (IC5).
A prototyping area is provided for solder connection of components that may be required
by an application circuit beyond this board’s design. Power supplies and other signals are
readily available.

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 15 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
On the Fm+ Development Board (OM13260) V3.0 there is an LED Blinker device
(PCA9901, IC3) and LED indicator (D10), while not strictly an I2C device as it uses a
one-wire protocol, it belongs to the NXP I2C-bus product portfolio.
Remark: The PCA9901 will be made obsolete, and will not be present on future versions
of the Fm+ Development Board (OM13260).
The operation of the Fm+ Development Board (OM13260) is greatly enhanced by
third-party tools (not supplied in the kit) that may be attached to either I2C-bus through
dedicated connectors (Bus1, CN17 and Bus2, CN18), labeled ‘TESTER’.
5.2 Circuit description
The schematic diagram has multiple sheets. For clarification, only fragments of the
schematic are shown here. The full schematic should be downloaded if required. The
following pages are divided in to several sections covering the power supply, USB
interface, Bus1, Bus2, and support circuits.
5.2.1 Power supply
The Fm+ Development Board (OM13260) operates from DC, either from the USB Host
connector (CN5) or an optional external AC-DC power adapter (not supplied in the kit) via
connector (CN6). See Figure 11 and Figure 12. Selection of the power source is
automatic, using ORing diodes (D1 and D2). The main power on the Fm+ Development
Board (OM13260) is 3.3 V from a linear regulator (IC1), but some of the circuits are
powered directly from the incoming supply, which is a nominal 5 V. Linear regulator (IC1)
uses the PCB bottom layer copper as a heat sink. The Fm+ Development Board
(OM13260) external DC input is protected against reverse polarity or overvoltage by
Zener diode (D3). Both input sources are scaled by resistor dividers (R1, R2 and R39,
R40) and fed to the MCU (IC5) Port1 ADC inputs for voltage level monitoring. The VBUS
from the USB Host is fed to the MCU Port 0 so that the MCU can detect that a USB
connection is available. Green LED (D4) confirms 5 V, and Green LED (D5) confirms
3.3 V.

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 16 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
Fig 11. Power supply
aaa-011872
VBUS
R2
10 kΩ
R1
10 kΩ
USB_V
GND
R4
10 kΩ
R3
10 kΩ
MCU_VBUS
GND
D2
STPS2L40U
GND
C2
100 pF/10 V
+5V
R5
820 Ω
D4
LTST-C170KGKT GRN
+5 V
5
HS1
PCBPAD
6 7 4 8 9 10
1
23
HS1 HS6 HS5 HS4
ADVTAB
HS3 HS2
IN OUT
GND
IC1
ZLDO1117G33TA
C1
100 pF/10 V
+3V3
R6
820 Ω
D5
LTST-C170KGKT GRN
+3.3 V
GND
3V3 REGULATOR
R40
20 kΩ
R390
10 kΩ
EXT_V
GND
D1
STPS2L40U
Max input 6.2 V DC
GNDGND
EXT POWER
D3
1SMB5920BT3
6V2
CN6
DD-JACK-GMT
Fig 12. Power supply and USB section

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 17 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
5.2.2 USB interface
The USB Host connector (CN5) provides DC power and USB connectivity using the MCU
(IC5) hardware interface, see Figure 12 and Figure 13. USB data lines are terminated by
resistors (R27 and R28) and protected by an ESD network (IC7). To signal to the host that
the USB connection is required, the USB signal DP is pulled to 3.3 V via a resistor (R18)
and a transistor (Q1). USB Connection is controlled by the MCU (IC5) via signal CON_EN
and can be disabled by removing a jumper (JP3) ‘CONNECT’. When the MCU requests a
USB connection, and the jumper (JP3) is installed, the green LED (D9) is ON. MCU
activity is displayed by the Heart Beat green LED (D8), which is set to blink at about
one per second.
5.3 Bus one (Bus1)
There are two almost identical I2C buses on the Fm+ Development Board (OM13260),
called Bus1 and Bus2. These share a ground and power connection but may be operated
independently.
Remark: The bus voltage for each I2C may be different (for example 3.3 V for one
I2C-bus, 5 V for the other I2C-bus).
5.3.1 Bus1 master (MCU LPC1343)
Microcontroller (MCU) (LPC1343, IC5) serves as the Bus1 Master and the USB Bridge.
Firmware installed on the Fm+ Development Board (OM13260) is stored in non-volatile
memory, which has a limit of 32 kB. The MCU may be programmed through the USB port
or the JTAG connector (CN 19), using Single Wire Debug (SWD), see Figure 14 and
Figure 15.
Fig 13. USB interface
+3V3
R17
820 Ω
D9
LTST-C170KGKT GRN
CONNECT
Q1
PDTA123YT
SOFTCONNECT
10 kΩ
2.2 kΩ
R18
1.5 kΩ
JP3-2 JP3-1
VBUS
CN5-3
CN5-2
CN5-1
CN5-4
DP
DM
VBUS
GND
GND
5 6GND
GND
USB PORTUSB INTERFACE
aaa-011873
R20
820 Ω
D8
LTST-C170KGKT GRN
CONFIG
USB_CONNECT
CON_EN
USB_LED
IO1
GND
IO2
VCC
3
4
IC7
PRTR5V0U2X
GND
2
1
33 Ω
33 Ω
R27
R28
USB_DP
USB_Dm
14
13
IC5G$8
LPC134X_HVQFN32

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 18 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
During programming or at other times it may be necessary to reset the MCU, by briefly
shorting JP4 (see Figure 15).
Remark: An MCU Reset is not the same as an I2C Bus Reset. Resetting the MCU will not
affect the I2C-bus, unless the MCU firmware is designed to issue an I2C Bus Reset when
it is reset.
MCU Port0 and Port1 provide most of the signals used by the Fm+ Development Board
(OM13260), see Figure 16 and Figure 17. I2C Bus1 is connected to the MCU Port0 via
RC edge rate control networks that provide bus fall time control (SCL1: R42 and C18;
SDA1: R43 and C17).
Fig 14. MCU SWD interface
Fig 15. MCU SWD interface section
aaa-011874
R38
10 kΩ
JP4-1
LPC SWD PROG CONNECTOR
R37
100 kΩ
JP4-2
RST
GND
+3V3+3V3
GND
MCU_SCLK
SWDIO
SWD_RESET
CN19-10
CN19-9
CN19-8
CN19-7
CN19-6
CN19-5
CN19-4
CN19-3
CN19-2
CN19-1

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 19 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
The HVQN32 package has a thermal pad ground connection, and operates from the main
3.3 V supply. The MCU operates with a 12.00 MHz crystal controlled oscillator. The
frequency value and accuracy is necessary for correct USB timing (see Figure 18).
Fig 16. IC5 MCU Port0
Fig 17. IC5 MCU Port1
aaa-011875
LPC134X_HVQFN32
IC5G$1
2
3
8
9
10
11
15
16
17
18
19
21
SWD_RESET
MCU_SSN
MCU_VBUS
SCL1A
SDA1A
CON_EN
USB_LED
MCU_MISO
MCU_MOSI
MCU_SCLK
INT TF EDGE RATE CONTROL
GND
C17
10 pF
GND
C18
10 pF
SCL1
SDA1
+3V3
R33
10 kΩ
100 Ω
100 Ω
R43
R42
GND
JP6-1
JP6-2
ISP
RESET/PIO0_0
PIO0_1/CLKOUT/CT32B0_MAT2/USB_TOGGLE
PIO0_2/SSP_SSEL/CT16B0_CAP0
PIO0_3/USB_VBUS
PIO0_4/I2C_SCL
PIO0_5/I2C_SDA
PIO0_6/USB_CONNECT/SCK
PIO0_7/CTS
PIO0_8/SSP_MISO/CT16B0_MAT0
PIO0_9/SSP_MOSI/CT16B0_MAT1/SWD
SWCLK/PIO0_10/SSP_CLK/CT16B0_MAT2
R/PIO0_11/ADC0/CT32B0_MAT3
aaa-011876
LPC134X_HVQFN32
IC5G$2
22
23
24
25
26
30
31
32
7
12
20
27
EXT_V
USB_V
SWDIO
RESET
+3V3
R41
10 kΩ
GND
JP2-1
JP2-2
HDD
R/PIO1_0/ADC1/CT32B1_CAP0
R/PIO1_1/ADC2/CT32B1_MAT0
R/PIO1_2/ADC3/CT32B1_MAT1
SWDIO/PIO1_3/ADC4/CT32B1_MAT2
PIO1_4/ADC5/CT32B1_MAT3/WAKEUP
PIO1_5/UART_RTS/CT32B0_CAP0
PIO1_6/UART_RXD/CT32B0_MAT0
PIO1_7/UART_TXD/CT32B0_MAT1
PIO1_8/CT16B0_CAP0
PIO1_9/CT16B1_MAT0
PIO1_10/ADC6/CT16B1_MAT1
PIO1_11/ADC7
LPC134X_HVQFN32
IC5G$4
28
PIO3_2
LPC134X_HVQFN32
IC5G$3
1
PIO2_0/UART_DTR

UM10741 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
User manual Rev. 1 — 1 April 2014 20 of 61
NXP Semiconductors UM10741
Fm+ development kit OM13320
5.3.2 Bus1 pull-up resistors
The Bus1 is pulled up to either the 3.3 V or 5 V supplies via JP13. Three different value
pull-up resistors are provided by jumper selection, JP11 and JP12. The values of the
pull-up resistors are shown in Table 3. Separate pull-ups are provided for the SCL and
SDA signal lines. Bus2 has a similar arrangement. See Figure 19 and Figure 20.
Fig 18. IC5 MCU Port1, oscillator and power supply
aaa-011877
LPC134X_HVQFN32
IC5G$7
41
40
39
38
37
36
35
34
33
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
GND
6
29
VDDIO_EXT_1
VDDMAIN_EXT
IC5G$6
LPC134X_HVQFN32
GND
C9
100 nF
GND
C6
100 nF
+3V3
4
5
XTALIN
XTALOUT
IC5G$5
LPC134X_HVQFN32
GND
C7
15 pF
NX5032GA
GND
C8
15 pF
12 MHz
XE1
Fig 19. Bus1 pull-ups and bus voltage selector
aaa-011878
I2C BUS-1 PULL-UP RESISTOR NETWORK
GND
C10
100 nF
JP13-3
JP13-2
JP13-1
+3V3
+5V
1.1 kΩ
R16
634 Ω
R15
324 Ω
R14
1.1 kΩ
R13
634 Ω
R12
324 Ω
R11
JP12-2
JP12-4
JP12-6
JP11-2
JP11-4
JP11-6
JP12-1
JP12-3
JP12-5
JP11-1
JP11-3
JP11-5
SCL1
SDA1