Panasonic KX-NCP500GR User manual

© Panasonic Communications Co., Ltd. 2008.
Unauthorized copying and distribution is a violation
of law.
ORDER NO. KMS0810593CE
Pure IP-PBX
Model No. KX-NCP500GR
(for Greece)

2
KX-NCP500GR
TABLE OF CONTENTS
PAGE PAGE
1 Safety Precautions -----------------------------------------------4
1.1. For Service Technicians ---------------------------------4
1.2. Insulation Resistance Test -------------------------------4
2Warning--------------------------------------------------------------4
2.1. Battery Caution ---------------------------------------------4
2.2. Caution--------------------------------------------------------4
2.3. About Lead Free Solder (PbF: Pb free) --------------5
2.3.1. Suggested PbF Solder -------------------------------5
2.3.2. Information for Users on Collection and
Disposal of Old Equipment and used
Batteries -------------------------------------------------6
2.4. Discarding of P. C. Board --------------------------------6
3 Specifications ------------------------------------------------------7
3.1. General Description ---------------------------------------7
3.2. Characteristics ----------------------------------------------7
4 Technical Descriptions------------------------------------------8
4.1. IPCMPR Block Diagram----------------------------------8
4.2. Power Supply Block Diagram ------------------------- 12
4.3. IPCMPR Card Circuit Operation --------------------- 13
4.3.1. IPCMPR Card ---------------------------------------- 13
4.3.2. Description of Each Part--------------------------- 14
4.3.3. Circuit Description----------------------------------- 15
4.4. Back Board Circuit Operation ------------------------- 18
4.5. Outline ------------------------------------------------------ 19
4.5.1. General Description--------------------------------- 19
4.5.2. IPCMPR Card ---------------------------------------- 19
4.5.3. Back Board-------------------------------------------- 19
4.5.4. Power Supply Unit ---------------------------------- 19
4.5.5. System Control--------------------------------------- 20
4.5.6. Back Board Signal Connection Diagram ------ 23
4.6. Power Supply Unit Circuit Operation---------------- 26
4.6.1. AC Section and Rectifier Circuit ----------------- 26
4.6.2. Main Converter--------------------------------------- 27
4.6.3. Output Voltage Section ---------------------------- 28
4.6.4. Alarm Signal Transmission Section------------- 30
4.6.5. Protective Circuit Operation Section------------ 31
5 Location of Controls and Components------------------ 32
5.1. Name and Locations ------------------------------------ 32
6 Installation Instructions--------------------------------------- 33
6.1. System Components ------------------------------------ 33
6.1.1. System Connection Diagram --------------------- 35
7 Operating Instructions ---------------------------------------- 37
7.1. Type and Maximum Number of Slots --------------- 37
7.2. Maximum Optional Service Cards ------------------- 38
7.3. Maximum CO Lines and Extensions ---------------- 39
7.4. Maximum Terminal Equipment ----------------------- 39
7.5. Power Supply Unit Capacity--------------------------- 40
8 Test Mode---------------------------------------------------------- 41
8.1. Utility--------------------------------------------------------- 41
8.1.1. Utility-Diagnosis-------------------------------------- 41
9 Troubleshooting Guide---------------------------------------- 53
9.1. IPCMPR Card--------------------------------------------- 53
9.1.1. Startup-------------------------------------------------- 53
9.1.2. Phone Call -------------------------------------------- 62
9.1.3. Paging-------------------------------------------------- 64
9.1.4. Using MOH-------------------------------------------- 66
9.1.5. LAN ----------------------------------------------------- 68
9.1.6. ESVM--------------------------------------------------- 69
9.1.7. RS-232C ---------------------------------------------- 71
9.1.8. SD card IF -------------------------------------------- 72
9.1.9. Other --------------------------------------------------- 73
9.2. Power Supply--------------------------------------------- 74
9.2.1. Total output voltage not output 1 (Main
converter output voltage error [C101/
C201])-------------------------------------------------- 74
9.2.2. Total output voltage not output 2 (Main
converter output voltage normal [C101/
C201])-------------------------------------------------- 76
9.2.3. 15VPT/41V output voltage not output (15V
only output) ------------------------------------------- 77
9.2.4. 15VPT output voltage only not output --------- 78
9.2.5. 41V output voltage only not output ------------- 79
10 Service Fixture & Tools--------------------------------------- 80
10.1. Extension Boards for Servicing ---------------------- 80
11 Disassembly and Assembly Instructions -------------- 81
11.1. IPCMPR Card -------------------------------------------- 81
11.2. Back Board------------------------------------------------ 82
11.3. Power Supply Board ------------------------------------ 84
12 Miscellaneous --------------------------------------------------- 85
12.1. How To Replace a Flat Package IC----------------- 85
12.1.1. Preparation ------------------------------------------- 85
12.1.2. Removal Procedure -------------------------------- 85
12.1.3. Procedure--------------------------------------------- 85
12.1.4. Removing Solder From Between Pins--------- 85
12.2. Terminal Guide of the ICs Transistors and
Diodes ------------------------------------------------------ 86
12.2.1. IPCMPR Card---------------------------------------- 86
12.2.2. LED Board -------------------------------------------- 86
12.2.3. Power Supply Board ------------------------------- 87
13 Schematic Diagram -------------------------------------------- 88
13.1. Block Diagram-------------------------------------------- 88
13.2. IPCMPR Card No.1 ------------------------------------- 90
13.3. IPCMPR Card No.2 ------------------------------------- 92
13.4. IPCMPR Card No.3 ------------------------------------- 94
13.5. IPCMPR Card No.4 ------------------------------------- 96
13.6. IPCMPR Card No.5 ------------------------------------- 98
13.7. IPCMPR Card No.6 ------------------------------------100
13.8. IPCMPR Card No.7 ------------------------------------102
13.9. IPCMPR Card No.8 ------------------------------------104
13.10. IPCMPR Card No.9 ------------------------------------106
13.11. IPCMPR Card No.10-----------------------------------108
13.12. IPCMPR Card No.11----------------------------------- 110
13.13. IPCMPR Card No.12----------------------------------- 112
13.14. IPCMPR Card No.13----------------------------------- 114
13.15. IPCMPR Card No.14----------------------------------- 116
13.16. IPCMPR Card No.15----------------------------------- 118
13.17. IPCMPR Card No.16-----------------------------------120
13.18. Back Board-----------------------------------------------121
13.18.1. No.1 ---------------------------------------------------121
13.18.2. No.2 ---------------------------------------------------123
13.18.3. No.3 ---------------------------------------------------125
13.19. LED Board------------------------------------------------126
13.20. Power Supply Board -----------------------------------127
13.21. Waveform-------------------------------------------------128
14 Printed Circuit Board-----------------------------------------130
14.1. IPCMPR Card -------------------------------------------130

3
KX-NCP500GR
14.1.1. Component ---------------------------------------- 130
14.1.2. Bottom View---------------------------------------- 131
14.2. Back/LED Board --------------------------------------- 132
14.2.1. Component View (A)----------------------------- 132
14.2.2. Component View (B)----------------------------- 133
14.2.3. Component View (C), (D)----------------------- 133
14.3. Power Supply Board---------------------------------- 134
14.3.1. Component View---------------------------------- 134
14.3.2. Bottom View---------------------------------------- 135
15 Appendix Information of Schematic Diagram ------ 136
16 Exploded View and Replacement Parts List -------- 137
16.1. IC Data --------------------------------------------------- 137
16.1.1. IC101 ------------------------------------------------ 137
16.2. Cabinet and Electrical Parts Location ------------ 145
16.3. Accessories and Packing Material ---------------- 146
16.4. Replacement Parts List ------------------------------ 147
16.4.1. Cabinet and Electrical Parts Location ------- 147
16.4.2. Accessories and Packing Materials ---------- 147
16.4.3. IPCMPR Card Parts------------------------------ 147
16.4.4. Back/LED Board Parts--------------------------- 155
16.4.5. Power Supply Board Parts --------------------- 156
16.4.6. Tools ------------------------------------------------- 159

4
KX-NCP500GR
1 Safety Precautions
1.1. For Service Technicians
• Repair service shall be provided in accordance with repair technology information such as service manual so as to prevent fires,
injury or electric shock, which can be caused by improper repair work.
1. When repair services are provided, neither the products nor their parts or members shall be remodeled.
2. If a lead wire assembly is supplied as a repair part, the lead wire assembly shall be replaced.
3. FASTON terminals shall be plugged straight in and unplugged straight out.
• ICs and LSIs are vulnerable to static electricity.
When repairing, the following precautions will help prevent recurring malfunctions.
1. Cover plastic parts boxes with aluminum foil.
2. Ground the soldering irons.
3. Use a conductive mat on worktable.
4. Do not grasp IC or LSI pins with bare fingers.
1.2. Insulation Resistance Test
1. Unplug the power cord and short the two prongs of the plug with a jumper wire.
2. Turn on the power switch.
3. Measure the resistance value with ohmmeter between the jumpered AC plug and each exposed metal cabinet part, such as
screw threads, control shafts, handle brackets, etc.
Note:
Some exposed parts may be isolated from the chassis by design. These will read infinity.
4. If the measurement is outside the specified limits, there is a possibility of shock hazard. The equipment should be repaired
and rechecked before it is returned to the customer.
2Warning
2.1. Battery Caution
1. Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the
manufacturer. Dispose of used batteries according to the manufacturer's lnstructions.
2. The lithium battery is a critical component (type No.CR23541). Please observe for the proper polarity and the exact location
when replacing it and soldering the replacement lithium battery in.
2.2. Caution
The power socket wall outlet should be located near this equipment and be easily accessible.

5
KX-NCP500GR
2.3. About Lead Free Solder (PbF: Pb free)
Note:
In the information below, Pb, the symbol for lead in the periodic table of elements, will refer to standard solder or solder that con-
tains lead.
We will use PbF when discussing the lead free solder used in our manufacturing process which is made from Tin, (Sn), Silver,
(Ag), and Copper, (Cu).
This model, and others like it, manufactured using lead free solder will have PbF stamped on the PCB. For service and repair
work we suggest using the same type of solder.
Caution
• PbF solder has a melting point that is 50°~ 70°F, (30°~ 40°C) higher than Pb solder. Please use a soldering iron with tempera-
ture control and adjust it to 700°± 20°F, (370°± 10°C).
Exercise care while using higher temperature soldering irons.:
Do not heat the PCB for too long time in order to prevent solder splash or damage to the PCB.
• PbF solder will tend to splash if it is heated much higher than its melting point, approximately 1100°F, (600°C).
• When applying PbF solder to double layered boards, please check the component side for excess which may flow onto the
opposite side (See figure, below).
2.3.1. Suggested PbF Solder
There are several types of PbF solder available commercially. While this product is manufactured using Tin, Silver, and Copper,
(Sn+Ag+Cu), you can also use Tin and Copper, (Sn+Cu), or Tin, Zinc, and Bismuth, (Sn+Zn+Bi). Please check the manufac
turer's specific instructions for the melting points of their products and any precautions for using their product with other
materials.
The following lead free (PbF) solder wire sizes are recommended for service of this product: 0.3mm, 0.6mm and 1.0mm.

6
KX-NCP500GR
2.3.2. Information for Users on Collection and Disposal of Old Equipment and used Bat-
teries
2.4. Discarding of P. C. Board
When discarding P. C. Board, delete all personal information such as telephone directory and caller list or scrap P. C. Board.

7
KX-NCP500GR
3 Specifications
3.1. General Description
3.2. Characteristics
Control Bus Original bus (16 bit, 8 MHz,10 megabytes per second)
Communication Bus H.100 bus conformity (1024 time slot)
Switching Non-blocking
Power Input 100 V AC to 130 V AC; 1.0 A/200 V AC to 240 V AC; 0.6 A; 50Hz/60 Hz
Power Consumption (when fully mounted) 51 W (240 V: 122 VA, 200 V: 113 VA, 130 V: 100 VA, 100 V: 92 VA)
Maximum Power Failure Tolerance 300 ms
Memory Backup Duration 7 years
Dialling Trunk Dial Pulse (DP) 10 pps, 20 pps
Tone (DTMF) Dialling
Extension Dial Pulse (DP) 10 pps, 20 pps
Tone (DTMF) Dialling
Mode Conversion DP-DTMF, DTMF-DP
Ring Frequency 20 Hz/25 Hz (selectable)
Trunk Loop Limit 1600 Ωmaximum
Operating Environment Temperature 0 °C to 40 °C
Humidity 10%to 90%
Conference Call Trunk From 10 x 3-party conference call to 4 x 8-party conference call
Music on Hold (MOH) 1 port (Level Control: -6 dB to +6 dB per 3 dB)
MOH1: Selectable Internal/External Music Source port
Paging Internal Level Control: -6 dB to +3 dB per 3 dB
External 1 port (Volume Control: -15 dB to +6 dB per 3 dB)
Serial Interface Port RS-232C 1 (max 115.2 kbps)
RJ45 Port MNT Port 1 (for PC connection)
LAN Port 1 (for LAN connection)
Extension Connection Cable SLT 1 pair wire (T, R)
DPT 1-pair wire (D1, D2) or
2-pair wire (T, R, D1, D2)
APT 2-pair wire (T, R, D1, D2)
PT-interface CS 1-pair wire (D1, D2)
PT-interface CS (High-density) 4-pair wire (D1, D2)
DSS Consoles and Add-on Key Module 1-pair wire (D1, D2)
Dimension 430 mm (W) x 88 mm (H) x 340 mm (D)
(17 in x 3 1/2 in x 13 3/8 in)
Weight (when fully mounted) Under 7 kg (15.4 lb.)
Terminal Equipment Loop Limit • PT: KX-DT300/KX-T7600 series DPT: 90 Ω; all other DPTs/APTs:40 Ω
• SLT: 600 Ωincluding set
• Doorphone: 20 Ω
•CS:65Ω
Minimum Leakage Resistance 15000 Ωmaximum
Maximum Number of Extension
Instruments per Line
1 for PT or SLT
2 by Parallel or eXtra Device Port connection of an APT/DPT and an SLT
3 by Digital eXtra Device Port connection of 2 DPTs and an SLT
Ring Voltage 75 Vrms at 20 Hz/25 Hz depending on the Ringing Load
Trunk Loop Limit 1600 Ωmaximum
Hookswitch Flash/Recall Timing Range 24 ms to 2032 ms
BRI Cards Internal ISDN Mode Supply Voltage: 40 V
Power Supply (BRI2): 4.5 W per 1 line, 9 W per 2 lines
Power Supply Method: Phantom Power Supply
Door Opener Current Limit 24 V DC/30 V AC, 1 A maximum
External Relay Current Limit 24 V DC/30 V AC, 1 A maximum
External Sensor Current Limit Power to the external sensor is provided from the EIO4 card and must be grounded through
the EIO4 card. For the connection diagram, refer to EIO4 Card (KX-TDA0164). The PBX
detects input from the sensor when the signal is under 100Ω.
Paging Terminal Impedance 600 Ω
MOH (Music on Hold) Terminal Impedance 10000 Ω

8
KX-NCP500GR
4 Technical Descriptions
4.1. IPCMPR Block Diagram
KX-NCP500GR IPCMPR CARD
BLOCK DIAGRAM No.1
Local Highway 0ch
Back Board
Connector
RS232C
D/R
EC-bus
CT-bus
16bit 16bit
16bit 16bit
LAN
Controller
SDRAM
32M x 16
64MB
32bit
32bit
16bit
VoIPDSP
SRAM
1M x 6
1chip
2MB
CS4
FLASH
512K x 16
1chip
1MB
CS0
DDR SDRAM
512Mbit
(32M x 16)
2chip
128MB
SD_ACCESS_
_LED
BATT_ALARM
PHY
16bit
100Base TX
PCI bus
Serial
5 port LAN SW
100Base TX
SPI
/ RTC
bus
Serial
CPU
SH7780
SD
CARD
Connector
SD
Controller
CS6
MEC
I/F
8bit
FPGA
(POWER_LED_
CONTROLLER
RTC_
CONTROLLER
SPI_ CONTROLLER
Highway Buffer
LED_DRIVER
NEXUS-SRAM_I/F)
CS1 RMT
Connector
ASIC
CS5
CODEC
1chip
Melody
1chip
Buffered Local Highway 0ch
1ch
RTC
8bit
ESVM (DSP)
CS1
100Base TX
RJ45_CON
(TRANS)
ETHER_LED x 2
RJ45_CON
(TRANS)
100Base TX
PORT 2 PORT 1
EPGMOH
RESET
BUTTOM
INITIAL
SW
IC101
SW101
SW102
IC602
IC601,603
CN601
IC801
IC804,805
IC802
D801,802
IC1002
IC1101
JK1102 JK1103
IC1201
CN1201
IC1202
IC1301
IC1303
CN1301
IC1502
IC1505
JK1503JK1502
CN1601
CN1701
_LED
1
5
23
4
ETHER_LED x 2

9
KX-NCP500GR

10
KX-NCP500GR
+3.3VD
RS232_nDCD2
RS232_nDSR2
RS232_nDTR2
RS232_nRXD2
RS232_nTXD2
RS232_nCTS2
RS232_nRTS2
SD0_nDRQ
SD0_nDACK
MCCLK
MCCMD
MCDAT
EX1_D[0-15]
nBREQ
CMT_CTR0
nRDY
DG
+3.3VD
nCS0_FLASH
SD0_CD
SD0_WP
AD[0-31]
PCI_PAR
PCI_nCBE3
PCI_nCBE2
PCI_nCBE1
PCI_nCBE0
PCI_nDEVSEL
PCI_nFRAME
PCI_nIRDY
PCI_nLOCK
PCI_nPERR
PCI_nSERR
PCI_nSTOP
PCI_nTRDY
PCI_CLK0
PCI_IDSEL0
PCI_nGNT0
PCI_nREQ0
PCI_CLK1
PCI_IDSEL1
PCI_nGNT1
PCI_nREQ1
PCI_nINT_A
PCI_nINT_B
PCI_nINT_C
PCI_CLK2
PCI_IDSEL2
PCI_nGNT2
PCI_nREQ2
PCI_CON_CARD_ID1
PCI_CON_CARD_ID0
VOIP_CARD_ID1
VOIP_CARD_ID0
BA1
MDQM0 MDQS2
BA0
MDQM2 MDQS1 nMRAS
MDA[0-31]
MDQS3
+3.3VD_B
MDQM3
MA[0-13]
CKE
+3.3VD
MCLK0_159.984MHz
nMCLK1_159.984MHz
nBKPREST
nMWE nMCS
nMCAS MDQM1 MDQS0
EX1_A[0-25]
nCS1_FPGA
IREQ4_FPGA
PLD_TDI
PLD_TMS
PLD_TDO
PLD_TCK
nCS2_BM
RnW
nBS
SRAM_nWE
SRAM_nBC1
SRAM_nBC0
SRAM_nCS
nRD
nWE1
FLASH_READY_INT
FLASH_nWE0
FLASH_nRD
FLASH_nCS
MEMORY_CARD_ID1
MEMORY_CARD_ID0
MEMORY_nCS1
MEMORY_nCS0
HARD_nRESET_SW
+2.5VD
+1.25VD
DG
+3.3VD
FLASH_nBYTE
DRAM_VREF
+1.2VD
+3.3VD
DG
DG
+3.3VD_B
+2.5VD
+2.5VD
CLK_PCI_33.33MHz
PCI_nRESET
PCI_nRESET
LAN_TX_XP_4
LAN_TX_XM_4
LAN_RX_XP_4
DG
+3.3VD
LAN_RX_XM_4
DG
+3.3VD
DG
DG
+3.3VD
+3.3VD
LAN_nRESET_SOFT
VOIP_nRESET_SOFT
PCI_CON_nRESET_SOFT
LAN_SW_nRESET_SOFT
SPIC
SPID
SPIQ
nSPIS
CLK_25MHz
nCS6_SD
nWE0
DG
FLASH_nW_PROTECT
BM_nPRESNT
BM_nRESET_SOFT
BM_nBUSY
+2.5VD
+1.8VD
nCS4_SRAM
nCS5_NEXUS
nBACK
nIREQ1_RESET_SW
nIRQ0_NEXUS
nIREQ2_BM
nIREQ3_DC_ALARM
nIRQ5_AC_ALARM
nIRQ6_FAN_ALARM
nIREQ7_SD
+2.5VD
PLD_nCE
PROG_B
LAN_RX_XM_5
LAN_RX_XP_5
LAN_TX_XM_5
LAN_TX_XP_5
INIT_B
CPU_nRESET
FG
FG
CL3068
CL3063 CL3055 CL3064 CL3052
CL3001
CL3058 CL3056 CL3059 CL3054 CL3079
DG
CL3062 CL3053 CL3067 CL3066 CL3057 CL3060
DG
DG
CL3061 CL3065
@bloc
BLOCK2
+3.3VD
DG
+1.25VD
+2.5VD
CLKIO_66.66MHz
CLK_32.768kHz
DRAM_VREF
@bloc
BLOCK14
NC
DG
+3.3VD
BM_nCS
BM_nIRQ
BM_nPRESNT
BM_nBUSY
BM_nRESET_SOFT
EX1_A[0-25]
EX1_D[0-15]
RnW
nBS
nRD
nWE0
nWE1
DG
DG
DG
DG
DG
TP_CLK_25MHz
CL3094
CL3073
CL3072
CL3071
CL3070
CL3069
CL3074
CL3075
CL3076
CL3077
CL3078
CL3049
CL3040
CL3048
CL3045
CL3051
CL3042
CL3047
CL3043
CL3046
CL3050
CL3044
CL3041
CL3038
CL3037
CL3039
CL3036
CL3035
CL3033
CL3031
CL3032
CL3030
CL3028
CL3029
CL3023
CL3025
CL3024
CL3034
CL3022
CL3020
CL3021
CL3026
CL3027
@bloc
BLOCK11
AD[0-31]
PCI_CLK
PCI_IDSEL
PCI_PAR
PCI_nCBE3
PCI_nCBE2
PCI_nCBE1
PCI_nCBE0
PCI_nDEVSEL
PCI_nFRAME
PCI_nGNT
PCI_nINT_A
PCI_nIRDY
PCI_nPERR
PCI_nREQ
PCI_nRST
PCI_nSERR
PCI_nSTOP
PCI_nTRDY
PCI_nLOCK
LAN_TX_XP
LAN_RX_XP
LAN_TX_XM
LAN_RX_XM
HW_CLK
HW_FH
LDHW0
LDHW1
LUHW0
LUHW1
PCI_nINT_B
PCI_nINT_C
CARD_ID0
CARD_ID1
DG
+3.3VD
@bloc
BLOCK12NC
AD[0-31]
PCI_CLK
PCI_IDSEL
PCI_PAR
PCI_nCBE3
PCI_nCBE2
PCI_nCBE1
PCI_nCBE0
PCI_nDEVSEL
PCI_nFRAME
PCI_nGNT
PCI_nINT_A
PCI_nIRDY
PCI_nPERR
PCI_nREQ
PCI_nRST
PCI_nSERR
PCI_nSTOP
PCI_nTRDY
PCI_nLOCK
LAN_TX_XP
LAN_RX_XP
LAN_TX_XM
LAN_RX_XM
HW_CLK
HW_FH
LDHW0
LDHW1
LUHW0
LUHW1
PCI_nINT_B
PCI_nINT_C
CARD_ID0
CARD_ID1
DG
+3.3VD
CL3141 CL3142
CL3085
CL3081
CL3082
CL3080
CL3084
CL3089
CL3091
CL3087
CL3088
CL3090
CL3086
CL3083
CL3129
CL3135
CL3130
CL3125
CL3131
CL3106
CL3114
CL3136
CL3108
CL3111
CL3096
CL3123
CL3122
CL3133
CL3107
CL3128
CL3112
CL3103
CL3110
CL3118
CL3120
CL3113
CL3099
CL3119
CL3101
CL3124
CL3127
CL3102
CL3132
CL3126
CL3121
CL3109
CL3100
CL3134
CL3115
CL3105
CL3098
CL3097
CL3137
CL3095
CL3104
CL3116
CL3117
TP_CLK_32.768kHz
DG
TP_DG_1
TP_DG_2
TP_DG_3
TP_DG_4
TP_DG_5
TP_DG_10
TP_DG_8
TP_DG_9
TP_DG_7
TP_DG_6
CL3002
CL3003
CL3004
CL3005
CL3140
CL3205
CL3206
@bloc
BLOCK5
+3.3VD
AD[0-31]
DG
PCI_CLK1
PCI_IDSEL1
PCI_PAR
PCI_nCBE3
PCI_nCBE2
PCI_nCBE1
PCI_nCBE0
PCI_nDEVSEL
PCI_nFRAME
PCI_nGNT1
PCI_nINT1
PCI_nIRDY
PCI_nPERR
PCI_nREQ1
PCI_nRST
PCI_nSERR
PCI_nSTOP
PCI_nTRDY
CLK_25MHz
LAN_RX_XM
LAN_RX_XP
LAN_TX_XM
LAN_TX_XP
CL3006
CL3009
CL3007
CL3008
CL3010
@bloc
BLOCK3
MCLK0_159.984MHz MDQM3 MDQM2 MDQM1 MDQM0
EX1_A[0-25]
EX1_D[0-15]
nMWE
FLASH_nBYTE
FLASH_nCS
nMRAS
nRD
SRAM_nRESET
+3.3VD
DG
FLASH_nW_PROTECT
MA[0-13] MDA[0-31] BA1 BA0 nMCLK1_159.984MHz CKE MDQS3 MDQS2 MDQS1 MDQS0 nMCAS nMCS
nBKPRST
+2.5VD
DRAM_VREF
MEMORY_nCS0
+3.3VD_B
SRAM_nBC1
SRAM_nBC0
SRAM_nWE
MEMORY_CARD_ID0
MEMORY_nCS1
FLASH_nRD
FLASH_nWE0
FLASH_READY_INT
MEMORY_CARD_ID1
MEMORY_CARD_PRESNT
FLASH_nRESET
@bloc
BLOCK1
AD[0-31]
CKE
MCLK0_159.984MHz
CLK_PCI_33.33MHz
MDQS3 MDQS2 MDQS1 MDQS0
EX1_A[0-25]
EX1_D[0-15]
PCI_IDSEL2
PCI_IDSEL1
PCI_IDSEL0
PCI_PAR
PCI_nCBE3
PCI_nCBE2
PCI_nCBE1
PCI_nCBE0
PCI_nDEVSEL
PCI_nFRAME
PCI_nGNT2
PCI_nGNT1
PCI_nGNT0
PCI_nIRDY
PCI_nLOCK
PCI_nPERR
PCI_nREQ2
PCI_nREQ1
PCI_nREQ0
PCI_nRST
PCI_nSERR
PCI_nSTOP
PCI_nTRDY
SCIF0_RXD
SCIF0_TXD
SCIF0_nCTS
SCIF0_nRTS
SD0_DACK
SD0_nDRQ
nBACK
nBREQ
nCS0
nCS2
nCS4
nIRQ3
nIRQ2
nIRQ1
nIRQ0
nMRAS
nRD
nRDY
nWE1
nWE0
+3.3VD
DG
SD0_WP
SD0_CD
nCS1
nCS5
nCS6
PCI_CLK1
PCI_CLK2
PCI_CLK0
CONF_DONE
DCLK
ASDI
nCS
DATA
nCONFIG
nCE
PCI_nINT_A
PCI_nINT_B
PCI_nINT_C
MDQM3 MDQM2 MDQM1 MDQM0
nMCLK1_159.984MHz
nIRQ4
nIRQ5
nIRQ6
nIRQ7
BA0 BA1
MA[0-13]
MDA[0-31]
nMCS
nMWE
nMCAS
nBS
nBKPRST
CPU_nRESET
MCCMD
MCCLK
MCDAT
CMT_CTR0
HARD_nRESET_SW
PCI_CON_CARD_ID1
PCI_CON_CARD_ID0
VOIP_CARD_ID1
VOIP_CARD_ID0
nDSR
nDTR
nDCD
nW_PROTECT
RnW
BM_nPRESNT
PROG_B
FG
FG
@bloc
BLOCK6
+3.3VD
DG
nRESET
LAN_TX_XP_4
LAN_RX_XP_4
LAN_TX_XM_4
LAN_RX_XM_4
SPIQ
SPIC
SPID
nSPIS
CLK_25MHz
+1.8VD
+2.5VD
LAN_TX_XP_5
LAN_RX_XP_5
LAN_TX_XM_5
LAN_RX_XM_5
FG
FG
TP_DG_102
TP_DG_103
TP_DG_106
TP_DG_101
TP_DG_104
TP_DG_105
TP_CPU_nRESET
TP_CLKIO_66.66MHz
+3.3VD
+1.25VD
+3.3VD
+2.5VD
+3.3VD
+3.3VD
+3.3VD
+3.3VD_B
+3.3VD
+2.5VD
+2.5VD +3.3VD_B
+3.3VD
+2.5VD
+3.3VD
+2.5VD
+1.2VD
+3.3VD
+1.8VD
CLK_PCI_33.33MHz
SRAM_nBC1
SRAM_nBC0
SRAM_nWR
INIT_B
+3.3VD_B
DG
+1.2VD
VOIP_nRESET_SOFT
LAN_nRESET_SOFT
PCI_CON_nRESET_SOFT
PCI_nRESET
LAN_SW_nRESET_SOFT
SPIC
SPID
SPIQ
nSPIS
MEMORY_nCS0
MEMORY_nCS1
SRAM_nCS
+2.5VD
+3.3VD
MEMORY_CARD_ID0
MEMORY_CARD_ID1
PROM_nCS
PROM_nRD
PROM_nWR
PROM_nBYTE
BM_nBUSY
BM_nRESET_SOFT
FLASH_REDY_INT
CPU2
JTAG_TCK
JTAG_TDO
JTAG_TMS
JTAG_TDI
CPU_POWER
MEMORY2
debug_PCI_CON
LAN_SW
_P5
VOIP_PCI_CON
LAN
TDA600
_CON
JTAG_+2.5VD
FPGA_nRESET
(1)
(7)
(8)
(17
)
(18
)
(22
)
(23)
(27)
(28
)
(32
)
(33
)
(41
)
(43
)
(48)
(42
)
(49
)
(55)
(56
)
(60)
(63
)
(64
)
(65
)
(66
)
(67)
(59
)
(61
)
(62
)
KX-NCP500GR IPCMPR CARD DETAILED BLOCK DIAGRAM (1/2)

11
KX-NCP500GR
EC_AD[0-15]
EC_PAR
EC_nCBE1
EC_nCBE0
EC_nFRAME
EC_nPERR
EC_nSTOP
EC_nTRDY
EC_nINT
EC_CLK
EC_nCDET
RINGER
CT_NETAEF
CT_D[0-7]
DG
+3.3VD
+15V
MASTER/nS
M/nS
POWER_TYPE1
POWER_TYPE0
+3.3VD
DG
+2.5VD
+3.3VD
+3.3VD_B
+3.3VD_B
RS232_RTS2_CON
RS232_CTS2_CON
RS232_TXD2_CON
RS232_RXD2_CON
RS232_DTR2_CON
RS232_DSR2_CON
+15V
SHELF_FAN_ALM_FPGA
DC_ALM_FPGA
LED_RUN_FPGA_DRIVE
AC_ALM_FPGA
nHALT_FPGA
nFAN_ALM_FPGA
nLOS_FPGA
nBATT_FPGA
RINGER_SYNC_FPGA
LED_ALM_FPGA_DRIVE
CT_D[0]
CT_C8
CT_FRAME
nBUSY
EX1_D[15]
RS232_DCD2_CON
CLK_32.768kHz
RMT_nRESET_SOFT
+15V_CON
+3.3VD_BB
+3.3VD
DG
DG
+3.3VD
EX1_A[1-7]
HWCLK[1]
CLKIO_66.66MHZ
+1.8VD
+1.25VD
+1.2VD
NEXUS_nRESET_SOFT
SHW_FH
SHW_CLK
LUHW[1]
LDHW[1]
CH_SEL[3]
CH_SEL[0]
CH_SEL[1]
MELODYSEL
MOHSEL
CH_SEL[5]
+3.3VD
DG
+15V
VREF_7.5V
Mu/nA
CH_SEL[7] CH_SEL[6]
LUHW[0]
LDHW[0]
HW_CLK[0]
SVM_DSP_OUT[1]
SVM_DSP_OUT[0]
VOX[0-3]
CH_SEL[4]
HWFH
MEMORY_CARD_PRESNT
RTC_nINT
nBAT_ALM
CLK_SD_33.33MHz
SD0_nRESET_SOFT
BANK[0-2]
UCFG[0-3]
LUHW_VOX_CODEC
CL3162
CL3164
CL3144
CL3172
CL3160
CL3180
CL3169
CL3159
DG
CL3173
CL3166
DG
DG
CL3146
TP_DRAM_VREF
CL3182
CL3178
CL3157
CL3171
CL3158
CL3176
CL3167
CL3179
DG
CL3177
CL3175
TP_+1.2VD
CL3168
CL3143
CL3174
CL3170
CL3165
CL3163
CL3181
CL3161
CL3149 CL3148 CL3152 CL3151
CL3145 CL3147
@bloc
BLOCK7
+3.3VD
CLK_SD_33.33MHz
DG
EX1_A[1-7]
EX1_D[0-15]
nDR
RS232_nDCD2
RS232_nDSR2
RS232_nDTR2
RS232_RXD2
RS232_TXD2
RS232_nCTS2
RS232_nRTS2
SD0_nINT
SD0_WP
SD0_CD
nCS_SD0
SD0_nRESET_SOFT
nWE0
SD0_DACK
SD0_nDRQ
RS232_RTS2_CON
RS232_TXD2_CON
RS232_RXD2_CON
RS232_CTS2_CON
RS232_DTR2_CON
RS232_DCD2_CON
RS232_DSR2_CON
MCCLK
MCDAT
MCCMD
TP_+1.25VD
TP_+2.5VD
TP_+3.3VD
TP_+3.3VD_B
TP_+15V
DG
CL3150 CL3153
CL3195
CL3194
CL3199
CL3192
CL3196
CL3198
CL3193
CL3191
CL3197
CL3190
CL3185
CL3189
CL3188
CL3186
CL3183
CL3184
CL3187
CL3155 CL3154
TP_+15V_CON
TP_+3.3VD_BB
TP_+1.8VD
@bloc
BLOCK10
+3.3VD
DG
EC_AD[0-15]
EC_PAR
EC_nCBE0
EC_nCBE1
EC_nRST
EC_nSTOP
EC_nTRDY
EC_nFRAME
EC_nPERR
EC_nINT
EC_nCDET
EC_CLK
+15V_CON
CT_FRAME
CT_NETAEF
CT_C8
RINGER
DC_ALM_FPGA
AC_ALM_FPGA
RS232_RTS2_CON
RS232_TXD2_CON
RS232_RXD2_CON
RS232_CTS2_CON
RS232_DTR2_CON
RS232_DCD2_CON
RS232_DSR2_CON
+3.3VD_BB
SHW_CLK
SHW_FH
CT_D[0-7]
M/nS_FPGA
LDHW[1]
LUHW[1]
nFAN_ALM_FPGA
LED_ALM_FPGA
LED_RUN_FPGA
MASTER/nS_FPGA
nBATT_FPGA
POWER_TYPE1_FPGA
POWER_TYPE0_FPGA
RINGER_SYNC_FPGA
nHALT_FPGA
nLOS_FPGA
SHELF_nFAN_ALM_FPGA
CL3202 CL3201 CL3200
@bloc
BLOCK9
+15V
+3.3VD
CH_SEL[0]
DG
HWCLK[0]
LDHW[0]
LUHW[0]
MELODYSEL
MOHSEL
Mu/nA
CH_SEL[1]
VREF_7.5V
DG
CL3204
CL3203
CL3207
@bloc
BLOCK13
+3.3VD
+3.3VD_B
DG
nRESET_POWER
+15V
+3.3VD_BB
+15V_CON
HARD_nRESET_SW +1.25VD
+1.2VD
+2.5VD
DRAM_VREF
+1.8VD
nBAT_ALM
+3.3VD
+3.3VD
+15V
+3.3VD
+3.3VD
+1.25VD
+3.3VD_B
+3.3VD
+1.2VD
+3.3VD
+3.3VD_B
+15V
+2.5VD
+15V
+1.8VD
@bloc
BLOCK8
+3.3VD
CLK_NEXUS_66MHz
DG
EX2_A[0-21]
EX2_D[0-15]
EX2_nDR
HWCLK[0]
LDHW[0] LUHW[0]
nBS
NEXUS_nINT
SRAM_nBC1
SRAM_nBC0
SRAM_nWR
nBACK
nBREQ
SRAM_nCS
nCS_NEXUS
nBUSY
nRESET_SOFT
nWE1
nWE0
CH_SEL[0]
MELODYSEL
MOHSEL
Mu/nA
+3.3VD_B
EC_AD[0-15]
EC_PAR
EC_nCBE0
EC_nCBE1
EC_nSTOP
EC_nTRDY
EC_nFRAME
EC_nPERR
EC_nINT
EC_nCDET
EC_CLK
CT_D[0-7]
CT_FRAME
CT_NETAEF
CT_C8
RINGER
nRESET_POWER
LDHW[1]
HWFH
LUHW[1]
CH_SEL[4]
SHW_CLK
SHW_FH
POWER_TYPE0
POWER_TYPE1
M/nS
MASTER/nS
HWCLK[1]
CH_SEL[1]
RMT_nRESET_SOFT
CH_SEL[3] CH_SEL[5] CH_SEL[6] CH_SEL[7]
VOX[0-3]
nCS_SRAM
MEMORY_CARD_PRESNT
EXT_nINT0
BANK[0-2]
UCFG[0-3]
@bloc
BLOCK4
CLKIO_66.66MHz
CLK_SD_33.33MHz
EX1_D[0-7]
FAN_ALARM_nINT AC_ALARM_nINT DC_ALARM_nINT nRD nWE1 nWE0
nRDY_CPU
nBUSY_NEXUS nCS_FPGA CLK_32.768kHz
nLOS_FPGA
nHALT_FPGA
RINGER_SYNC_FPGA
DC_ALM_FPGA
AC_ALM_FPGA
nBATT_FPGA
LED_RUN_FPGA_DRIVE
LED_ALM_FPGA_DRIVE
nFAN_ALM_FPGA
NEXUS_nRESET_SOFT
PLD_TDI PLD_TCK
SD0_nRESET_SOFT
PLD_TMS PLD_TDO
FPGA_INT
RMT_nRESET_SOFT
SHELF_nFAN_ALM_FPGA
EX1_A[0-25] EX1_A-1
HWFH_NEXUS
LUHW0_NEXUS
LDHW0_NEXUS
HW_CLK0_NEXUS
CPU_nRESET
CT_D[0]
CT_FRAME
CT_C8
nCS_SRAM nCS_FLASH
PROG_B
CH_SEL[5]
CH_SEL[6]
CH_SEL[7]
SVM_DSP_OUT[0]
SVM_DSP_OUT[1]
RTC_nINT nBACK
nBAT_ALM
BANK[0-2] UCFG[0-3]
LUHW_VOX_CODEC
@bloc
BLOCK15
+15V
+3.3VD
DG
HWCLK[0]
LDHW[0]
Mu/nA
CH_SEL[6]
CH_SEL[7]
SVM_DSP_OUT[0]
SVM_DSP_OUT[1]
VOX[0-3]
VREF_7.5V
LUHW_VOX_CODEC
CL3156
SD&RS232
NEXUS(+SRAM)
POWER
CODEC
EC_CT CON
FPGA+RTC+ESVM
ESVM_VOX
(1)
(7)
(8)
(17)
(18)
(22)
(23)
(27)
(28)
(32)
(33)
(41)
(43)
(48)
(42)
(49)
(55)
(56)
(60)
(63)
(64)
(65)
(66)
(67)
(59)
(61)
(62)
KX-NCP500GR IPCMPR CARD DETAILED BLOCK DIAGRAM (2/2)

12
KX-NCP500GR
4.2. Power Supply Block Diagram

13
KX-NCP500GR
4.3. IPCMPR Card Circuit Operation
4.3.1. IPCMPR Card
4.3.1.1. Outline
1) Function
• System Control
• Circuit Switching (includes gain adjustment function)
• Conference Call (10 x 3 - party - 4 x 8 - party)
•MOH
•PAGING
• Clock
2) Configuration
• Power Supply: DC/DC Converter
• CPU: HITACHI SH7780 (400MHz)
• ASIC: Our own products
• ROM: 8Mbit x 1 (for boot programs)
• SDRAM: 512Mbit x 2 (for work area)
• SRAM: 16Mbit x 1 (for user data backup)
• SD card I/F (for operating programs) x 1
• LAN I/F (for PC programming and the VoIP) x 2
• MOH: External sound input x 1
• PAGING: External output x 1
• Expanded memory connector x 1
• Modem card connector x 1
3) Operation Rating
• Power Input: +15V_CON
• Power Output: +15V (for MOH)
+3.3V (for I/O)
+3.3VD_BB (for back board signal line pull-up)
+3.3VD_B (for SRAM backup)
+1.25VD (for CPU core)
+2.5VD (for DDR-SDRAM, CPU, LAN SW IC and FPGA)
+1.8VD (for LAN SW IC)
+1.2VD (for FPGA)

14
KX-NCP500GR
4.3.2. Description of Each Part
LED Lamp (BATT ALARM): Turns on to indicate the dropping of the lithium battery voltage (less than 2.8V).
LED Lamp (SD ACCESS): Turns on when the SD card is accessing.
SD card slot: Mounts the system program SD card.
Reset Switch: Press at the system reset.
System Initialize Switch: On default startup, set the switch to the "SYSTEM INITIALIZE" position for the power ON. Return the
switch to the "NORMAL" position when the main power switch starts to flash. On normal startup, turn the power ON with the
"NORMAL" position.
LAN connector: 1, 2. Used for the PC programming and the VoIP.
PAGING: External PAGING output. Connect to the device with the built-in amplifier.
MOH: External music on-hold input.
LED Lamp (LINK / ACT) Turns on: LINK OK. Blinking: ACTive data is communicated.
LED Lamp (100 / 10) Turns on: 100BASE-TX. Turns off: 10BASE-T.

15
KX-NCP500GR
4.3.3. Circuit Description
4.3.3.1. Outline of Block Description
• CPU2 block (BLOCK1)
This block operates the main unit control. Besides this operates various controls, select signal generation, DMA control and
serial port control. This contains the built-in clock function.
Configuration: IC101 (CPU), IC102 (clock buffer for PCI), and so on.
Function:
(IC101) Generates the select signal in accordance with the memory map and operates Readout/Storage of data between each
peripheral.
Controls the DMA transfer between built-in serial controller and memory.
Operates input/output control of each I/O signal in accordance with the program.
• CPU_POWER block (BLOCK2)
This block is a power supply part of CPU.
Configuration: IC101 (CPU), X501 (33.33MHz clock for CPU), and so on.
Function:
Power pins of CPU.(+3.3VD,+2.5VD,+1.25VD)
Clock oscillation circuit for CPU operation.
• MEMORY2 block (BLOCK3)
This is a work area and the main unit control program storage or the system boot program storage area.
Configuration: IC602 (Flash ROM), IC601, IC603 (DDR-SDRAM), CN601 (IPCMEC card connector) and so on.
Function:
(IC602) Saves (some of) the system boot program and the system data.
(IC601, IC603) The main program is loaded from the SD card on the system start-up.
Used as the program area and the CPU work area after start-up.
It is independent bus connection to CPU due to high-speed action (bus clock 166MHz).
• FPGA + RTC + ESVM block (BLOCK 4)
The FPGA is a CPU Peripheral function IC.
Configuration: IC801 (FPGA), IC802 (RTC, 32.768kHz clock for CPU), IC804 (ESVM DSP), IC805 (ESVM voice data FLASH)
and so on.
Function:
(IC801) has the functions of RTC I/F, LAN SW I/F(SPI I/F), reset control port, LED driver and address decoder and so on.
(IC802)This is working in the Real time clock function when system stops.
This IC is maintained by the onboard battery back-up.
(IC804,IC805) These are the simple voice mail function.
• LAN block (BLOCK 5)
It is LAN controller connected with PCI.
Configuration: IC1002 (MAC+PHY (LAN controller)), X1001 (25MHz clock for LAN controller) and so on.
Function:
(IC1002) This is a function to communicate LAN through LAN SW.
• LAN_SW_5P block (BLOCK 6)
5ports LAN SW and the external I/F LAN connector.
Configuration: IC1101 (LAN SW), JK1102, JK1103 (LAN connector) and so on.
Function:
(IC1101) It is a hub that does LAN signal of two internal ports and two external ports in the switching.
(JK1102, JK1103) These are connectors with built-in LAN transformer and LED.
• SD and RS232 block (BLOCK 7)
SD card I/F and RS232 (serial) I/F
Configuration: IC1201 (SD card controller), CN1201 (SD card connector), IC1202 (RS232 D/R)and so on.
Function:
(IC1201) This provides the SD card I/F function and loads the main unit program and the system data from the SD card storing
the main unit control program.
(IC1202). This provides the serial I/F driver / receiver function.

16
KX-NCP500GR
• NEXUS (+ SRAM) block (BLOCK 8)
This provides the communication function between each option card, call control (TSW function), conference call, tone genera-
tion and gain control function.
Configuration: IC1303(ASIC(NEXUS)), IC1302, X1301,IC1301(SRAM), CN1301(RMT card connector) and so on.
Function:
(IC1303) This functions as the bus master of EC bus (synchronous bus with 16 bit width, transmission rate max.10Mbps).
Communicates with ASIC mounted to each option card via EC bus and controls the option card.
Controls CT bus (HW clock 8.192MHz, 8 highway, 128 timeslot) for TSW function.
Controls the conference call for 3 people x -8 parties-8 people x-3 parties.
Generates single and DTMF tone in any highway and timeslot.
Provides the digital gain control function by data conversion.Provides some I/O ports for CODEC channel pulse generation,
modem encoding rule setting and music on-hold switching and is controlled by CPU.
(IC1301) Saves the user configuration data (such as key assign data per PT).
The memory is maintained by the onboard battery back-up.
• MOH/PAGING block (BLOCK 9)
This provides the external music on-hold input x 1, the external paging output x 1 port. And also this provides the external music
on-hold input 1 system and exclusively the internal music on-hold output.
Configuration:
IC1502 (CODEC), IC1504 (OP Amp), IC1505 (Melody IC), Q1501, Q1503, Q1505 (transistor), JK1502, JK1503 (pin jack) and so
on.
Function:
Likewise, the external music on hold is input from JK1502 and is made A/D conversion in IC1502 via AGC (Auto Gain Control)
circuit, which consists of IC1504, Q1503, Q1505 and other CR, this is then connected to the call line HW. The external music on-
hold and IC1505 is exclusively connected to IC1502 input (by software control).
The various tones & DTMF tone and the voice data generated in IC1303 (ASIC(NEXUS)) are made D/A conversion in IC1502.
They are output via JK1503 respectively.
• EC_CT CON block (BLOCK 10)
This is the connector that connects IPCMPR and Back Board.
Configuration: CN1601 (Back Board connector) and so on.
Function:
(CN1601) Connection of EC bus, CT bus, and control signals for the option card.
• VOIP_PCI_CON block (BLOCK 11)
This is the connector for 16 VOIP DSP/ 64 VOIP DSP card.
Configuration: CN1701 (Original PCI connector) and so on.
Function:
(CN1601) Connection of PCI bus and LAN data for 16 VOIP DSP/ 64 VOIP DSP card.
• debug_PCI_CON block (BLOCK 12)
This is the connector for debug. (Not mounted connector)
Configuration: CN1801 (Original PCI connector) and so on.
Function:
Nothing

17
KX-NCP500GR
• POWER block (BLOCK 13)
This consists of DC/DC converter circuit and various regulators.
Configuration:
IC1901 (3.3V, 2.5V DC/DC converter), IC1902 (1.25 DC/DC converter), IC1908 (1.8V regulator), IC1907 (1.2V regulator),
IC1903 (Comparator), Q1901, Q1902, Q1903 (FET, transistor), B1901, IP1901 (circuit protection device) and so on.
Function:
+15V_CON input is stepped down to +3.3VD and +2.5VD by DC/DC converter circuit which consists of IC1901, Q1901 and
Q1902 and is supplied to each IC power.
Q1901 and Q1902 and is supplied to each IC power.
+3.3VD is generated by the DC/DC converter is converted to +1.25VD and supplied to IC101 core power.
+2.5VD is generated by the DC/DC converter is converted to +1.8VD and supplied to IC1101 core power.
+2.5VD is generated by the DC/DC converter is converted to +1.2VD and supplied to IC801 core power.
BAT1901, which is a lithium battery for backup, is connected to the power supply of IC1301 (SRAM) and IC802 (RTC) via D1904,
D1905.
IC1903 compares B1901 output voltage to the reference voltage (about +2.7V) and drives LED (BATT ALARM) that indicates
dropping of backup voltage.
• TDA600_CON block (BLOCK 14)
This provides the control interface between IPCEMPR Card and BUS-M Card. (Not mounted connector and so on)
Configuration: CN2001 (Connector for BUS-M),IC2001-IC2001(buffer) and so on.
Function:
Nothing
• ESVM_VOX block (BLOCK 15)
It is VOX detection circuit.
Configuration: IC2201, IC2202 (CODEC), IC2203, IC2204 (OP Amp), IC2205, IC2206 (Comparator) and so on.
Function:
The ESVM voice data are made D/A conversion in IC2201, IC2202 and IC804 (ESVM DSP). After these are amplified with the
amplifier, the sound is detected with the comparator.

18
KX-NCP500GR
4.4. Back Board Circuit Operation
(1) Free Slot Connectors: CN102, CN103, CN201-CN203
(2) IPCMPR Card Connector: CN104
(3) Board to Board Connector: CN100,CN204,CN300,CN305
(4) FAN Connector: CN301 (CN301 is connected FAN behind the product.)
(5) LED Connector: CN302 (CN302 is connected LED board in front of the product.)
(6) RS-232C Connector: CN303 (CN303 is connected D-sub connector behind the product.)
(7) Power Supply Unit Connector: CN304

19
KX-NCP500GR
4.5. Outline
4.5.1. General Description
The control system of this unit is composed of the main control section (IPCMPR) controlling the entire system, exchanging
voice data, the circuit control section (LPR) controlling various telephone lines and the power supply section (POWER).
IPCMPR, LPR and POWER are connected each other through the System BUS (ADDRESS BUS, DATA BUS and CONTROL
BUS). IPCMPR LPR are under I/O control (I/O Read/Write) by MPR.
MPR controls LPR which has a microprocessor by the lnter-Microprocessor Communication System supported by ASIC. That
is, IPCMPR and LPR exchange controlling messages through bi-directional buffer and CPU controls LPR so that it can manage
multiple telephone lines.
I/O address for LPR access is fixed per each free slot. CPU discriminates the sort of LPR through the inter-processor communi-
cation system.
POWER detects the voltage drop of the AC input and the DC output and transfers it to IPCMPR.
4.5.2. IPCMPR Card
This card is the main control section of this unit. It controls all the cards mounted on the free slots, and communication of RS-
232C ports.
The front of the IPCMPR card is equipped with two LEDs (LED1 and LED2) that indicate the operating status of this card, There
are no rotary switches on IPCMPR and a push switch used to execute the system reset.
This control circuit execute the control signals for the exchange process, and this card is composed of the following
(A) 32bit CPU (32bit data bus)
(B) DDR_SDRAMs, SRAM
(C) Flash memory
(D) Lithium Battery for back-up of clock IC and Static RAM
4.5.3. Back Board
BB (back board) is the mother board of the basic shelf. This board connects each card (POWER, IPCMPR, and optional cards)
together. This board has RS-232C connector, FAN connector and LED connector.
4.5.4. Power Supply Unit
This unit is switching regulator power supply and supplies DC voltages to IPCMPR card, optional card (free slot).

20
KX-NCP500GR
4.5.5. System Control
4.5.5.1. System Control Block Diagram