Quectel WCDMA UG Series User manual

WCDMA UGxx
Audio Design Note
UMTS/HSPA Module Series
Rev. WCDMA_UGxx_Audio_Design_Note_V1.2
Date: 2015-12-21
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About the Document
History
Revision
Date
Author
Description
1.0
2015-9-7
Felix YIN/
Jun WU
Initial
1.1
2015-10-23
Felix YIN
1. Updated PCM information in Chapter 2
2. Updated <data_length> value forAT+QDAC
1.2
2015-12-21
Felix YIN
Updated PCM timing in Chapter 2
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Contents
About the Document...................................................................................................................................2
Contents.......................................................................................................................................................3
Table Index...................................................................................................................................................5
Figure Index.................................................................................................................................................6
1Introduction..........................................................................................................................................7
2PCM Characteristic..............................................................................................................................8
3Audio Circuit Design .........................................................................................................................11
3.1. PCM Codec Design Circuit with ALC5616..............................................................................12
3.2. PCM Codec Design Circuit with NAU8814.............................................................................13
3.3. PCM Codec Design Circuit with MAX9860.............................................................................14
3.4. Microphone Interface Design..................................................................................................15
3.5. Receiver Interface Design.......................................................................................................15
3.6. Earphone Interface Design .....................................................................................................16
3.7. Speaker Amplifier Design........................................................................................................16
4Design Consideration........................................................................................................................17
4.1. Power Supply for PCM Codec................................................................................................17
4.2. Audio Layout ...........................................................................................................................17
4.3. TDD Noise...............................................................................................................................18
4.4. Mechanical Design..................................................................................................................18
4.5. Component of SPK..................................................................................................................20
4.6. Components of Microphone....................................................................................................22
5Audio Tuning in Different Modes.....................................................................................................23
5.1. Speech Call in Handset Mode.................................................................................................23
5.2. Speech Call in Headset Mode.................................................................................................24
5.3. Speech Call in Handfree Mode...............................................................................................24
6Audio AT Command Description .....................................................................................................26
6.1. AT+QDAC Digital Audio Interface Configuration..................................................................26
6.2. AT+QIIC IIC Read&Write......................................................................................................28
6.3. AT+CLVL Loud Speaker Volume Level ................................................................................29
6.4. AT+QAUDGAIN Set Gain Offset..........................................................................................29
6.5. AT+QMIC Set Uplink(MIC) Volume......................................................................................30
6.6. AT+CMUT Mute Control.......................................................................................................31
6.7. AT+QCLKOUT Output Clock Source ...................................................................................32
6.8. AT+QSIDET Set the Side Tone Gain in the Current Mode ..................................................33
6.9. AT+QAUDLOOP EnableAudio Loop Test............................................................................34
6.10. AT+QAUDMOD Set Audio Mode..........................................................................................35
6.11. AT+CRSL Set Ring Tone Volume.........................................................................................35
6.12. AT+CALM Mute the Ring Tone.............................................................................................36
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6.13. AT+QPCMON Enable PCM Sync & BCLK...........................................................................37
6.14. AT+QAUDCFG Audio Tuning Process.................................................................................38
6.14.1. AT+QAUDCFG="handset/eec" Set Echo Cancellation for Handset........................38
6.14.2. AT+QAUDCFG="headset/eec" Set Echo Cancellation for Headset........................41
6.14.3. AT+QAUDCFG="handfree/eec" Set Echo Cancellation for Handfree.....................42
6.14.4. AT+QAUDCFG="handset/nr/ul" Set Uplink Noise Reduction for Handset ..............43
6.14.5. AT+QAUDCFG="handset/nr/dl" Set Down Link Noise Reduction for Handset .......44
6.14.6. AT+QAUDCFG="headset/nr/dl" Set Down Link Noise Reduction for Headset .......45
6.14.7. AT+QAUDCFG="headset/nr/ul" Set Uplink Noise Reduction for Headset ..............46
6.14.8. AT+QAUDCFG="handfree/nr/dl" Set Down Link Noise Reduction for Handfree.....47
6.14.9. AT+QAUDCFG="handfree/nr/ul" Set Uplink Noise Reduction for Handfree ...........48
6.14.10. AT+QAUDCFG="nau8814/dlgain" Set Down Link Gain Level for Codec nau8814.49
6.14.11. AT+QAUDCFG="nau8814/ulgain" Set Uplink Gain Level for Codec nau8814........50
6.14.12. AT+QAUDCFG="alc5616/dlgain" Set Down Link Gain Level for Codec alc5616....51
6.14.13. AT+QAUDCFG="alc5616/ulgain" Set Uplink Gain Level for Codec alc5616 ..........52
6.14.14. AT+QAUDCFG="max9860/dlgain" Set Down Link Gain Level for Codec max986053
6.14.15. AT+QAUDCFG="max9860/ulgain" Set Uplink Gain Level for Codec max9860......54
7Appendix.............................................................................................................................................56
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Table Index
TABLE 1: PIN DEFINITION................................................................................................................................. 8
TABLE 2: IO CHARACTERISTICS...................................................................................................................... 8
TABLE 3: RELATED DOCUMENTS.................................................................................................................. 56
TABLE 4: TERMS AND ABBREVIATIONS........................................................................................................ 56
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Figure Index
FIGURE 1: PCM MASTER MODE TIMING......................................................................................................... 9
FIGURE 2: THE CONNECTION DIAGRAM OF PERIPHERALS, MODULE AND CODEC ............................. 10
FIGURE 3: ALC5616 CODEC DESIGN ............................................................................................................ 12
FIGURE 4: NAU8814 CODEC DESIGN............................................................................................................ 13
FIGURE 5: MAX9860 CODEC DESIGN ........................................................................................................... 14
FIGURE 6: MICROPHONE DESIGN ................................................................................................................ 15
FIGURE 7: RECEIVER DESIGN....................................................................................................................... 15
FIGURE 8: EARPHONE DESIGN..................................................................................................................... 16
FIGURE 9: SPEAKER AMPLIFIER DESIGN .................................................................................................... 16
FIGURE 10: AUDIO LAYOUT............................................................................................................................ 17
FIGURE 11: FIVE ECHO PATHS ...................................................................................................................... 19
FIGURE 12: MICROPHONE SOCKET DESIGN .............................................................................................. 19
FIGURE 13: SPEAKER SOCKET DESIGN ...................................................................................................... 20
FIGURE 14: SPK FREQUENCY RESPONSE.................................................................................................. 21
FIGURE 15: SPK THD....................................................................................................................................... 21
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1Introduction
This document mainly introduces how to use Pulse Code Modulation (PCM) digital interface with Quectel
UGxx modules.
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2PCM Characteristic
Quectel UGxx modules provide one PCM digital interface for audio design, which supports the following
features:
Supports16, 32 bit mode with short frame synchronization,the PCM supports 32 bit mode by default.
The default configuration of PCM codec is AT+QDAC=1,0,0,2,0,0.Refer to document [3] for more
details.
Supports master and slave mode.
Supports audio sample rate 8kHz.
The following table shows the pin definition of PCM and I2C interface.
Table 1: Pin Definition
Table 2: IO Characteristics
Pin Name
I/O
Description
PCM_IN
DI
PCM data input
PCM_OUT
DO
PCM data output
PCM_SYNC
DO
PCM data frame sync signal
PCM_CLK
DO
PCM data bit clock
I2C_SCL
OD
I2C serial clock
I2C_SDA
OD
I2C serial data
Parameter
Description
Min.
Max.
Unit
VIL
Low-level input voltage
-0.3
0.35
V
VIH
High-level input voltage
1.3
1.85
V
VOL
Low-level output voltage
0
0.25
V
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The voltage of VDD_EXT is 1.8V, please refer to document [1] for details.
In PCM audio format, the MSB of the channel included in the frame (PCM_SYNC) is clocked on the
second CLK rising edge after the PCM_SYNC pulse rising edge. The period of the PCM_SYNC signal
(frame) lasts for Data word bit +1 clock pulses.
The firmware of module has integrated the configuration on NAU8814/ALC5616/MAX9860 application
with I2C interface. AT+QDAC command can be used to configure the external codec chip linked with
PCM interface, and refer to document [3] for more details. Data bit is 32 bit and the sampling rate is 8
KHz. The following figure shows the timing of the application withALC5616 codec.
PCM_CLK
PCM_SYNC
PCM_IN/OUT
32 1 0 31
Sampling freq. = 8 KHz
32-bit data word
BCLK = 264 KHz
33
MSB
Figure 1: PCM Master Mode Timing
VOH
High-level output voltage
1.55
VDD_EXT
V
NOTE
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For the relations between peripherals, modules and PCM CODEC, please refer to the following figure.
PCM_IN
PCM_OUT
PCM_SYNC
PCM_CLK
I2C_SCL
I2C_SDA
CODEC
Module
VDD_EXT
4.7K 4.7K
BCLK
LRCLK
DACDAT
ADCDAT
SCL
SDA
BIAS
MICBIAS
MIC+
MIC-
SPK+
SPK-
CLK_OUT MCLK
Rs
NM
Peripherals
USB
UART
USB
UART
CLK
0R
0R_NM
R1
R2
Figure 2: The Connection Diagram of Peripherals, Module and Codec
1. The communication between the module and peripherals can be realized by UART or USB interface.
2. The MCLK of codec can be provided by peripherals or module. When the MCLK is provided by
module, R1 is mounted and R2 is not mounted. When the MCLK is provided by peripheral, R2 is
mounted and R1 is not mounted.
3. It is recommended to reserve RC (R=22Ω, C=22pF) circuit on the PCM lines, especially for
PCM_CLK.
4. UGxx modules provide a digital clock output (CLK_OUT) for an external audio codec, the CLK_OUT
function is disabled by default. When CLK_OUT is required, AT command is used to provide the
codec with a 13/26MHz clock generated from the module. A RC (e.g. R=22Ω, C=47pF) circuit is
recommended to be reserved on CLK_OUT line. Refer to document [3] for details. If unused, keep
this pin open.
AT+QPCMON is used to enable PCM_CLK (BCLK) & PCM_SYNC when there is no audio application.
The output frequency depends on the settings of AT+QDAC: sync=<sample_rate>,
PCM_CLK(BCLK)=<sample_rate> * (<data_length>+ 1).
AT+QDAC=1,0,0,2,0,0
OK
AT+QPCMON=1 //Enable PCM SYNC & BCLK, SYNC=8k, BCLK=264K
OK
AT+QPCMON=0 //Disable PCM SYNC & BCLK
OK
NOTES
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3Audio Circuit Design
CodecALC5616, NAU8814 and MAX9860 have been approved for PCM application.
Pin25 provides a clock ranges from 32k to 26M. This clock can be used to provide MCLK for codec. When
ALC5616, NAU8814 or MAX9860 is using, Pin25 will output a 26M clock by default. AT+QPCMCLK is
used to enable this clock.
AT+QCLKOUT=1, 2 //Output 26M frequency
OK
AT+QCLKOUT=0 //Close output
OK
The following chapters will show the audio design circuit with these codec.
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3.1. PCM Codec Design Circuit with ALC5616
The following figure shows PCM application with ALC5616 from Realtek (http://www.realtek.com.tw/), and
I2C interface is equipped to configure codec.
Figure 3: ALC5616 Codec Design
1. The RC filter circuit (R=22ohm, C=22pF) needs to be installed on PCM_CLK line.
2. VDD_3V3 and VDD_1V8 are needed to be supplied externally.
3. Set AT+QDAC=3 to choose ALC5616, MCLK is not needed, and ALC5616 uses internal PLL to
generate system clock.
NOTES
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3.2. PCM Codec Design Circuit with NAU8814
The following figure shows PCM application with NAU8814 from Nuvoton (http://www.nuvoton.com), and
I2C interface is equipped to configure codec.
Figure 4: NAU8814 Codec Design
1. The RC filter circuit (R=22ohm, C=22pF) needs to be installed on PCM_CLK line.
2. VDD_3V3 is needed to be supplied externally.
3. Set AT+QDAC=2 to choose NAU8814, please provide 2M external crystal for NAU8814. The
CLOCK_OUT pin can also provide 26M clock for NAU8814, but the quality of the voice is worse than
2M external crystal.
NOTES
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3.3. PCM Codec Design Circuit with MAX9860
The following figure shows PCM application with MAX9860 from Maxim (http://www.maxim-ic.com), and
I2C interface is equipped to configure codec.
Figure 5: MAX9860 Codec Design
1. The RC filter circuit (R=22ohm, C=22pF) needs to be installed on PCM_CLK line.
2. Set AT+QDAC=4 to choose MAX9860, the module will provide 26M MCLK by default.
NOTES
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3.4. Microphone Interface Design
Close to Microphone
MICP_PCM
MICN_PCM
Differential layout
Electret
Microphone
10pF
10pF
10pF
33pF
33pF
33pF
0R
0R
Figure 6: Microphone Design
3.5. Receiver Interface Design
Close to Receiver
SPKP_PCM
SPKN_PCM
10pF
10pF
10pF
33pF
33pF
33pF
32Ω
Differential layout
0R
0R
Figure 7: Receiver Design
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3.6. Earphone Interface Design
The following figure shows the single-ended application for earphone design.
1
2
4
3
SPKP_PCM
MICN_PCM
MICP_PCM
22uF
Close to Socket
Differential layout
4.7uF
33pF
10pF
33pF
10pF
Earphone
32Ω
0R
0R
Figure 8: Earphone Design
3.7. Speaker Amplifier Design
If the 8Ωspeaker is applied, it is recommended to add an audio amplifier.
Close to Speaker
SPKP_PCM
SPKN_PCM
10pF
10pF
10pF
33pF
33pF
33pF
Ri
Ri
Amplifier circuit
8Ω
Figure 9: Speaker Amplifier Design
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4Design Consideration
4.1. Power Supply for PCM Codec
For different PCM codec, the supply voltage is different. It’s better to supply power for PCM codec with
dedicated LDO, and not to share this power with other circuits.
4.2. Audio Layout
Power supply ripple, unbalanced ground and RF burst radiation have negative effect on audio layout.
Layout of MICP_PCM/MICN_PCM, SPKP_PCM/SPKN_PCM must meet the rule of differential signal.
Moreover, these two pairs of signals should be separated from each other by flooding ground to avoid
echo issue from SPK signal to MIC signal. Figure 10 shows an example.
Figure 10: Audio Layout
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4.3. TDD Noise
It is important to avoid or reduce TDD noise in audio circuit design and layout, some suggestions are
listed below:
1. Different capacitors have their own self-resonant frequencies due to the different fabrication
processes and materials. Generally, we choose 33pF capacitor (0603 package) to filter GSM900
interference and 10pF capacitor (0603 package) to filter DCS1800 interference on the power and
analog audio signal lines. It is strongly recommended to add an electrets-microphone within two
capacitors (10pF and 33pF) in handset and hands-free application. These two capacitors could
largely suppress coupling TDD noise from RF interference.
2. Capacitors should be placed close to audio components or audio interface, and layout must be short.
3. Flood ground area should be as large as possible to reduce the ground impedance and improve
ground integrality.
4. Reduce power voltage ripple, especially the power supply in audio circuits.Awide layout is used from
power source (like adapter interface, battery connector, or LDO output pin) to audio power supply.
Good antenna matching is also important to reduce power ripple.
5. The filtering capacitors and ESD protection devices should be connected to main digital ground.
Separate analog ground and digital ground, and connect them at a single point on the PCB by one 0
ohm resistor to reduce digital interference and background noise.
6. Antenna must be stay away from audio components and layout of audio circuit. Antenna should be
kept at least 5cm away from microphone.
7. Layout of power supply must be stay away from audio and cannot be parallel.
4.4. Mechanical Design
It is important to consider how to suppress echo in the equipment with hands-free function or in an
application of which microphone and speaker are very close to each other.
The mechanical structure design has significant impact on echo issue. If it is not properly designed, the
echo suppressing arithmetic in software could not make up for echo issue caused by bad mechanical
structure, and even force to redesign.
Echo issue could be generated by several paths, as shown in Figure 11.
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Figure 11: Five Echo Paths
In these five paths, internal air-path and direct air-path are the first influential factors. Other three factors
(vibrations through casework, vibrations through PCB, distant echoes) are secondary.
To deal with echo issue from internal air-path, you can separate microphone from internal space of
chassis by foam or rubber ring which can effectively suppress the inner echo interference. Figure 12
shows recommended design for microphone socket.
Figure 12: Microphone Socket Design
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