Revision History................................................................................................................................ 54
Figures
Figure 1: DA14706 PRO Development Kit............................................................................................ 6
Figure 2: System Block Diagram........................................................................................................... 7
Figure 3: Engineering Level, Voltage and Interface, PRO-Motherboard Block Diagram...................... 8
Figure 4: Monitoring Header J3: Schematic (Left) and PCB (Right)..................................................... 9
Figure 5: Monitoring Header J4: Schematic (Left) & PCB (Right)......................................................... 9
Figure 6: Debug Interface Including DIP Switch SW1......................................................................... 10
Figure 7: PCB Top of the DA1470x PRO Development Kit Top......................................................... 10
Figure 8: USB HUB Circuitry of DA14706 PRO-Motherboard ............................................................ 11
Figure 9: USB to UART (FTDI Module)............................................................................................... 12
Figure 10: UART and SWD Signals.................................................................................................... 12
Figure 11: MK22 Debugger Schematic (for M33) ............................................................................... 13
Figure 12: J-Trace Connector for M33................................................................................................ 14
Figure 13: Audio Section Schematic................................................................................................... 14
Figure 14: Analog Switch (U8) Used to Isolate the Digital Audio Onterface....................................... 15
Figure 15: Expansion SPI Connector (J27)......................................................................................... 15
Figure 16: Voltage Level Translation Circuit ....................................................................................... 16
Figure 17: Push Buttons Used in the DA1470x PRO-Motherboard.................................................... 17
Figure 18: QSPI RAM Schematic........................................................................................................ 20
Figure 19: QSPI RAM Analog Switch.................................................................................................. 21
Figure 20: QSPI RAM Power Switch................................................................................................... 21
Figure 21: Default QSPI Flash AT25SL128A-MHE-T......................................................................... 22
Figure 22: Two QSPI Flash PCB Footprint Options (Not Populated) ................................................. 22
Figure 23: Analog Switch (U6) Used for the QSPI Flash Signals....................................................... 23
Figure 24: QSPI Flash Power Switch.................................................................................................. 24
Figure 25: eMMC Connector Schematic............................................................................................. 24
Figure 26: Power Configuration Applied on PRO-Motherboard.......................................................... 25
Figure 27: VLDOp Voltage Generation............................................................................................... 26
Figure 28: VLDO = 3.0 V..................................................................................................................... 26
Figure 29: VLDO = 3.3 V Default......................................................................................................... 26
Figure 30: VLDO = 3.6 V..................................................................................................................... 26
Figure 31: 3.3V LDO for PRO-Motherboard Peripherals .................................................................... 27
Figure 32: Power Measurement Module (PMM2) Block Diagram....................................................... 28
Figure 33: Current Measurement Socket (M2).................................................................................... 29
Figure 34: The Hardware Setup for Current Measurements............................................................... 30
Figure 35: C_TRIG Selection Jumper Block (J7) and Buffer MOSFETS for I/O Levels Compatibility 31
Figure 36: PMM2 Current Measurement Circuit PMM2...................................................................... 32
Figure 37: PMM2 on Board Peripherals (Power Supply, Memory and so on).................................... 33
Figure 38: Current Measurement Unit PCBA (TOP)........................................................................... 34
Figure 39: Normal Mode (1 μA to 500 mA at 3.3 V) Data after Offset Calibration.............................. 35
Figure 40: Hibernation Mode (100 nA to 60 uA at 3.3 V) Data after Offset Calibration...................... 35
Figure 41: Power Connections............................................................................................................ 36
Figure 42: Header Schematic for LCD Daughterboard (Interface Board)........................................... 37
Figure 43: LCD Add-On Daughterboard.............................................................................................. 38
Figure 44: QSPI AMOLED LCD Daughterboard Position on PRO-Development Kit.......................... 39
Figure 45: LCD TFT Daughterboard Top (Left) and PCBA Bottom Side (Right)................................ 39
Figure 46: System Block Diagram of DA1470x PRO-Daughterboard................................................. 41
Figure 47: PCB Top of the DA14706 PRO- Daughterboard ............................................................... 41
Figure 48: PCB Bottom of the DA1470x PRO- Daughterboard .......................................................... 42
Figure 49: PRO- Daughterboard. Interface Connectors to PRO-Motherboard................................... 42
Figure 50: CMAC/M33 and SNC Debugging Connectors Schematic................................................. 44
Figure 51: VAD Analog MIC................................................................................................................ 45
Figure 52: Programmable Gain Amplifier Signal Routing ................................................................... 45
Figure 53: RF Section of PRO-Daughterboard................................................................................... 46