ST STEVAL-FKI433V1 User manual

December 2016
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www.st.com
UM2149
User manual
Getting started with the S2-LP development kits
Introduction
This document describes the development kits for the S2-LP device and related hardware and software
components.
The S2-LPisan ultra low-power, low data rate, sub-1 GHz transceiver.
The following S2-LP kits are available:
1. S2-LP development platform for 430-470 MHz (order code: STEVAL-FKI433V1)
2. S2-LP development platform for 860-940 MHz (order code: STEVAL-FKI868V1)
3. S2-LP development platform for 860-940 MHz with external FEM (order code: STEVAL-FKI915V1)

Contents
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Contents
1Overview .......................................................................................... 6
1.1 System requirements ........................................................................6
1.2 STSW-S2LP-DK development kit setup............................................6
2Hardware description...................................................................... 7
2.1 STEVAL-FKI868V1 and STEVAL-FKI433V1 evaluation boards .......7
2.1.1 S2-LP connections ............................................................................. 8
2.1.2 STEVAL-FKI868V1 and STEVAL-FKI433V1 power .......................... 9
2.2 STEVAL-FKI915V1 evaluation board................................................9
2.2.1 S2-LP connections ........................................................................... 10
2.2.2 STEVAL-FKI915V1 power................................................................ 11
2.3 NUCLEO-L152 ................................................................................ 11
2.3.1 Push buttons..................................................................................... 11
2.3.2 LEDs ................................................................................................. 11
2.3.3 Embedded ST-LINK ......................................................................... 11
2.3.4 STM32L152RE microcontroller ........................................................ 11
2.4 Hardware setup............................................................................... 12
3GUI software description .............................................................. 13
3.1 Installation....................................................................................... 13
3.2 Detailed description......................................................................... 13
3.2.1 Connection panel.............................................................................. 15
3.2.2 Radio setting panel........................................................................... 15
3.2.3 RF test mode .................................................................................... 16
3.3 Packet setting.................................................................................. 17
3.3.1 Packet setting: BASIC ...................................................................... 17
3.3.2 Packet setting: WMBUS ................................................................... 18
3.4 Transmission test ............................................................................ 19
3.5 Low level commands....................................................................... 22
3.6 Running RSSI ................................................................................. 24
3.7 How to run a BER test using a signal generator.............................. 25
3.8 Register table.................................................................................. 26
3.9 Menu bar......................................................................................... 27
3.9.1 File .................................................................................................... 27
3.9.2 Tools ................................................................................................. 28
3.9.3 Help .................................................................................................. 30

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3.9.4 Device emulator................................................................................ 30
4Firmware examples ....................................................................... 31
5Release notes ................................................................................ 32
6License........................................................................................... 33
7 Revision history ............................................................................ 34

List of tables
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List of tables
Table 1: S2-LP: FKI868V1 and FKI433V1 evaluation board pin description..............................................8
Table 2: S2-LP: FKI915V1 evaluation board pin description....................................................................10
Table 3: STEVAL-FKI915V1 expansion board jumper description ..........................................................11
Table 4: Document revision history ..........................................................................................................34

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List of figures
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List of figures
Figure 1: STEVAL-FKI868V1 evaluation board features............................................................................7
Figure 2: STEVAL-FKI915V1 evaluation board features............................................................................9
Figure 3: NODE_L152RE disk drive .........................................................................................................13
Figure 4: Connection setup 1: 1 PC with S2-LP-DK GUI .........................................................................13
Figure 5: Connection setup 2: 2 PCs with S2-LP-DK GUI........................................................................14
Figure 6: S2-LP GUI main window ...........................................................................................................14
Figure 7: Available COM ports..................................................................................................................15
Figure 8: S2-LP radio setting ....................................................................................................................16
Figure 9: RF test mode buttons ................................................................................................................16
Figure 10: Basic packet setting panel.......................................................................................................17
Figure 11: wM-Bus packet setting panel...................................................................................................18
Figure 12: Transmission test panel...........................................................................................................19
Figure 13: Low level command panel .......................................................................................................22
Figure 14: Read/write register window .....................................................................................................23
Figure 15: Running RSSI tab....................................................................................................................24
Figure 16: BER test bench schema ..........................................................................................................25
Figure 17: Register table ..........................................................................................................................26
Figure 18: File list......................................................................................................................................27
Figure 19: Tool list ....................................................................................................................................28
Figure 20: Help menu ...............................................................................................................................30
Figure 21: S2-LP emulator........................................................................................................................30
Figure 22: IAR project ...............................................................................................................................31

Overview
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1 Overview
This section describes all the software and hardware components of the S2-LP kits.
1.1 System requirements
The STSW-S2LP-DK application GUI has the following minimum requirements:
•PC with Intel® or AMD® processor running Windows (XP SP3, Vista, 7 or 10)
•At least 128 Mb of RAM
•USB ports
•40 MB of available hard disk space
•Adobe Acrobat Reader 6.0 or above.
1.2 STSW-S2LP-DK development kit setup
Launch the S2-LP DK-Setup-X.X.X.exe file and follow the onscreen instructions.
EWARM Compiler 7.40.3 or later is required for building the
S2LPLibrary_Examples demonstration applications.

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Hardware description
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2 Hardware description
2.1 STEVAL-FKI868V1 and STEVAL-FKI433V1 evaluation boards
The STEVAL-FKI868V1 and the STEVAL-FKI433V1 evaluation boards are designed to
work in the 860-940 MHz and in the 430-470 MHz band, respectively.
Some features on the boards are (see Figure 1: "STEVAL-FKI868V1 evaluation board
features"):
•S2-LP (A)
•8 MHz high frequency crystal (B)
•Balun, matching network and harmonic filter (C)
•Two rows with Arduino compliant connectors (D1-4)
•SMA connector (E)
•An EEPROM to store the manufacturing data (F)
•A NUCLEO-L152RE evaluation board (please refer to UM1724 for further details) (G)
•A jumper for S2-LP current measurement (H)
Figure 1: STEVAL-FKI868V1 evaluation board features
Pressing the reset button, the STM32 Nucleo development board resets and a hex format
string containing ID and PAC is shown.

Hardware description
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2.1.1 S2-LP connections
S2-LP signal test points are split across two rows which are Arduino compliant connectors:
CN1, CN3 and CN2, CN4.
The S2-LP shield is connected to the Nucleo motherboard via the Arduino compliant
connectors.
The connectors and pin names below are used in the STEVAL-FKIxxxV1 schematic
diagram.
Table 1: S2-LP: FKI868V1 and FKI433V1 evaluation board pin description
Pin name Pin number Arduino connectors
CN1 (D1) CN2 (D2) CN3 (D3) CN4 (D4)
VDD SMPS 1 pin 4
SMPS1 2
SMPS2 3
XOUT 4
XIN 5
SDN 6 pin 8(SDN)
VDDANASYNTH 7 pin 4
VRSYNTH 8
VREFVCO 9
VDDVCOTX 10 pin 4
TX 11
VRRF 12
RXN 13
RXP 14
VDDRXDIG 15 pin 4
SDO 16 pin 5 (MISO)
SDI 17 pin 4 (MOSI)
SCLK 18 pin 4(SCK)
CSN 19 pin 2 (CS)
GPIO0 20 pin 1 (GPIO0)
GPIO1 21 pin 3 (GPIO1)
GPIO2 22 pin 4 (GPIO2)
GPIO3 23 pin 6 (GPIO3)
VSMPS3 24
GND 25 pin 7 pins 6 and 7
The S2-LP evaluation board contains a discrete passive circuit for RF matching and balun
and other additional components required by the S2-LP for proper operation.

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2.1.2 STEVAL-FKI868V1 and STEVAL-FKI433V1 power
The board can be powered by the Nucleo evaluation board mini USB connector.
When the JP1 jumper is fitted (H in Figure 1: "STEVAL-FKI868V1 evaluation board
features"), the radio section is supplied.
By removing this jumper and connecting a power meter, you can measure the S2-LP
current consumption.
2.2 STEVAL-FKI915V1 evaluation board
The STEVAL-FKI915V1 evaluation board is tuned to work in the 868 MHz and 915 MHz
bands.
The FKI915V1 evaluation board features (see Figure 2: "STEVAL-FKI915V1 evaluation
board features"):
•S2-LP (A)
•Skyworks SE2435L FEM (B)
•High frequency 8 MHz crystal (C)
•Two rows with Arduino compliant connectors (D1-D4)
•Balun, matching network and harmonic filter (E)
•SMA connector (F)
•An EEPROM to store the manufacturing data (G)
•A jumper for S2-LP current measurement (H)
•A jumper for Skyworks SE2435L FEM current measurement (I)
•A NUCLEO-L152RE board (please refer to UM1724 for further details) (J)
Figure 2: STEVAL-FKI915V1 evaluation board features

Hardware description
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2.2.1 S2-LP connections
S2-LP signal test points are split across two rows which are Arduino compliant connectors:
CN1, CN3 and CN2, CN4.
The S2-LP shield is connected to the NUCLEO motherboard using the Arduino compliant
connectors.
The connectors and pin names below are used in the STEVAL-FKI915V1 schematic
diagram.
Table 2: S2-LP: FKI915V1 evaluation board pin description
Pin name Pin number Arduino connectors
J5 (D1) J2 (D2) J1 (D3) J6 (D4)
VDD SMPS 1 pin 4
SMPS1 2
SMPS2 3
XOUT 4
XIN 5
SDN 6 pin 8 (SDN)
VDDANASYNTH 7 pin 4
VRSYNTH 8
VREFVCO 9
VDDVCOTX 10 pin 4
TX 11
VRRF 12
RXN 13
RXP 14
VDDRXDIG 15 pin 4
SDO 16 pin 5 (MISO)
SDI 17 pin 4 (MOSI)
SCLK 18 pin 4 (SCK)
CSN 19 pin 2 (CS)
GPIO0 20 pin 1 (GPIO0)
GPIO1 21 pin 3 (GPIO1)
GPIO2 22 pin 4 (GPIO2)
GPIO3 23 pin 6 (GPIO3)
VSMPS3 24
GND 25 pin 7 pins 6 and 7