ST VIPower VIPer22A-E Installation and operating instructions
November 2014 DocID10240 Rev 2 1/17
17
AN1897
Application note
VIPower™: low-cost universal input DVD supply
with the VIPer22A-E
Introduction
In the past few years, many consumer products have been provided to the end user, such
as DVD or VCD players. Generally, their power supply requires multiple outputs to supply a
variety of control circuits: MCU, motor, amplifier, VFD.
Offline switch mode power supply regulators from ST’s VIPer
®
family combine high voltage,
avalanche rugged vertical power MOSFET with current mode control PWM circuitry. The
result is the innovative AC-DC converter, simpler, quicker, with reduced component count
and cheap.
The VIPer family complies with the “Blue Angel” and “Energy Star” norms, with very low total
power consumption in standby mode, thanks to the burst operation. This document presents
the application on DVD player power supply with the VIPer22A-E meeting the specifications
in Table 1.
Figure 1. VIPer22A-E evaluation board
Table 1. Output specifications
Input Output
1
Output
2
Output
3
Output
4
Output
5
Output
6
Universal
line 5 V+/-
5%
(1)
1. The accuracy of +/-5% is reached for a range of load combination only. See Section 3.2 for cross-
regulation results.
+12V+/-
5%
(1)
-12 V+/-
5%
(1)
-26 V+/-
5%
(1)
3.3 V+/-
5%
(1)
5 V
stb
+/-
5%
(1)
Min.
85 V
ac
Max.
265 V
ac
Imin.
20 mA
Imax.1.5
A
Imax.
30
mA
Imax.
30
mA
Imax.50 mA Imax.
150 mA Imax.100 mA
www.st.com
Contents AN1897
2/17 DocID10240 Rev 2
Contents
1 Application description and design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.1 Start-up phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.2 Auxiliary supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.3 Burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.4 Feedback loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.5 Primary driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Transformer consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Layout recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4 Transformer specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
DocID10240 Rev 2 3/17
AN1897 Application description and design
17
1 Application description and
design
1.1 Schematics
The overall schematic is shown in Figure 3.
1.1.1 Start-up phase
The VIPer22A-E has an integrated high voltage current source linked to the drain pin. At the
start-up converter, it charges the V
DD
capacitor until it reaches the start-up level (14.5 V),
and the VIPer22A-E starts switching.
1.1.2 Auxiliary
supply
The VIPer22A-E has a wide operating voltage range from 8 V to 42 V, respectively minimum
and maximum values for undervoltage and overvoltage protections.
This function is very useful to achieve low standby total power consumption. The feedback
loop is connected to 5 V output by D12 to regulate 5 V output. +5 V
stb
output is blocked by
Q3, so +5 V
stb
regulation is neglected. When the standby signal is present, the Q3 V
ce
cannot provide enough voltage to maintain D12 conducted, so the 5 V output is blocked,
and the +5 V
stb
output is connected to the feedback loop. In this condition the +5 V
stb
is
regulated. Thanks to the transformer structure, all the other secondary outputs and the
auxiliary voltages are pulled down to a very low level, also pulling down the total power
consumption. These features are below-indicated.
– In normal full load, the VDD voltage must be lower than the overvoltage protection.
– In short-circuit, the VDD voltage must be lower than the shutdown voltage.
Actually, this condition leads to the well-known hiccup mode.
– In no-load condition, the VDD voltage must be higher than the shutdown voltage.
1.1.3 Burst mode
The Viper22A-E integrates a current mode PWM with a power MOSFET and includes the
leading edge blanking function. The burst mode allows the VIPer22A-E to skip some
switching cycles when the energy drained by the output load goes below E = (T
b
*V
in
)2 *
f
sw
/2L
p
(T
b
= blanking time, V
in
= DC input voltage, f
sw
= switching frequency, Lp = primary
Inductance). The consequence is the reduction of the switching losses in case of low load
condition by reducing the switching frequency.
1.1.4 Feedback loop
The 5 V output voltage is regulated by a TL-431 (U3) via an optocoupler (U2) to the
feedback pin. If the output voltage is high, the TL-431 draws more current through its
cathode to the anode and the current increases in the optocoupler diode. The current in
optocoupler NPN increases accordingly and the current into the VIPer22A-E FB pin
increases. When the FB current increases, the VIPer22A-E skips some cycles to decrease
turn-on time and lower the output voltage to the proper level (see Figure 1). The 5 V output
voltage is regulated thanks to the TL-431 reference voltage and the R8 and R9 resistive
dividers.
Application description and design AN1897
4/17 DocID10240 Rev 2
Figure 2. VIPer22A-E FB pin internal structure
1.1.5 Primary driver
In a flyback power supply, the transformer is used as an energy tank during the on-time of
the MOSFET. When the MOSFET turns off, its drain voltage rises from a low value to the
input voltage while the secondary diode conducts, transferring to the secondary side the
magnetic energy stored in the transformer. Since primary and secondary windings are not
magnetically coupled, there is a serial leakage inductance that behaves like an open
inductor charged at Ipk, causing the voltage spikes on the MOSFET drain. These voltage
spikes must be clamped to keep the VIPer22A-E drain voltage below the BV
dss
(730 V)
rating. If the peak voltage is higher than this value, the device is destroyed. The RCD clamp
(see Figure 4) is a very simple and cheap solution, but it impacts on the efficiency and on
the power dissipation in standby condition. Besides, the clamping voltage varies according
to the load current. RCD clamp circuits may allow the drain voltage to exceed the
breakdown rating of the VIPer22A-E during the overload operation or during turn-on with
high line AC input voltage. A Zener clamp is recommended (see Figure 5). However this
solution gives higher power dissipation at full load, even if the clamp voltage is exactly
defined.
1.2 Transformer consideration
On the electrical specifications of a multiple output transformer (cross-regulation, leakage
inductance), the main efforts focused on the proper coupling between the windings. A lower
leakage inductance transformer allows a lower power clamp to reduce the input power. It l
leads to lower power dissipation on the primary side. Auxiliary and secondary windings are
swapped in order to decrease the coupling to the primary one. The secondary windings act
as a shielding layer to reduce the capacitive coupling. Fewer spikes are generated on the
auxiliary windings, the primary and secondary windings have better coupling.
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AN1897 Application description and design
17
Designing transformers for low leakage inductance involves several considerations:
– Minimizing the number of turns
– Keeping ratio of winding height to width small
– Increasing width of windings
– Minimizing the insulation between windings
– Increasing coupling between windings
Application description and design AN1897
6/17 DocID10240 Rev 2
Figure 3. Application schematic
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DocID10240 Rev 2 7/17
AN1897 Application description and design
17
For safety requirements, a leakage inductance value is 1 to 3% of the open circuit primary
inductance. A high efficiency transformer should have low inter-winding capacitance to
decrease the switching losses. Energy stored in the parasitic capacitance of the transformer
is absorbed by the VIPer22A-E cycle-by-cycle during the turn-on transition. Excess
capacitance also rings with stray inductance during switch transitions, causing noise
problems. Capacitance effects are usually the most important in the primary winding, where
the operating voltage (and consequent energy storage) is high. The primary winding should
be the first winding on the transformer. This allows the primary winding to have a short
length per turn, reducing the internal capacitance. The driven end of the primary winding
(the end connected to the drain pin) should be the beginning of the winding rather than the
end. This takes advantage of the shielding effect of the second half of the primary winding
and reduces capacitive coupling to adjacent windings. A layer of insulation between
adjacent primary windings can cut the internal capacitance of the primary winding by a four
factor, with consequent reduction of losses. A common technique for winding multiple
secondaries with the same polarity sharing a common return, is to stack the secondaries
(see Figure 6). This arrangement improves the load regulation, and reduces the total
number of secondary turns. Commonly a clamper based on an RCD network or a diode with
a Zener to clamp the rise of the drain voltage is used.
Figure 6. Multiple output winding
Figure 4. RCD clamp topology Figure 5. Zener clamp topology
Layout recommendation AN1897
8/17 DocID10240 Rev 2
2 Layout recommendation
Since EMI issues are strongly related to layout, a basic rule has to be taken into account in
high current path routing, (the current loop area has to be minimized). If a heatsink is used it
has to be connected to ground to reduce common mode emissions, since it is close to the
floating drain tab. Besides, in order to avoid any noise interference on the VIPer22A-E logic
pin, the control ground has to be separated from power ground.
DocID10240 Rev 2 9/17
AN1897 Experimental results
17
3 Experimental results
3.1 Efficiency
Figure 7. Efficiency at 230 V
ac
(load on 5 V) Figure 8. Efficiency at 260 V
ac
(load on 5 V)
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Figure 9. Efficiency at 85 V
ac
(load on 5 V) Figure 10. Load regulation (load on + 5 V)
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Experimental results AN1897
10/17 DocID10240 Rev 2
3.2 Regulation
Figure 11. Cross-regulation
Table 2. Line regulation
Output 85 V
ac
85 V
ac
260 V
ac
5 V/ 0.1 A 5.15 V 5.15 V 5.15 V
5 V
stb
/ 0 A 5.15 V 5 15.15 V 5.15 V
12 V/ 0 A 12.08 V 12.11 V 12.12 V
-12 V/ 0 A -11.98 V -11.99 V -12.00 V
-26 V/ 0 A -25.82 V -25.85 V -25.86 V
3.3 V/ 0 A 3.87 V 3.87 V 3.88 V
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Table 3. Standby model
Output 85 V
ac
230 V
ac
260 V
ac
5 V 2.05 V 2.05 V 2.07 V
5 V
stb
(100 mA)
5.08 V 5.11 V 5.14 V
12 V 4.00 V 3.99 V 3.98 V
-12 V 3.99 V 3.99 V 3.98 V
-26 V 9.12 V 9.10 V 9.08 V
3.3 V 1.70 V 1.50 V 1.51 V
PDIs0.8W1W1.1W
DocID10240 Rev 2 11/17
AN1897 Experimental results
17
Table 4. Full load regulation
Output 85 V
ac
230 V
ac
260 V
ac
5 V/
1.5 A
5.02 V 5.09 V 5.08 V
5 V
stb
/
0 A
5.02 V 5.09 V 5.08 V
12 V/30 mA 12.03 V 12.06 V 12.05 V
-12 V/30 mA -12.01 V -12.05 V -12.05 V
-26 V/50 mA -26.06 V -26.16 V -26.15 V
3.3 V/0.15 A 3.77 V 3.80 V 3.78 V
VIPer22A-E
temp
53 °C 47 °C 45 °C
Transformer specification AN1897
12/17 DocID10240 Rev 2
4 Transformer specification
Figure 12. Transformer structure
Figure 13. Winding construction diagram
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Table 5. Winding parameters
Layer
description
Symbol Start
pin
End
pin
Number of
layers
Turns Wire
size
(mm)
Primary Wp Pin 2 Pin 1 2 65 0.3
Out 1
(5 V/1.5 A)
W5 Pin 7 Pin 12 1 4 2*0.6
Out 2
(12 V/0.0 3 A)
W12 Pin 11 Pin 7 1 5 0.3
Out 3
(-12 V/0.0 3 A)
W-12 Pin 12 Pin 10 1 9 0.45
Out 4
(-26 V/0.05 A)
W-26 Pin1 0 Pin 13 1 10 0.3
Out 5
(5 V
stb
/0. 1 A)
Wstb Pin 9 Pin 8 1 12 0.3
Out 6
(3. 3V/0.15 A)
W3v3 Pin 14 Pin 15 1 3 0.3
Auxiliary Waux Pin 6 Pin 5 1 24 0.3
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DocID10240 Rev 2 13/17
AN1897 PCB layout
17
5 PCB layout
Figure 14. Bottom view of the evaluation board (not in scale)
Figure 15. PCB art work (not in scale)
PCB layout AN1897
14/17 DocID10240 Rev 2
Table 6. Bill of materials
Reference Description Note
U1 Optocoupler
PC817
Sharp
U2 VIPer22A-E
DIP
ST
U3 TL431
ACZ
ST
U4 L4931
ABV33
ST
Q1 SS9014
Q3 SS8550
D1, D2, D3,
D4
1N4007
D5 FR157
D6, D7, D9, D10,
D13
STTH102 ST
D8 STPS5L60 ST
D11,
D12
1N5818 ST
C1,
C2
Y1 capacitor
2200 pF
C3 X2 capacitor
0.1 uF
C4 Electrolytic capacitor
100 uF/400 V
C5,
C8
1 nF/1 kV
C6 Ceramic capacitor
47 nF/50 V
C7 Electrolytic capacitor
47 uF/50 V
C9 Electrolytic capacitor
220 uF/50 V
C10 Ceramic capacitor
47 pF/50V
C12 Electrolytic capacitor
1000 uF/16 V
C13 Electrolytic capacitor
470 uF/16 V
C15 Electrolytic capacitor
100 uF/10 V
C17 Electrolytic capacitor
470 uF/25 V
C19 Electrolytic capacitor
470 uF/25 V
C20 Electrolytic capacitor
220 uF/50 V
C25 Electrolytic capacitor
220 uF/16 V
RT1 Not
fit
R2 9.1 K¼
W
R3 100 K
1 W
R4, R5,
R6
1 K¼
W
R8,
R9
5.1 K¼
W
R11 680 ¼
W
CH1 2.2 mH common
choke
TX1 EER28
transformer
DocID10240 Rev 2 15/17
AN1897 PCB layout
17
F1 Fuse
1 A
J1,
J2
2-pin
connector
J3 5-pin
connector
J4 4-pin
connector
J5 9-pin
connector
Table 6. Bill of materials (continued)
Reference Description Note
Revision history AN1897
16/17 DocID10240 Rev 2
6 Revision history
Table 7. Document revision history
Date Revision Changes
12-Nov-2014 2 Updated the title in cover page.
Content reworked to improve readability, no technical
changes.
DocID10240 Rev 2 17/17
AN1897
17
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST productsand ST assumes no liability for application assistance or
the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2014 STMicroelectronics – All rights reserved
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