5Filters and key parameters
5.1 Input signals
The input signals (LINx and HINx) to drive the internal MOSFETs are active high. A 375 kΩ (typ.) pull-down
resistor is built-in for each input signal. To prevent input signal oscillation, an RC filter is added on each input as
close as possible to the IPM. The filter is designed using a time constant of 10 ns (1 kΩ and 10 pF).
5.2 Bootstrap capacitor
In the 3-phase inverter, the emitters of the low side MOSFETs are connected to the negative DC bus (VDC-) as
common reference ground, which allows all low side gate drivers to share the same power supply, while the
emitter of the high side MOSFETs is alternatively connected to the positive (VDC+) and negative (VDC-) DC bus
during running conditions.
A bootstrap method is a simple and cheap solution to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode. The SLLIMM-nano SMD MOSFET-based family includes a
patented integrated structure that replaces the external diode with a high voltage DMOS functioning as a diode
with series resistor. An internal charge pump provides the DMOS driving voltage.
The value of the CBOOT capacitor should be calculated according to the application requirements.
Figure 8. CBOOT graph selection shows the behavior of CBOOT (calculated) versus switching frequency (fsw), with
different values of ∆VCBOOT for a continuous sinusoidal modulation and a duty cycle δ = 50%.
Note: This curve is taken from application note AN4840 (available on www.st.com); calculations are based on the
STGIP5C60T-Hyy device, which represents the worst case scenario for this kind of calculation.
The boot capacitor must be two or three times larger than the CBOOT calculated in the graph.
For this design, a value of 2.2 µF was selected.
Figure 8. CBOOT graph selection
UM2467
Filters and key parameters
UM2467 - Rev 1 page 10/30
