Texas Instruments TPS3813 Q1EVM Series User manual

1
SPRUI96–October 2016
Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated
TPS3813xxxQ1EVM for Processor Voltage Supervisor With Window-
Watchdog User’s Guide
User's Guide
SPRUI96–October 2016
TPS3813xxxQ1EVM for Processor Voltage Supervisor
With Window-Watchdog User’s Guide
This user’s guide describes the TPS3813xxxQ1EVM evaluation module (EVM). This guide contains the
EVM schematic, bill of materials (BOM), assembly drawing, and top and bottom board layouts.
Contents
1 Introduction ................................................................................................................... 2
2 Setup and Operation ........................................................................................................ 6
3 EVM Setup.................................................................................................................... 7
List of Figures
1 TPS3813xxxQ1EVM Board ................................................................................................ 2
2 TPS3813xxxQ1EVM Schematic........................................................................................... 3
3 Composite - Top View ...................................................................................................... 5
4 Layout Top View............................................................................................................. 5
5 Layout Bottom View ........................................................................................................ 5
6 Top Layer..................................................................................................................... 5
7 Bottom Layer................................................................................................................. 5
8 Top Solder Mask............................................................................................................. 5
9 Delay Time TPS3813K33-Q1 .............................................................................................. 8
10 Delay Time TPS3813I50-Q1 ............................................................................................... 8
11 Rise Time TPS3813K33-Q1................................................................................................ 8
12 Rise Time TPS3813I50-Q1................................................................................................. 8
13 Fall Time TPS3813K33-Q1................................................................................................. 9
14 Fall Time TPS3813I50-Q1.................................................................................................. 9
15 TPS3813K33-Q1 ........................................................................................................... 10
16 TPS3813I50-Q1 ............................................................................................................ 10
17 Watchdog Window Boundary Violation TPS3813K33-Q1 ............................................................ 10
List of Tables
1 TPS3813xxxQ1EVM BOM ................................................................................................. 4
2 Test Points.................................................................................................................... 6
3 EVM Onboard Jumpers..................................................................................................... 7
4 EVM Electrical Characteristics............................................................................................. 7
5 Jumper Settings.............................................................................................................. 8
6 Jumper Settings.............................................................................................................. 9

Introduction www.ti.com
2SPRUI96–October 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
TPS3813xxxQ1EVM for Processor Voltage Supervisor With Window-
Watchdog User’s Guide
Trademarks
1 Introduction
The TPS3813xxxQ1EVM is an evaluation module (EVM) for processor voltage supervisors with window-
watchdog provided by Texas Instruments. The EVM has an operating voltage range of approximately 2 V
to 6 V, and has added jumpers to tie the FAULT pin to the voltage it is supervising, as well as several
jumpers to control timing of the window-watchdog. Both 3.3 V and 5.0 V VDD devices are broken out
separately on the board, except for a common ground connection. Provided test points give users access
to multiple ground points and all critical node voltages.
The top-side of the EVM board accepts two voltage supervisors in a SOT23-6 package. These devices
have an input for supply voltage (VDD), a watchdog rising edge input, and a reset output to monitor that VDD
does not drop below the threshold voltage, VIT, and monitor the watchdog timing conditions.
Figure 1. TPS3813xxxQ1EVM Board
1.1 Related Documentation
The TPS3813-Q1 Processor Supervisory Circuits With Window-Watchdog datasheet (SPRS288)
1.2 TPS3813-Q1 Applications
The features of this EVM are as follows:
• Supply Monitoring for DSPs, Microcontrollers, or Microprocessors
• Safety – Critical Systems
• Automotive Systems
1.3 Schematics, Bill of Materials, and Layout
This section contains the TPS3813xxxQ1EVM schematic, bill of materials (BOM), and layout.

www.ti.com Introduction
3
SPRUI96–October 2016
Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated
TPS3813xxxQ1EVM for Processor Voltage Supervisor With Window-Watchdog
User’s Guide
1.3.1 EVM Schematic
Figure 2. TPS3813xxxQ1EVM Schematic
1.3.2 EVM Bill of Materials
Table 1 lists the bill of materials (BOM) for the TPS3813xxxQ1EVM.

Introduction www.ti.com
4SPRUI96–October 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
TPS3813xxxQ1EVM for Processor Voltage Supervisor With Window-Watchdog
User’s Guide
Table 1. TPS3813xxxQ1EVM BOM
Designator Quantity Value Description Package Reference Part Number Manufacturer
!PCB1 1 Printed Circuit Board MSA017 Any
C1, C3 2 0.1uF CAP, CERM, 0.1 µF, 50 V, ±10%, X7R, AEC-
Q200 Grade 1, 0603 0603 CGA3E2X7R1H104K0 80AA TDK
C2, C4 2 3300pF CAP, CERM, 3300 pF, 50 V, ±10%, X7R,
AEC-Q200 Grade 1, 0402 0402 CGA2B2X7R1H332K0 50BA TDK
J1, J4, J5, J8 4 Header, 2.54 mm, 2x1, Gold, R/A, SMT Header, 2.54 mm, 2 x1, R/A,
SMT 87898-0204 Molex
J2, J3, J6, J7 4 Header, 100 mil, 3x1, Gold, SMT Samtec_TSM-103-01-X-SV TSM-103-01-L-SV Samtec
R1, R2 2 100k RES, 100 k, 1%, 0.1 W, 0603 0603 CRCW0603100KFKE
AVishay-Dale
SH-J1, SH-J2, SH-J5, SH-J6 4 1x2 Shunt, 100mil, Flash Gold, Black Closed Top 100mil Shunt SPC02SYAN Sullins Connector
Solutions
TP1, TP2, TP3, TP4, TP5,
TP6, TP7, TP8, TP9, TP10,
TP11, TP12, TP13, TP14,
TP15, TP16
16 Test Point, Compact, SMT Testpoint_Keystone_Compact 5016 Keystone
U1 1 Processor Supervisory Circuits With Window-
Watchdog, DBV0006A DBV0006A TPS3813K33QDBVR Q1 Texas Instruments
U2 1 Processor Supervisory Circuits With Window-
Watchdog, DBV0006A DBV0006A TPS3813I50QDBVRQ 1Texas Instruments
FID1, FID2, FID3 0 Fiducial mark. There is nothing to buy or
mount. Fiducial N/A N/A

www.ti.com Introduction
5
SPRUI96–October 2016
Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated
TPS3813xxxQ1EVM for Processor Voltage Supervisor With Window-
Watchdog User’s Guide
1.3.3 Layout and Component Placement
Figure 3 is the top assembly of the printed circuit board (PCB), which shows the component placement on
the EVM. Figure 4 is the Layout Top View and Figure 5 is the Layout Bottom View, Figure 6 and Figure 7
show the top and bottom layers, and Figure 8 shows the top solder mask of the EVM.
Figure 3. Composite - Top View Figure 4. Layout Top View
Figure 5. Layout Bottom View Figure 6. Top Layer
Figure 7. Bottom Layer Figure 8. Top Solder Mask

Setup and Operation www.ti.com
6SPRUI96–October 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
TPS3813xxxQ1EVM for Processor Voltage Supervisor With Window-
Watchdog User’s Guide
2 Setup and Operation
This section describes the connectors, jumpers, and test points on the EVM as well as how to connect, set
up, and properly use the EVM. This section also includes an example of EVM operation.
2.1 Connector Descriptions
There are several methods and types of I/O connections on the EVM including:
• Test Points: for reset, WDR, WDT, WDI, VDD, and GND connected pins
• Two-Pin Jumpers: for holding the RESETN pin at a different voltage than VDD and for using an optional
external capacitor to adjust the watchdog window
• Three-Pin Jumpers: for manually setting WDT and WDR to VDD, GND, or for using an external
capacitor for a programmable window
Table 2 lists the test points and functional descriptions. All pins of the device are broken out to test points
on the EVM.
Table 2. Test Points
Test Point
Number Device Test Point Silkscreen Label Function Description
TP1 TPS3813K33 VDD Voltage Input Supply Voltage/ Voltage Supervisor
Input
TP2 TPS3813K33 VDD1 Voltage Monitoring/ Probing Voltage Probe Point for TPW3813
TP3 TPS3813K33 RESETN Voltage Monitoring/ Probing Active Low Reset Output
TP4 TPS3813K33 GND Voltage Input Supply Ground Connection
TP5 TPS3813K33 WDR1 Voltage Monitoring/ Probing Watchdog Ratio Input (VDD or GND)
TP6 TPS3813K33 WDT1 Voltage Monitoring/ Probing Watchdog Delay Input (VDD, GND,
or Cext)
TP7 TPS3813K33 WDI1 Voltage Monitoring/ Probing Watchdog Input Pin
TP8 Both GND Voltage Monitoring/ Probing Common Ground Connection
TP9 Both GND Voltage Monitoring/ Probing Common Ground Connection
TP10 TPS3813I50 VDD Voltage Input Supply Voltage/ Voltage Supervisor
Input
TP11 TPS3813I50 VDD2 Voltage Monitoring/ Probing Supply Voltage/ Voltage Supervisor
Input
TP12 TPS3813I50 RESETN Voltage Monitoring/ Probing Active Low Reset Output
TP13 TPS3813I50 GND Voltage Input Supply Ground Connection
TP14 TPS3813I50 WDR2 Voltage Monitoring/ Probing Watchdog Ratio Input (VDD or GND)
TP15 TPS3813I50 WDT2 Voltage Monitoring/ Probing Watchdog Delay Input (VDD, GND,
or Cext)
TP16 TPS3813I50 WDI2 Voltage Monitoring/ Probing Watch-Dog Input Pin

www.ti.com EVM Setup
7
SPRUI96–October 2016
Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated
TPS3813xxxQ1EVM for Processor Voltage Supervisor With Window-
Watchdog User’s Guide
The descriptions for the jumpers onboard the TPS3813xxQ1EVM are in Table 3. The three pin jumpers
control the two settings of the WDR pin, and two of the three settings of the WDT pin. The two pin jumpers
are for the option of pulling the RESETN pin up to VDD and for pulling the WDT pin to GND. The RESETN
pin is an open drain, so it needs to be pulled high to assert an active low output. The WDT and WDR pins
control the length of the programmable watchdog window and the length of the lower boundary prior to the
watchdog window. The capacitor onboard the EVM is set to give a midpoint between the smallest and
largest settings of this window. A Window Watchdog Calculator is provided for sizing the programmable
watchdog window, use the link to go to the folder to download. For more information regarding the
operation and functionality of the window-watchdog feature, refer to the TPS3813-Q1 datasheet.
Table 3. EVM Onboard Jumpers
Jumper Device Setting (On, VDD,
GND, or C2) Description
J1 TPS3813K33 On Pulls RESET pin to supply voltage VDD.
J4 TPS3813K33 On Pulls the WDT pin low, lowest lower window
boundary and window.
J5 TPS3813I50 On Pulls RESET pin to supply voltage VDD.
J8 TPS3813I50 On Pulls the WDT pin low, lowest lower window
boundary and window.
J2 TPS3813K33 GND Pulls the WDR pin low, smaller lower window
boundary and window.
VDD Pulls the WDR pin high, larger lower window
boundary and window.
J3 TPS3813K33 Cext Applies external capacitor to the WDT pin for
programmable window.
VDD Pulls WDT pin high, largest lower window
boundaries and frames.
J6 TPS3813I50 GND Pulls the WDR pin low, smaller lower window
boundary and window.
VDD Pulls the WDR pin high, larger lower window
boundary and window.
J7 TPS3813I50 Cext Applies external capacitor to the WDT pin for
programmable window.
VDD Pulls WDT pin high, largest lower window
boundary and window.
Table 4 includes abridged EVM electrical characteristics. For a full functional description of the TPS3813-
Q1 device, refer to the TPS3813-Q1 datasheet.
Table 4. EVM Electrical Characteristics
PARAMETER CONDITION DEVICE MIN TYP MAX UNIT
Supply Voltage, VDD J2 Both 2 — 6 V
Negative-going input threshold
voltage, VIT J2 TPS3813K33 2.87 2.93 3 V
TPS3813I50 4.45 4.55 4.65 V
3 EVM Setup
The EVM setup section details what test equipment the user needs to evaluate the EVM and how to
properly setup the EVM environment. The user should read the TPS3813Q1 Datasheet before using the
EVM.

EVM Setup www.ti.com
8SPRUI96–October 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
TPS3813xxxQ1EVM for Processor Voltage Supervisor With Window-
Watchdog User’s Guide
3.1 Recommended Test Equipment
The following is the recommended test equipment:
• Two-channel storage oscilloscope
• Current probe
• Voltage probe
• Adjustable DC power supply with at least 2.5-V to 6.5-V output and 10-A current limit
• Digital Multimeter or Volt-Ohmmeter
• A passive or active load capable of handling up to 3 A
3.2 Measuring Delay Time and Rise/Fall Time
An internal clock delays the return of the output to the inactive (high) state to ensure proper system reset.
The delay time, td= 25 ms typical, begins after the VDD1 voltage rises above the threshold voltage (VIT)
as specified in the TPS3813-Q1 datasheet. To perform this test, the user must set the jumpers according
to Jumper Settings, Table 5. A stable 5-V DC supply must also be readily available.
Table 5. Jumper Settings
Jumper Setting
J1 to J5 VDD1
J2 to J6 VDD1
J3 to J7 VDD1
J4 to J8 OFF
The jumper settings previously described will pull the WDT and WDR pin up to VDD, setting the Watchdog
window to a default with window frame minimum of 15.6 ms and maximum of 3000 ms. Figure 9 through
Figure 14 display the delay time as well for the rise and fall time of the RESETN pin when the VDD
voltage falls above or below the negative going threshold voltage as outlined in the EVM Electrical
Characteristics, Table 4.
Figure 9. Delay Time TPS3813K33-Q1 Figure 10. Delay Time TPS3813I50-Q1

www.ti.com EVM Setup
9
SPRUI96–October 2016
Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated
TPS3813xxxQ1EVM for Processor Voltage Supervisor With Window-
Watchdog User’s Guide
Figure 11. Rise Time TPS3813K33-Q1 Figure 12. Rise Time TPS3813I50-Q1
Figure 13. Fall Time TPS3813K33-Q1 Figure 14. Fall Time TPS3813I50-Q1
3.3 Programming Watchdog Timer
The TPS3813-Q1EVM allows users to program the watchdog window using the WDT and WDR pins with
several different configurations to set the window timeout and ratio, which are explained in the
Implemented Window-Watchdog Settings section of the TPS3813Q1 datasheet. On board the EVM, the
WDT pin can be connected to ground through the C2 capacitor using the J4 and J6 jumpers to set the
upper boundary of the watchdog window. Jumpers must be set as in Table 6.
Table 6. Jumper Settings
Jumper Setting
J1 to J5 VDD1
J2 to J6 VDDI
J3 to J7 C2
J4 to J8 ON

Revision History www.ti.com
10 SPRUI96–October 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Revision History
If the device does not detect a rising edge at the WDI pin, it will reset delay approximately 25 ms and
return back to normal operation. This behavior is shown in Figure 15 and Figure 16.
Figure 15. TPS3813K33-Q1 Figure 16. TPS3813I50-Q1
The watchdog window settings can be calculated and verified using the Window Watchdog Calculator and
Visualizer tool as seen in Figure 17. Therefore, by using the jumpers as outlined above in Table 6 the
WDT pin is tied to ground through a 3300-pF capacitor. The former results in a watchdog window with
limits of tboundary,max = 35 ms and twindow, min = 895.3 ms. Once the window has been configured, the watchdog
timer should re-trigger to use the Watchdog Timer Input (WDI) pin with an external signal that fits within
the watchdog window to avoid a timeout and RESETN pin is asserted. Care must be taken to avoid a
boundary violation, which results from a trigger pulse in the lower or upper boundary of the watchdog
window. Figure 17 shows a boundary violation that causes the RESETN pin to pull low. The WDI pulse
seen at the falling edge of RESETN triggers at the lower boundary. Therefore, the user must adjust the
pulse signal properly.
Figure 17. Watchdog Window Boundary Violation TPS3813K33-Q1
Revision History
DATE REVISION NOTES
November 2016 * Initial Release