Texas Instruments TPS54218EVM-511 2-A User manual

User's GuideSLVU331 – September 2009
TPS54218EVM-511 2-A, SWIFT™ Regulator Evaluation
Module
Contents1 Introduction ................................................................................................................... 22 Test Setup and Results ..................................................................................................... 43 Board Layout ................................................................................................................ 104 Schematic and Bill of Materials ........................................................................................... 14
List of Figures
1 TPS54218EVM-511 Efficiency ............................................................................................. 52 TPS54218EVM-511 Low Current Efficiency ............................................................................. 53 TPS54218EVM-511 Load Regulation ..................................................................................... 64 TPS54218EVM-511 Line Regulation ...................................................................................... 65 TPS54218EVM-511 Transient Response ............................................................................... 76 TPS54218EVM-511 Loop Response ..................................................................................... 77 TPS54218EVM-511 Output Ripple ....................................................................................... 88 TPS54218EVM-511 Input Ripple ......................................................................................... 89 TPS54218EVM-511 Start-Up Relative to V
IN
............................................................................ 910 TPS54218EVM-511 Start-up Relative to Enable ....................................................................... 911 TPS54218EVM-511 Top-Side Layout ................................................................................... 1012 TPS54218EVM-511 Bottom-Side Layout ............................................................................... 1113 TPS54218EVM-511 Layout 2 ............................................................................................. 1214 TPS54218EVM-511 Layout 3 ............................................................................................. 1315 TPS54218EVM-511 Top-Side Assembly................................................................................ 1416 TPS54218EVM-511 Schematic .......................................................................................... 15
List of Tables
1 Input Voltage and Output Current Summary ............................................................................. 22 TPS54218EVM-511 Performance Specification Summary ............................................................. 23 Output Voltages Available .................................................................................................. 34 EVM Connectors and Test Points ......................................................................................... 45 TPS54218EVM-511 Bill of Materials ..................................................................................... 16
SWIFT is a trademark of Texas Instruments.
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1 Introduction
1.1 Background
1.2 Performance Specification Summary
Introduction www.ti.com
This user's guide contains background information for the TPS54218 as well as support documentation forthe TPS54218EVM-511 evaluation module (HPA375). Also included are the performance specifications,the schematic, and the bill of materials for the TPS54218EVM-511.
The TPS54218 dc/dc converter is designed to provide up to a 2 A output from an input voltage source of2.95 V to 6 V. Rated input voltage and output current range for the evaluation module are given inTable 1 . This evaluation module is designed to demonstrate the small printed-circuit-board areas that maybe achieved when designing with the TPS54218 regulator. The switching frequency is externally set at anominal 1000 kHz. The high-side and low-side MOSFETs are incorporated inside the TPS54218 packagealong with the gate drive circuitry. The low drain-to-source on resistance of the MOSFETs allow theTPS54218 to achieve high efficiencies and helps keep the junction temperature low at high outputcurrents. The compensation components are external to the integrated circuit (IC), and an external dividerallows for an adjustable output voltage. Additionally, the TPS54218 provides adjustable slow start andundervoltage lockout inputs. The absolute maximum input voltage is 7 V for the TPS54218EVM-511.
Table 1. Input Voltage and Output Current Summary
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE
TPS54218EVM-511 VIN = 3 V to 6 V (VIN start = 3.1 V) 0 A to 2 A
A summary of the TPS54218EVM-511 performance specifications is provided in Table 2 . Specificationsare given for an input voltage of V
IN
= 3.3 V and an output voltage of 1.8 V, unless otherwise specified.The TPS54218EVM-511 is designed and tested for V
IN
= 3 V to 6 V. The ambient temperature is 25 °C forall measurements, unless otherwise noted.
Table 2. TPS54218EVM-511 Performance Specification Summary
SPECIFICATION TEST CONDITIONS MIN TYP MAX UNIT
V
IN
operating voltage range 3 3.3 6 VV
IN
start voltage 3.1 VV
IN
stop voltage 2.8 VOutput voltage set point 1.8 VOutput current range V
IN
= 3 V to 6 V 0 2 ALine regulation I
O
= 1 A, V
IN
= 3 V to 6 V ±0.06%Load regulation V
IN
= 3.3 V, I
O
= 0 A to 2 A ±0.04%Voltage change –20 mVI
O
= 0.5 A to 1.5 A
Recovery time 400 µsLoad transient response
Voltage change 20 mVI
O
= 1.5 A to 0.5 A
Recovery time 400 µsLoop bandwidth V
IN
= 3.3 V, I
O
= 2 A 45 kHzPhase margin V
IN
= 3.3 V , I
O
= 2 A 58 °Input ripple voltage I
O
= 2 A 100 mV
PP
Output ripple voltage I
O
= 2 A 5 mV
PP
Output rise time 4 msOperating frequency 1000 kHzMaximum efficiency TPS54218EVM-511, V
IN
= 3.3 V, I
O
= 0.4 A 94.5%
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1.3 Modifications
1.3.1 Output Voltage Set Point
OUT
0.8 V
R7 = 100 kΩ ×
V - 0.8 V
(1)
1.3.2 Slow Start Time
Tss(mS) Iss( A)
C7(nF) = Vref(V)
´ m
(2)
1.3.3 Adjustable UVLO
-
× -
´
START STOP
6
0.944 V V
R1 =
2.59 10
(3)
-
×
- + × ´ 6
STOP
1.18 R1
R2 =
V 1.18 R1 3.2 10
(4)
www.ti.com Introduction
These evaluation modules are designed to provide access to the features of the TPS54218. Somemodifications can be made to this module.
The voltage divider R6 and R7 is used to set the output voltage. To change the output voltage of the EVM,it is necessary to change the value of resistor R7. Changing the value of R7 can change the outputvoltage above 0.8 V. The value of R7 for a specific output voltage can be calculated using Equation 1 .
Table 3 lists the R7 values for some common output voltages. Note that V
IN
must be in a range so that theminimum on-time is greater than 80 ns, and the maximum duty cycle is less than 92%. The values givenin Table 3 are standard values, not the exact value calculated using Equation 1 .
Table 3. Output Voltages Available
Output Voltage (V) R7 Value (k Ω)
1.0 4021.2 2001.5 1151.8 80.62.5 47.5
The slow start time can be adjusted by changing the value of C7. Use Equation 2 to calculate the requiredvalue of C7 for a desired slow start time
C7 is set to 0.01 µF on the EVM for a default slowstart time of 4 msec.
The undervoltage lock out (UVLO) can be adjusted externally using R1 and R2. The EVM is set for a startvoltage of 3.1 V and a stop voltage of 2.8 V using R1 = 48.8 k Ωand R2 = 32.4 k Ω. Use Equation 3 andEquation 4 to calculate required resistor values for different start and stop voltages.
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2 Test Setup and Results
2.1 Input / Output Connections
Test Setup and Results www.ti.com
This section describes how to properly connect, set up, and use the TPS54218EVM-511 evaluationmodule. The section also includes test results typical for the evaluation module and covers efficiency,output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.
The TPS54218EVM-511 is provided with input/output connectors and test points as shown in Table 4 . Apower supply capable of supplying 2 A must be connected to J1 through a pair of 20 AWG wires. The loadmust be connected to J4 through a pair of 20 AWG wires. The maximum load current capability must be atleast 2 A to use the full capability of this EVM. Wire lengths must be minimized to reduce losses in thewires. Test-point TP1 provides a place to monitor the V
IN
input voltages with TP2 providing a convenientground reference. TP6 is used to monitor the output voltage with TP7 as the ground reference.
Table 4. EVM Connectors and Test Points
Reference Designator Function
J1 V
IN
(see Table 1 for V
IN
range).J2 2-pin header for enable. Connect EN to ground to disable, open to enable.J3 2-pin header for to allow pull up of PWRGD to V
IN
.J4 V
OUT
, 1.8 V at 4 A maximum.TP1 V
IN
test point at V
IN
connector.TP2 GND test point at V
IN
.TP3 PH test pointTP4 Slow start monitor test point.TP5 Test point between voltage divider network and output. Used for loop response measurements.TP6 Output voltage test point at OUT connector.TP7 GND test point at OUT connector.
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2.2 Efficiency
50
55
60
65
70
75
80
85
90
95
100
0 0.25 0.5 0.75 1 1.25 1.5 1.75 2
I - Output Current - A
O
Efficiency - %
V = 3.3 V
I
V = 5 V
I
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1 10
I - Output Current - A
O
Efficiency - %
V = 3.3 V
I
Vin = 5 V
www.ti.com Test Setup and Results
The efficiency of this EVM peaks at a load current of about 0.4 A – 0.7 A and then decreases as the loadcurrent increases towards full load. Figure 1 shows the efficiency for the TPS54218EVM-511 at anambient temperature of 25 °C.
Figure 1. TPS54218EVM-511 Efficiency
Figure 2 shows the efficiency for the TPS54218EVM-511 at lower output currents on a semi log scale atan ambient temperature of 25 °C.
Figure 2. TPS54218EVM-511 Low Current Efficiency
The efficiency may be lower at higher ambient temperatures, due to temperature variation in thedrain-to-source resistance of the internal MOSFET.
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2.3 Output Voltage Load Regulation
-0.25
-0.2
-0.15
-0.1
-0.05
0
0.05
0.1
0.15
0.2
0.25
0 0.25 0.5 0.75 1 1.25 1.5 1.75 2
I - Output Current - A
O
Output Voltage Change - %
V = 3.3 V
I
2.4 Output Voltage Line Regulation
1.79
1.792
1.794
1.796
1.798
1.8
1.802
1.804
1.806
1.808
1.81
3 3.5 4 4.5 5 5.5 6
V - Input Voltage - V
I
V - Output Voltage - V
O
I = 1
O
Test Setup and Results www.ti.com
Figure 3 shows the load regulation for the TPS54218EVM-511.
Figure 3. TPS54218EVM-511 Load Regulation
Measurements are given for an ambient temperature of 25 °C.
Figure 4 shows the line regulation for the TPS54218EVM-511.
Figure 4. TPS54218EVM-511 Line Regulation
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2.5 Load Transients
V = 50 mV/div (ac coupled)
OUT
I = 1 A/div,
0.5 to 1.5 A step
OUT
Time = 2 ms/div
2.6 Loop Characteristics
60
-60
Gain
10 1M
f - Frequency - Hz
Phase
180
-180
Gain
Fhase
www.ti.com Test Setup and Results
Figure 5 shows the TPS54318EVM-375 response to load transients. The current step is from 25% to 75%of maximum rated load at 3.3 V input. Total peak-to-peak voltage variation is as shown, including rippleand noise on the output.
Figure 5. TPS54218EVM-511 Transient Response
Figure 6 shows the TPS54218EVM-511 loop-response characteristics. Gain and phase plots are shownfor V
IN
voltage of 3.3 V. Load current for the measurement is 2 A.
Figure 6. TPS54218EVM-511 Loop Response
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2.7 Output Voltage Ripple
V = 10 mV/div (ac coupled)
OUT
PH = 2 V/div
Time = 500 ns/div
2.8 Input Voltage Ripple
V = 50 mV/div (ac coupled)
I
PH = 2 V/div
Time = 500 ns/div
Test Setup and Results www.ti.com
Figure 7 shows the TPS54218EVM-511 output voltage ripple. The output current is the rated full load of2 A and V
IN
= 3.3 V. The ripple voltage is measured directly across the output capacitors.
Figure 7. TPS54218EVM-511 Output Ripple
Figure 8 shows the TPS54218EVM-511 input voltage ripple. The output current is the rated full load of2 A and V
IN
= 3.3 V. The ripple voltage is measured directly across the input capacitors.
Figure 8. TPS54218EVM-511 Input Ripple
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2.9 Powering Up
V = 2 V/div
I
EN = 1 V/div
SS = 1 V/div
V = 1 V/div
O
Time = 5 ms/div
V = 2 V/div
I
EN = 1 V/div
SS = 1 V/div
V = 1 V/div
O
Time = 5 ms/div
www.ti.com Test Setup and Results
Figure 9 and Figure 10 show the start-up waveforms for the TPS54218EVM-511. In Figure 9 , the outputvoltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R
1
and R
2resistor divider network. In Figure 10 , the input voltage is initially applied and the output is inhibited byusing a jumper at J2 to tie EN to GND. When the jumper is removed, EN is released. When the ENvoltage reaches the enable-threshold voltage, the start-up sequence begins and the output voltage rampsup to the externally set value of 1.8 V. The input voltage for these plots is 5 V and the load is 1 Ω.
Figure 9. TPS54218EVM-511 Start-Up Relative to V
IN
Figure 10. TPS54218EVM-511 Start-up Relative to Enable
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3 Board Layout
3.1 Layout
Board Layout www.ti.com
This section provides a description of the TPS54218EVM-511, board layout, and layer illustrations.
Figure 11 through Figure 15 shows the board layout for the TPS54218EVM-511. The topside layer of theEVM is laid out in a manner typical of a user application. The top, bottom and internal layers are 2-oz.copper.
The top layer contains the main power traces for V
IN
, V
OUT
, and VPHASE. Also on the top layer areconnections for the remaining pins of the TPS54218 and a large area filled with ground. The bottom andinternal layers contain ground planes only. The top-side ground areas are connected to the bottom andinternal ground planes with multiple vias placed around the board including four vias directly under theTPS54218 device to provide a thermal path from the top-side ground area to the bottom-side and internalground planes.
The input decoupling capacitors (C2, and C3) and bootstrap capacitor (C6) are all located as close to theIC as possible. In addition, the voltage set-point resistor divider components are also kept close to the IC.The voltage divider network ties to the output voltage at the point of regulation, the copper V
OUT
trace nearthe output connector J4. For the TPS54218, an additional input bulk capacitor may be required, dependingon the EVM connection to the input supply.
Figure 11. TPS54218EVM-511 Top-Side Layout
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