Texas Instruments TPS54386EVM User manual

Using the TPS54386EVM
User's Guide
March 2008 Power Supply MAN
SLUU286

Using the TPS54386EVM
User's Guide
Literature Number: SLUU286March 2008

1 Introduction
1.1 Description
1.2 Applications
1.3 Features
User's GuideSLUU286 – March 2008
A 12-V Input, 5.0-V and 3.3-V Output, 2-ANon-Synchronous Buck Converter
The TPS54386EVM evaluation module (EVM) is a dual non-synchronous buck converter providing fixed5.0-V and 3.3-V output at up to 2 A each from a 12-V input bus. The EVM is designed to start up from asingle supply, so no additional bias voltage is required for start-up. The module uses the TPS54386 DualNon-Synchronous Buck Converter with Integral High-Side FET.
TPS54386EVM is designed to use a regulated 12-V (+10% / -20%) bus to produce two regulated powerrails, 5.0 V and 3.3 V at up to 2 A of load current each. TPS54386EVM is designed to demonstrate theTPS54386 in a typical 12-V bus system while providing a number of test points to evaluate theperformance of the TPS54386 in a given application. The EVM can be modified to other input or outputvoltages by changing some of the components.
•Non-Isolated Low Current Point of Load and Voltage Bus Converters•Consumer Electronics•LCD TV•Computer Peripherals•Digital Set Top Box
•12-V (+10% / -20%) Input Range•5.0-V and 3.3-V Fixed Output Voltage, Adjustable with Resistor Change•2-A
DC
Steady State Output Current (3 A Peak)•600-kHz Switching Frequency (fixed by TPS54386)•Internal Switching MOSFET and External Rectifier Diode•Double Sided 2 Active Layer PCB (all components on top side, test point signals routed on internallayers)
•Active Converter Area Less than 1.8 Square Inches (0.89” x 1.97”)•Convenient Test Points (used for probing switching waveforms and non-invasive loop response testing)
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2 TPS54386EVM Electrical Performance Specifications
TPS54386EVM Electrical Performance Specifications
Table 1. Electrical Performance Specifications
SYMBOL PARAMETER MIN TYP MAX UNITS
Input Characterstics
V
IN
Input coltage 9.6 12 13.2 VI
IN
Input current V
IN
= nom, I
OUT
= max - 1.6 2.0 ANo load input current V
IN
= nom, I
OUT
= 0 A - 12 20 mAV
IN_UVLO
Input UVLO I
OUT
= min to max 4.0 4.2 4.4 V
Output Characterstics
V
OUT1
Output voltage 1 V
IN
= nom, I
OUT
= nom 4.85 5.0 5.15
VV
OUT2
Output voltage 2 V
IN
= nom, I
OUT
= nom 3.20 3.3 3.40Line regulation V
IN
= min to max - - 1%Load regulation IOUT = min to max - - 1%V
OUT_ripple
Output voltage ripple V
IN
= nom, I
OUT
= max - - 30 mV
pp
I
OUT1
Output current 1 V
IN
= min to max 0 2.0I
OUT2
Output current 2 V
IN
= min to max 0 2.0Output over current
AI
OCP1
V
IN
= nom, V
OUT
= V
OUT1
- 5% 3.1 3.7 4.5Channel 1Output over currentI
OCP2
V
IN
= nom, V
OUT
= V
OUT2
- 5% 3.1 3.7 4.5Channel 2
Systems Characterstics
F
SW
Switching frequency 510 630 750 kHzηpk Peak efficiency V
IN
= nom - 90% -ηFull load efficiency V
IN
= nom, I
OUT
= max - 85% -Operating temperature °CTop V
IN
= min to max, I
OUT
= min to max 0 25 60range
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3 Schematic
+
Schematic
Figure 1. TPS54386EVM Schematic
Note: For reference only, see Table 3 , List of Materials for specific values.
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3.1 Sequencing Jump (JP3)
3.2 Enable Jumpers (JP1 and JP2)
3.3 Test Point Descriptions
Schematic
The TPS54386EVM provides a 3-pin, 100-mil header and shunt for programming the TPS54386’ssequencing function. Placing the JP3 shunt in the left position connects the sequence pin to BP and setsthe TPS54386 controller to sequence Channel 2 prior to Channel 1 when Enable 2 is activated. Placingthe JP3 shunt in the right position connects the sequence pin to GND and sets the TPS54386 converter tosequence Channel 1 prior to Channel 1 when Enable 1 is activated. Removing the JP3 shunt disablessequencing and allows Channel 1 and Channel 2 to be enabled independently.
TPS54386EVM provides separate 3-pin, 100-mil headers and shunts for exercising the TPS54386 Enablefunctions. When JP3 is removed placing the JP1 shunt in the left position connects EN1 to ground andturns on Output 1 and placing the JP2 shunt in the left position connects EN2 to ground and turns onOutput 2.
When the JP3 shunt is in the LEFT position, placing the JP2 shunt in the left position connects EN2 toground and turns on first Output 2 and then Output 1.
When the JP3 shunt is in the RIGHT position, placing the JP1 shunt in the left position connects EN1 toground and turns on first Output 1 and then Output 2.
Table 2. Test Point Descriptions
TEST POINT LABLE USE SECTION
TP1 VIN Monitor input voltage Section 3.3.1TP2 GND Ground for input voltage Section 3.3.1TP3 VOUT1 Monitor VOUT1 Voltage Section 3.3.2TP4 GND Ground for VOUT1 voltage Section 3.3.2TP5 GND Ground for Channel B loop monitoring Section 3.3.3TP6 CHB Channel B for loop monitoring Section 3.3.3TP7 GND Ground for Channel A loop monitoring Section 3.3.3TP8 CHA Channel A for loop monitoring Section 3.3.3TP9 SW1 Monitor switching node of Channel 1 Section 3.3.4TP10 GND Ground for switch node of Channel 1 Section 3.3.4TP11 IC_GND Monitor device ground Section 3.3.5TP12 SW2 Monitor switching node of Channel 2 Section 3.3.6TP13 GND Ground for switch node of Channel 2 Section 3.3.6TP14 CHA Channel A for loop monitoring Section 3.3.7TP15 GND Ground for Channel A loop monitoring Section 3.3.7TP16 CHB Channel B for loop monitoring Section 3.3.7TP17 GND Ground for Channel B loop monitoring Section 3.3.7TP18 VOUT2 Monitor VOUT2 voltage Section 3.3.8TP19 GND Ground for VOUT2 voltage Section 3.3.8
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3.3.1 Input Voltage Monitoring (TP1 and TP2)
3.3.2 Channel 1 Output Voltage Monitoring (TP3 and TP4)
3.3.3 Channel 1 Loop Analysis (TP5, TP6, TP7 and TP8)
3.3.4 Channel 1 Switching Waveforms (TP9 and TP10)
3.3.5 TPS54386 Device Ground (TP11)
3.3.6 Channel 2 Switching Waveforms (TP12 and TP13)
3.3.7 Channel 2 Loop Analysis (TP14, TP15, TP16 and TP17)
3.3.8 Output Voltage Monitoring (TP18 and TP19)
Schematic
TPS54386EVM provides two test points for measuring the voltage applied to the module. This allows theuser to measure the actual module voltage without losses from input cables and connectors. All inputvoltage measurements should be made between TP1 and TP2. To use TP1 and TP2, connect a voltmeterpositive terminal to TP1 and negative terminal to TP2.
TPS54386EVM provides two test points for measuring the voltage generated by the module. This allowsthe user to measure the actual module output voltage without losses from output cables and connectors.All output voltage measurements should be made between TP3 and TP4. To use TP3 and TP4, connect avoltmeter positive terminal to TP3 and negative terminal to TP4. For Output ripple measurements, TP3and TP4 allow a user to limit the ground loop area by using the Tip and Barrel measurement techniqueshown in Figure 3 . All output ripple measurements should be made using the Tip and Barrelmeasurement.
TPS54386EVM contains a 51- Ωseries resistor (R1) in the feedback loop to allow for matched impedancesignal injection into the feedback for loop response analysis. An isolation transformer should be used toapply a small (30 mV or less) signal across R1 through TP6 and TP8. By monitoring the ac injection levelat TP8 and the returned ac level at TP6, the power supply loop response can be determined.
TPS54386EVM provides a test point and a local ground connection (TP10) for the monitoring of theChannel 1 power stage switching waveform. Connect an oscilloscope probe to TP9 to monitor the switchnode voltage for Channel 1.
TPS54386EVM provides a test point for the device ground. To measure the device pin voltages, connectthe ground of the oscilloscope probe to TP11.
TPS54386EVM provides a test point and a local ground connection (TP13) for the monitoring of theChannel 1 power stage switching waveform. Connect an oscilloscope probe to TP12 to monitor the switchnode voltage for Channel 1.
TPS54386EVM contains a 51- Ωseries resistor (R10) in the feedback loop to allow for matchedimpedance signal injection into the feedback for loop response analysis. An isolation transformer shouldbe used to apply a small (30 mV or less) signal across R10 through TP14 and TP16. By monitoring the acinjection level at TP14 and the returned ac level at TP16, the power supply loop response can bedetermined.
TPS54386EVM provides two test points for measuring the voltage generated by the module. This allowsthe user to measure the actual module output voltage without losses from output cables and connectorlosses. All output voltage measurements should be made between TP18 and TP19. To use TP18 andTP19, connect a voltmeter positive terminal to TP18 and negative terminal to TP19. For output ripplemeasurements, TP18 and TP19 allow a user to limit the ground loop area by using the Tip and Barrelmeasurement technique shown in Figure 3 . All output ripple measurements should be made using the Tipand Barrel measurement.
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4 4 Test Set Up
4.1 Equipment
4.1.1 Voltage Source
4.1.2 Meters
4.1.3 Loads
4.1.4 Oscilloscope
4.1.5 Recommended Wire Gauge
4.1.6 Other
4 Test Set Up
VIN: The input voltage source (VIN) should be a 0-15 V variable dc source capable of 5 A
DC
. Connect VINto J1 as shown in Figure 3 .
•A1: 0-3 A
DC
, ammeter•V1: VIN, 0-15 V voltmeter•V2: VOUT1 0-6 V voltmeter•V3: VOUT2 0-4 V voltmeter
LOAD1: The Output1 Load (LOAD1) should be an electronic constant current mode load capable of 0-2A
DC
at 5.0 V
LOAD2: The Output2 Load (LOAD2) should be an electronic constant current mode load capable of 0-2A
DC
at 3.3 V
Oscilloscope: A digital or analog oscilloscope can be used to measure the ripple voltage on VOUT. Theoscilloscope should be set for 1-M Ωimpedance, 20-MHz bandwidth, ac coupling, 1- µs/division horizontalresolution, 10-mV/division vertical resolution for taking output ripple measurements. TP3 and TP4 or TP18and TP19 can be used to measure the output ripple voltages by placing the oscilloscope probe tip throughTP3 or TP18 and holding the ground barrel to TP4 or TP19 as shown in Figure 3 . For a hands freeapproach, the loop in TP4 or TP19 can be cut and opened to cradle the probe barrel. Using a leadedground connection may induce additional noise due to the large ground loop area.
VIN to J1: The connection between the source voltage, VIN and J1 of HPA241 can carry as much as 5A
DC
. The minimum recommended wire size is AWG #16 with the total length of wire less than 4 feet (2feet input, 2 feet return).
J2 to LOAD1: The power connection between J2 of HPA241 and LOAD1 can carry as much as 2 A
DC
.The minimum recommended wire size is AWG #18, with the total length of wire less than 2 feet (1 footoutput, 1 foot return).
J3 to LOAD2: The power connection between J3 of HPA241 and LOAD2 can carry as much as 2 A
DC
.The minimum recommended wire size is AWG #18, with the total length of wire less than 2 feet (1 footoutput, 1 foot return).
Fan: This evaluation module includes components that can get hot to the touch, because this EVM is notenclosed to allow probing of circuit nodes, a small fan capable of 200-400 lfm is recommended to reducecomponent surface temperatures to prevent user injury. The EVM should not be left unattended whilepowered. The EVM should not be probed while the fan is not running.
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4.2 Equipment Setup
4.2.1 Procedure
4.2.2 Diagram
FAN
LOAD1
5.0V @
2A
-
+
V2
-
+
See Tip and Barrel
Measurement for Vout
ripple
Oscilloscope
1MW, AC
20mV / div
20MHz
LOAD2
3.3V @
2A
+
-
V3
-
+
V1
+
-
A1
-
+
V
VIN
4 Test Set Up
Shown in Figure 2 is the basic test set up recommended to evaluate the TPS54386EVM. Please note thatalthough the return for J1, J2 and JP3 are the same system ground, the connections should remainseparate as shown in Figure 2
1. Working at an ESD workstation, make sure that any wrist straps, bootstraps or mats are connectedreferencing the user to earth ground before power is applied to the EVM. Electrostatic smock andsafety glasses should also be worn.2. Prior to connecting the dc input source, VIN, it is advisable to limit the source current from VIN to 5.0 Amaximum. Make sure VIN is initially set to 0 V and connected as shown in Figure 2 .3. Connect the ammeter A1 (0-5 A range) between VIN and J1 as shown in Figure 2 .4. Connect voltmeter V1 to TP1 and TP2 as shown in Figure 2 .5. Connect LOAD1 to J2 as shown in Figure 2 . Set LOAD1 to constant current mode to sink 0 A
DC
beforeVIN is applied.6. Connect voltmeter, V2 across TP3 and TP4 as shown in Figure 2 .7. Connect LOAD2 to J3 as shown in Figure 2 . Set LOAD2 to constant current mode to sink 0 A
DC
beforeVIN is applied.8. Connect voltmeter, V3 across TP18 and TP19 as shown in Figure 2 .9. Place fan as shown in Figure 2 and turn on, making sure air is flowing across the EVM.
Figure 2. TPS54386EVM Recommended Test Set-Up
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TP4 /
TP19
TP3 /
TP18
Metal Ground Barrel
Probe Tip
Tip and Barrel Vout ripple measurement
FAN
V1
+
-
A1
-
+
V
VIN
LOAD1
5.0V @
2A
-
+
V2
-
+
LOAD2
3.3V @
2A
+
-
V3
-
+
Isolation
Transformer
4 Test Set Up
Figure 3. Tip and Barrel Measurement Technique (output ripple measurement using TP3 and TP4 or TP18and TP19)
Figure 4. Control Loop Measurement Setup
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4.3 Start Up / Shut Down Procedure
4.4 Output Ripple Voltage Measurement Procedure
4.5 Control Loop Gain and Phase Measurement Procedure
7. Control loop gain can be measured by:
20 ChannelB LOG
ChannelA
æ ö
´ç ÷
è ø
4.6 Equipment Shutdown
4 Test Set Up
1. Increase VIN from 0 V to 12 V
DC
.2. Vary LOAD1 from 0 – 2 A
DC3. Vary LOAD2 from 0 – 2 A
DC4. Vary VIN from 9.6 V
DC
to 13.2 V
DC5. Decrease VIN to 0 V
DC6. Decrease LOAD1 to 0 A.
1. Increase VIN from 0 V to 12 V
DC
.2. Adjust LOAD1 to desired load between 0 A
DC
and 2 A
DC
.3. Adjust VIN to desired load between 9.6 V
DC
and 13.2 V
DC
.4. Connect oscilloscope probe to TP3 and TP4 or TP18 and TP19 as shown in Figure 3 .5. Measure output ripple.6. Decrease VIN to 0 V
DC
.7. Decrease LOAD1 to 0 A.
1. Connect 1 kHz to 1 MHz isolation transformer to TP6 and TP8 as show in Figure 4 .2. Connect input signal amplitude measurement probe (Channel A) to TP8 as shown in Figure 4 .3. Connect output signal amplitude measurement probe (Channel B) to TP6 as shown in Figure 4 .4. Connect ground lead of Channel A and Channel B to TP5 & TP7 as shown in Figure 4 .5. Inject 30 mV or less signal across R1 through isolation transformer.6. Sweep frequency from 1 kHz to 1 MHz with 10 Hz or lower post filter.
8. Control loop phase is measured by the phase difference between Channel A and Channel B.9. Control loop for Channel 2 can be measured by making the following substitutions.a. Change TP6 to TP16b. Change TP8 to TP14c. Change TP5 to TP17d. Change TP7 to TP1510. Disconnect isolation transformer before making any other measurements (signal injection intofeedback may interfere with accuracy of other measurements).
1. Shut down oscilloscope2. Shut down VIN3. Shut down LOAD14. Shut down fan
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5 TPS54386EVM Typical Performance Data and Characteristic Curves
5.1 Efficiency
0.10 1.24
ILOAD - Load Current - A
95
85
80
75
60
0.48 0.86 1.62
90
h- Efficiency - %
EFFICIENCY(V
OUT = 5.0 V)
vs
LOADCURRENT
70
65
ILOAD - Load Current - A
90
75
65
60
85
h- Efficiency - %
EFFICIENCY(V
OUT = 3.3 V)
vs
LOADCURRENT
50
2.00
13.2 V
9.6 V
12.0 V
0.10 1.240.48 0.86 1.62 2.00
13.2 V
9.6 V
12.0 V
55
70
80
TPS54386EVM Typical Performance Data and Characteristic Curves
Figure 5 through Figure 9 present typical performance curves for the TPS54386EVM. Since actualperformance data can be affected by measurement techniques and environmental variables, these curvesare presented for reference and may differ from actual field measurements.
Figure 5. TPS54386EVM Efficiency verse Load Current V
IN
=9.6-13.2 V, V
OUT1
= 5.0 V I
OUT1
= 0-2 A, V
OUT2
=3.3 V I
OUT2
= 0-2 A
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5.2 Line and Load Regulation
0.10 1.62
ILOAD - Load Current - A
5.020
5.010
5.000
0.48 1.24 2.00
5.015
h- Efficiency - %
EFFICIENCY(V
OUT2 = 5.0 V)
vs
LOADCURRENT
5.005
ILOAD - Load Current - A
3.340
h- Efficiency - %
EFFICIENCY(V
OUT1 = 3.3 V)
vs
LOADCURRENT
3.320
3.333
3.330
3.325
3.338
13.2 V
9.6 V
12.0 V
13.2 V
9.6 V
12.0 V
3.323
3.335
0.860.10 1.620.48 1.24 2.000.86
3.328
5.3 Output Voltage Ripple
TPS54386EVM Typical Performance Data and Characteristic Curves
Figure 6. TPS54386EVM Output Voltage verse Load Current V
IN
=9.6-13.2 V, V
OUT1
= 5.0 V I
OUT1
= 0-2 A,V
OUT2
= 3.3 V I
OUT2
= 0-2 A
Figure 7. TPS54386EVM Output Voltage Ripple (V
IN
= 13.2 V, I
OUT1
= I
OUT2
= 2 A)
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5.4 Switch Node
5.5 Control Loop Bode Plot (low line, V
IN
= 8 V)
f - Frequency - Hz
72
0
-72
100 1000
36
Gain - dB
GAIN/PHASE
vs
FREQUENCY(V
OUT = 5.0 V, IOUT = 2 A)
-36
10
Gain
Phase
-48
-60
-12
-24
24
12
60
48
90
-45
-180
Phase - °
-135
-90
0
45
0
GAIN/PHASE
vs
FREQUENCY(V
OUT = 3.3 V, IOUT = 2 A)
f - Frequency - Hz
100 1000100
100
20
-60
60
Gain - dB
-20
-40
0
40
80
Phase - °
90
-45
-90
0
45
Gain
Phase
TPS54386EVM Typical Performance Data and Characteristic Curves
Figure 8. TPS54386EVM Switching Waveforms V
IN
= 12 V, I
OUT
= 2 A Ch1: TP9 (SW1), Ch2: TP12 (SW2)
Figure 9. TPS54386EVM Gain and Phase vs Frequency
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6 EVM Assembly Drawings and Layout
EVM Assembly Drawings and Layout
The following figures (Figure 10 through Figure 12 ) show the design of the TPS54386EVM printed circuitboard. The EVM has been designed using a 4-Layer, 2-oz copper-clad circuit board 3.0” x 3.0” with allcomponents in a 1.15” x 2.15” active area on the top side and all active traces to the top and bottomlayers to allow the user to easily view, probe and evaluate the TPS54386 control device in a practicaldouble-sided application. Moving components to both sides of the PCB or using additional internal layerscan offer additional size reduction for space constrained systems.
Figure 10. TPS54386EVM Component Placement (viewed from top)
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EVM Assembly Drawings and Layout
Figure 11. TPS54386EVM Top Copper (viewed from top)
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EVM Assembly Drawings and Layout
Figure 12. TPS54386EVM Bottom Copper (x-ray view from top)
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7 List of Materials
List of Materials
Table 3. TPS54386EVM List of Materials
QTY REF DES DESCRIPTION MFR PART NUMBER
1 C1 Capacitor, aluminum, 25 V, 20%, 100 µF, 0.328 x Panasonic EEEFC1E101P0.390 inch2 C10, C11 Capacitor, ceramic, 25 V, X5R, 20%, 10 µF, 1210 TDK C3216X5R1E106M1 C12 Capacitor, ceramic, 10 V, X5R, 20%, 4.7 µF, 0805 Std Std1 C15 Capacitor, ceramic, 25 V, X7R, 20%, 22 nF, 0603 Std Std2 C2, C20 Capacitor, ceramic, 10 V, X7R, 20%, 0.1 µF, 0603 Std Std4 C3, C4, C18, C19 Capacitor, ceramic, 6.3 V, X5R, 20%, 10 µF, 0805 TDK C2012X5R0J106M2 C5, C17 Capacitor, ceramic, 6.3 V, X5R, 20%, 47 µF, 1206 Std Std2 C7, C14 Capacitor, ceramic, 25 V, X7R, 20%, 470 pF, 0603 Std Std1 C8 Capacitor, ceramic, 25 V, X7R, 20%, 33 nF, 0603 Std Std2 C9, C13 Capacitor, ceramic, 25 V, X7R, 20%, 0.047 µF, 0603 Std Std2 D1, D2 Diode, Schottky, 3 A, 30 V, MBRS330T3, SMC On Semi MBRS330T32 L1, L2 Inductor, power, 4.38 A, 0.02 Ω, 8.2 µH, 0.402 x Coilcraft MSS1048-822L0.392 inch2 R1, R10 Resistor, chip, 1/16 W, 5%, 51 Ω, 0603 Std Std2 R2, R9 Resistor, chip, 1/16 W, 1%, 20 k Ω, 0603 Std Std2 R3, R8 Resistor, chip, 1/16 W, 5%, 10 Ω, 0603 Std Std1 R4 Resistor, chip, 1/16 W, 1%, 3.83 k Ω, 0603 Std Std3 R5, R6, R11 Resistor, chip, 1/16 W, 5%, 0 Ω, 0603 Std Std1 R7 Resistor, chip, 1/16 W, 1%, 6.49 k Ω, 0603 Std Std1 R12 Resistor, chip, 1/16 W, 1%, 1.54 k Ω, 0603 Std Std1 R13 Resistor, chip, 1/16 W, 1%, 3.32 k Ω, 0603 Std Std3 TP1, TP3, TP18 Test point, red, thru hole, 5010, 0.125 x 0.125 inch Keystone 50101 U1** TPS54386PWP, HTSSOP-14 TI TPS54386PWP
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