TQ-Systems TQMa93 CA Series User manual

TQMa93xxCA
User's Manual
TQMa93xxCA UM 0001
13.04.2023

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page i
TABLE OF CONTENTS
1. ABOUT THIS MANUAL......................................................................................................................................................................................1
1.1 Copyright and license expenses..................................................................................................................................................................1
1.2 Registered trademarks ....................................................................................................................................................................................1
1.3 Disclaimer ............................................................................................................................................................................................................1
1.4 Imprint...................................................................................................................................................................................................................1
1.5 Tips on safety......................................................................................................................................................................................................2
1.6 Symbols and typographic conventions....................................................................................................................................................2
1.7 Handling and ESD tips.....................................................................................................................................................................................2
1.8 Naming of signals..............................................................................................................................................................................................3
1.9 Further applicable documents / presumed knowledge.....................................................................................................................3
2. BRIEF DESCRIPTION ..........................................................................................................................................................................................4
2.1 Key functions and characteristics................................................................................................................................................................4
2.2 CPU block diagram ...........................................................................................................................................................................................5
3. ELECTRONICS......................................................................................................................................................................................................6
3.1 Interfaces to other systems and devices...................................................................................................................................................6
3.1.1 Pin multiplexing ................................................................................................................................................................................................6
3.1.2 Pinout TQMa93xxCA........................................................................................................................................................................................7
3.2 System components ........................................................................................................................................................................................9
3.2.1 i.MX 93...................................................................................................................................................................................................................9
3.2.1.1 i.MX 93 derivatives............................................................................................................................................................................................9
3.2.1.2 i.MX 93 errata......................................................................................................................................................................................................9
3.2.1.3 Boot modes ......................................................................................................................................................................................................10
3.2.1.4 Boot configuration......................................................................................................................................................................................... 10
3.2.2 Memory..............................................................................................................................................................................................................11
3.2.2.1 LPDDR4 SDRAM..............................................................................................................................................................................................11
3.2.2.2 eMMC..................................................................................................................................................................................................................11
3.2.2.3 QSPI NOR Flash / NAND Flash.................................................................................................................................................................... 11
3.2.2.4 EEPROM M24C64-D....................................................................................................................................................................................... 12
3.2.2.5 EEPROM with temperature sensor SE97BTP ........................................................................................................................................ 12
3.2.3 Trust Secure Element SE050....................................................................................................................................................................... 12
3.2.4 Accelerometer/Gyroscope.......................................................................................................................................................................... 13
3.2.5 RTC.......................................................................................................................................................................................................................13
3.2.5.1 i.MX 93 internal RTC ......................................................................................................................................................................................13
3.2.5.2 Discrete RTC PCF85063A............................................................................................................................................................................. 13
3.2.6 Interfaces...........................................................................................................................................................................................................14
3.2.6.1 Overview ...........................................................................................................................................................................................................14
3.2.6.2 ADC......................................................................................................................................................................................................................15
3.2.6.3 CAN FD...............................................................................................................................................................................................................15
3.2.6.4 Ethernet / RGMII..............................................................................................................................................................................................16
3.2.6.5 I2C......................................................................................................................................................................................................................... 17
3.2.6.6 JTAG ....................................................................................................................................................................................................................18
3.2.6.7 GPIO ....................................................................................................................................................................................................................18
3.2.6.8 MIPI CSI ..............................................................................................................................................................................................................19
3.2.6.9 MIPI DSI..............................................................................................................................................................................................................19
3.2.6.10 LVDS.................................................................................................................................................................................................................... 20
3.2.6.11 SAI........................................................................................................................................................................................................................ 20
3.2.6.12 SPI ........................................................................................................................................................................................................................21
3.2.6.13 Tamper...............................................................................................................................................................................................................22
3.2.6.14 UART ...................................................................................................................................................................................................................22
3.2.6.15 USB ......................................................................................................................................................................................................................23
3.2.6.16 SD2 (SD-Card)..................................................................................................................................................................................................24
3.2.6.17 External clock sources .................................................................................................................................................................................. 25
3.2.7 Reset and unspecific signals ...................................................................................................................................................................... 25
3.2.8 Power.................................................................................................................................................................................................................. 26
3.2.8.1 Power supply ...................................................................................................................................................................................................26
3.2.8.2 Configurable voltages..................................................................................................................................................................................26
3.2.8.3 Power consumption...................................................................................................................................................................................... 27
3.2.8.4 Voltage monitoring....................................................................................................................................................................................... 27
3.2.8.5 Supply outputs................................................................................................................................................................................................27
3.2.8.6 Power-Up sequence TQMa93xxCA / carrier board............................................................................................................................28
3.2.8.7 Standby and BBSM ........................................................................................................................................................................................ 28

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page ii
3.2.8.8 PMIC....................................................................................................................................................................................................................28
3.2.9 Impedances...................................................................................................................................................................................................... 29
4. SOFTWARE........................................................................................................................................................................................................ 30
5. MECHANICS......................................................................................................................................................................................................31
5.1 Dimensions....................................................................................................................................................................................................... 31
5.2 Component placement and labeling......................................................................................................................................................32
5.3 Adaptation to the environment ...............................................................................................................................................................34
5.4 Protection against external effects..........................................................................................................................................................34
5.5 Thermal management..................................................................................................................................................................................34
5.6 Structural requirements............................................................................................................................................................................... 34
6. SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS ............................................................................................................35
6.1 EMC .....................................................................................................................................................................................................................35
6.2 ESD....................................................................................................................................................................................................................... 35
6.3 Shock and Vibration................................................................................................................................................................................... 35
6.4 Climate and operational conditions........................................................................................................................................................ 36
6.5 Operational safety and personal security..............................................................................................................................................36
6.6 Reliability and service life............................................................................................................................................................................36
7. ENVIRONMENT PROTECTION.....................................................................................................................................................................37
7.1RoHS.................................................................................................................................................................................................................... 37
7.2 WEEE®.................................................................................................................................................................................................................37
7.3 REACH®.............................................................................................................................................................................................................. 37
7.4 EuP....................................................................................................................................................................................................................... 37
7.5 Battery................................................................................................................................................................................................................ 37
7.6 Packaging..........................................................................................................................................................................................................37
7.7 Other entries....................................................................................................................................................................................................37
8. APPENDIX.......................................................................................................................................................................................................... 38
8.1 Acronyms and definitions...........................................................................................................................................................................38
8.2 References ........................................................................................................................................................................................................40

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page iii
TABLE DIRECTORY
Table 1: Terms and conventions ..................................................................................................................................................................................2
Table 2: Pinout TQMa93xxCA, X1.................................................................................................................................................................................7
Table 3: Pinout TQMa93xxCA, X2.................................................................................................................................................................................8
Table 4: i.MX 93 derivatives............................................................................................................................................................................................9
Table 5: Boot configuration i.MX 93.........................................................................................................................................................................10
Table 6: QSPI signals ......................................................................................................................................................................................................11
Table 7: ISO_7816 and ISO_14443 signals.............................................................................................................................................................13
Table 8: TQMa93xxCA interfaces...............................................................................................................................................................................14
Table 9: Pin assignment ADC......................................................................................................................................................................................15
Table 10: CAN FD signals................................................................................................................................................................................................15
Table 11: ENET signals in RGMII mode.......................................................................................................................................................................16
Table 12: Address assignment I2C1 bus.................................................................................................................................................................... 17
Table 13: Pin assignment I2C .........................................................................................................................................................................................17
Table 14: JTAG signals ..................................................................................................................................................................................................... 18
Table 15: GPIO signals......................................................................................................................................................................................................18
Table 16: MIPI CSI signals................................................................................................................................................................................................ 19
Table 17: MIPI DSI signals ............................................................................................................................................................................................... 19
Table 18: LVDS signals..................................................................................................................................................................................................... 20
Table 19: SAI signals .........................................................................................................................................................................................................21
Table 20: Pinning SPI........................................................................................................................................................................................................21
Table 21: Pinning Tamper .............................................................................................................................................................................................. 22
Table 22: UART signals..................................................................................................................................................................................................... 23
Table 23: USB signals........................................................................................................................................................................................................23
Table 24: SD2 signals........................................................................................................................................................................................................ 24
Table 25: CLK signals........................................................................................................................................................................................................25
Table 26: Reset and unspecific signals ......................................................................................................................................................................26
Table 27: Power consumption...................................................................................................................................................................................... 27
Table 28: Voltages provided by TQMa93xxCA .......................................................................................................................................................27
Table 29: PMIC signals .....................................................................................................................................................................................................29
Table 30: Trace impedance recommendations......................................................................................................................................................29
Table 31: TQMa93xxCA heights ...................................................................................................................................................................................31
Table 32: Labels on TQMa93xxCA ...............................................................................................................................................................................33
Table 33: Shock resistance .............................................................................................................................................................................................35
Table 34: Vibration resistance....................................................................................................................................................................................... 35
Table 35: Climate and operational conditions........................................................................................................................................................ 36
Table 36: Acronyms ..........................................................................................................................................................................................................38
Table 37: Further applicable documents..................................................................................................................................................................40

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page iv
FIGURE DIRECTORY
Figure 1: Block diagram i.MX 93.....................................................................................................................................................................................5
Figure 2: Block diagram TQMa93xxCA (simplified).................................................................................................................................................6
Figure 3: Block diagram eMMC.................................................................................................................................................................................... 11
Figure 4: Block diagram EEPROM................................................................................................................................................................................ 12
Figure 5: Block diagram SE050..................................................................................................................................................................................... 12
Figure 6: Block diagram RTC supply (TQMa93xxCA with discrete RTC)........................................................................................................14
Figure 7: Block diagram ADC........................................................................................................................................................................................ 15
Figure 8: Block diagram CAN........................................................................................................................................................................................15
Figure 9: Block diagram RGMII..................................................................................................................................................................................... 16
Figure 10: Block diagram I2C ...........................................................................................................................................................................................17
Figure 11: Block diagram JTAG interface.................................................................................................................................................................... 18
Figure 12: Block diagram MIPI CSI.................................................................................................................................................................................19
Figure 13: Block diagram MIPI DSI ................................................................................................................................................................................ 19
Figure 14: Block diagram LVDS ...................................................................................................................................................................................... 20
Figure 15: Block diagram SAI3........................................................................................................................................................................................20
Figure 16: Block diagram SPI...........................................................................................................................................................................................21
Figure 17: Block diagram Tamper .................................................................................................................................................................................22
Figure 18: Block diagram UART interfaces.................................................................................................................................................................22
Figure 19: Block diagram USB interfaces....................................................................................................................................................................23
Figure 20: Block diagram SD card interface............................................................................................................................................................... 24
Figure 21: Block diagram external clocks...................................................................................................................................................................25
Figure 22: Block diagram Reset......................................................................................................................................................................................25
Figure 23: Possible power supply of the CPU-rail NVCC_GPIO ..........................................................................................................................26
Figure 24: Block diagram power supply carrier board .......................................................................................................................................... 28
Figure 25: TQMa93xxCA dimensions, top view (dimensions in mm)............................................................................................................... 31
Figure 26: TQMa93xxCA dimensions, side view ......................................................................................................................................................31
Figure 27: TQMa93xxCA dimensions (in mm), view through PCB .................................................................................................................... 32
Figure 28: TQMa93xxCA, component placement top...........................................................................................................................................32
Figure 29: TQMa93xxCA, bottom view........................................................................................................................................................................ 33
Figure 30: Labels on TQMa93xxCA ...............................................................................................................................................................................33

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page v
REVISION HISTORY
Rev.
Date
Name
Pos.
Modification
0001
13.4.2023
Kreuzer
First issue

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 1
1. ABOUT THIS MANUAL
1.1 Copyright and license expenses
Copyright protected © 2023 by TQ-Systems GmbH.
This User's Manual may not be copied, reproduced, translated, changed or distributed, completely or partially in electronic,
machine readable, or in any other form without the written consent of TQ-Systems GmbH.
The drivers and utilities for the components used as well as the BIOS are subject to the copyrights of the respective
manufacturers. The licence conditions of the respective manufacturer are to be adhered to.
Bootloader-licence expenses are paid by TQ-Systems GmbH and are included in the price.
Licence expenses for the operating system and applications are not taken into consideration and must be calculated / declared
separately.
1.2 Registered trademarks
TQ-Systems GmbH aims to adhere to copyrights of all graphics and texts used in all publications, and strives to use original
or license-free graphics and texts.
All brand names and trademarks mentioned in this User's Manual, including those protected by a third party, unless specified
otherwise in writing, are subjected to the specifications of the current copyright laws and the proprietary laws of the present
registered proprietor without any limitation. One should conclude that brand and trademarks are rightly protected by a third
party.
1.3 Disclaimer
TQ-Systems GmbH does not guarantee that the information in this User's Manual is up-to-date, correct, complete or of good
quality. Nor does TQ-Systems GmbH assume guarantee for further usage of the information. Liability claims against TQ-Systems
GmbH, referring to material or non-material related damages caused, due to usage or non-usage of the information given in this
User's Manual, or due to usage of erroneous or incomplete information, are exempted, as long as there is no proven intentional
or negligent fault of TQ-Systems GmbH.
TQ-Systems GmbH explicitly reserves the rights to change or add to the contents of this User's Manual or parts of it without
special notification.
Important Notice:
Before using the Starterkit MBa93xxCA or parts of the schematics of the MBa93xxCA, you must evaluate it and determine if it is
suitable for your intended application. You assume all risks and liability associated with such use. TQ-Systems GmbH makes no
other warranties including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. Except
where prohibited by law, TQ-Systems GmbH will not be liable for any indirect, special, incidental or consequential loss or damage
arising from the usage of the Starterkit MBa93xxCA or schematics used, regardless of the legal theory asserted.
1.4 Imprint
TQ-Systems GmbH
Gut Delling, Mühlstraße 2
D-82229 Seefeld
Tel: [phone]
Fax: [phone]
E-Mail: Info@TQ-Group
Web: TQ-Group

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 2
1.5 Tips on safety
Improper or incorrect handling of the product can substantially reduce its life span.
1.6 Symbols and typographic conventions
Table 1: Terms and conventions
Symbol
Meaning
This symbol represents the handling of electrostatic-sensitive modules and / or components. These
components are often damaged / destroyed by the transmission of a voltage higher than about 50 V.
A human body usually only experiences electrostatic discharges above approximately 3,000 V.
This symbol indicates the possible use of voltages higher than 24 V.
Please note the relevant statutory regulations in this regard.
Non-compliance with these regulations can lead to serious damage to your health and may damage
or destroy the component.
This symbol indicates a possible source of danger.
Ignoring the instructions described can cause health damage, or damage the hardware.
This symbol represents important details or aspects for working with TQ-products.
Command
A font with fixed-width is used to denote commands, contents, file names, or menu items.
1.7 Handling and ESD tips
General handling of your TQ-products
The TQ-product may only be used and serviced by certified personnel who have taken note of the
information, the safety regulations in this document and all related rules and regulations.
A general rule is not to touch the TQ-product during operation. This is especially important when
switching on, changing jumper settings or connecting other devices without ensuring beforehand
that the power supply of the system has been switched off.
Violation of this guideline may result in damage / destruction of the TQMa93xxCA and be dangerous
to your health.
Improper handling of your TQ-product would render the guarantee invalid.
Proper ESD handling
The electronic components of your TQ-product are sensitive to electrostatic discharge (ESD).
Always wear antistatic clothing, use ESD-safe tools, packing materials etc., and operate your TQ-
product in an ESD-safe environment. Especially when you switch modules on, change jumper settings,
or connect other devices.

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 3
1.8 Naming of signals
A hash mark (#) at the end of the signal name indicates a low-active signal.
Example: RESET#
If a signal can switch between two functions and if this is noted in the name of the signal, the low-active function is marked with
a hash mark and shown at the end.
Example: C / D#
If a signal has multiple functions, the individual functions are separated by slashes when they are important for the wiring.
The identification of the individual functions follows the above conventions.
Example: WE2# / OE#
1.9 Further applicable documents / presumed knowledge
•Specifications and manual of the modules used:
These documents describe the service, functionality and special characteristics of the module used (incl. BIOS).
•Specifications of the components used:
The manufacturer's specifications of the components used, for example CompactFlash cards, are to be taken note of.
They contain, if applicable, additional information that must be taken note of for safe and reliable operation.
These documents are stored at TQ-Systems GmbH.
•Chip errata:
It is the user's responsibility to make sure all errata published by the manufacturer of each component are taken note of.
•Software behaviour:
No warranty can be given, nor responsibility taken for any unexpected software behaviour due to deficient components.
•General expertise:
Expertise in electrical engineering / computer engineering is required for the installation and the use of the device.
The following documents are required to fully comprehend the following contents:
•MBa93xxCA circuit diagram
•MBa93xxCA
•i.MX 93 Data Sheet
•i.MX 93 Reference Manual
•U-Boot documentation: www.denx.de/wiki/U-Boot/Documentation
•PTXdist documentation: www.ptxdist.de
•Yocto documentation: www.yoctoproject.org/docs/
•TQ-Support Wiki: Support-Wiki TQMa93xxCA (in progress)

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 4
2. BRIEF DESCRIPTION
This User's Manual describes the hardware of the TQMa93xxCA as of revision 0100, in combination with the MBa93xxCA as of
revision 0100 and refers to some software settings. A certain TQMa93xxCA derivative does not necessarily provide all features
described in this User's Manual.
This User's Manual does neither replace the i.MX 93 Reference Manual (1), nor the i.MX 93 Data Sheet (2), nor any other
documents from NXP.
The TQMa93xxCA is a universal Minimodule based on the NXP ARM®Cortex®-A55 based i.MX 93 CPU family, see also Table 4.
2.1 Key functions and characteristics
The TQMa93xxCA extends the TQ-Systems GmbH product range and offers an outstanding computing performance.
All essential i.MX 93 signals are routed to the TQMa93xxCA connectors. There are therefore no restrictions for customers using
the TQMa93xxCA with respect to an integrated customised design. All essential components like CPU, LPDDR4, eMMC, and PMIC
are already integrated on the TQMa93xxCA.
The main features of the TQMa93xxCA are:
•64 bit NXP i.MX 93 CPU, up to 2 × ARM Cortex®-A55 and 1 × Cortex®-M33
•Up to 2 Gbyte of LPDDR4- or LPDDR4X RAM
•Up to 256 Gbyte of eMMC NAND Flash, eMMC standard 5.1
•Up to 256 Mbyte QSPI NOR Flash (optional)
•64 Kbit EEPROM (optional)
•Temperature sensor + EEPROM
•NXP Power Management Integrated Circuit PCA9451
•RTC (optional)
•Trust Secure Element (optional)
•Gyroscope (optional)
•All essential i.MX 93 signals are routed to the TQMa93xxCA connectors
•Single supply voltage 5 V

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 5
2.2 CPU block diagram
11 mm x 11 mm pkg
System Clock
i.MX 935x/933x
Main CPU
Low Power Real Time Domain
External DRAM
32 kB I-cache
NEON 64 kB L2 Cache FPU
32 kB D-cache
Flex Domain
Oscillator
DMA
Watchdog, Periodic Timer
Timer/PWM x2, Timer x2
Temperature Sensor
PLLs
256 kB L3 Cache (ECC)
Arm Cortex-M33
16 kB+16 kB Code+Sys Cache
FPU MPU NVIC
256 kB TCM/OCRAM w/ECC
UART/USART x2, SPI x2
I2C x2, I3C
CAN-FD
2-lane I2S TDM Tx/Rx
8-ch PDM Mic Input
MQS
X16 LPDDR4/LPDDR4X (Inline ECC)
Crypto Tamper Detection Secure Clock Secure Boot eFuse Key Storage Random Number
UART/USART x6, SPI x6
I2C x6, I3C
CAN-FD
FlexIO x2
ADC (4-channel, 12-bit)
2x Gigabit Ethernet (1 w/TSN)
2x USB 2.0
5-lane I2S TDM Tx/Rx, SPDIF
8 bpp Parallel YUV/RGHB Camera
24 bpp Parallel RGB Display
2D Graphics
High-efficiency NPU
MIPI-CSI 2-lane w/PHY
MIPI-DSI 4-lane w/PHY
4-lane LVDS w/PHY
DMA
Watchdog x3, Periodic Timer
Timer/PWM x2, Timer x2
Secure JTAG
3x SD/SDIO 3.0/eMMC 5.1
Octal SPI FLASH w/Inline Crypto
640 kB OCRAM w/ECC
EdgeLockâSecure Enclave
2x ArmâCortexâ-A55
System Control Low Power Security MCU Connectivity and I/O
Connectivity and I/OML and MultimediaSystem Control
Memory
Figure 1: Block diagram i.MX 93
(Source: NXP)

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 6
3. ELECTRONICS
The information provided in this User's Manual is only valid in connection with the tailored boot loader,
which is preinstalled on the TQMa93xxCA, and the BSP provided by TQ-Systems GmbH, see also chapter 4.
i.MX 93
2 x 120 Pins
eMMC 5.1
Gyroscope (opt.)
Temperature
sensor / EEPROM
PMIC
NXP PCA9451A
RGMII
USB
UART
I2C
GPIO
SPI
CSI DSI
LVDS
1x QSPI-NOR-
Flash (optional)
RTC
LPDDR4-RAM
SE050 (optional)
Supervisor
EEPROM
5 V
5 V
Figure 2: Block diagram TQMa93xxCA (simplified)
3.1 Interfaces to other systems and devices
3.1.1 Pin multiplexing
The multiple pin configurations by different i.MX 93 internal function units must be taken note of.
The pin assignment in Table 3 refers to a TQMa93xxCA with i.MX 93 CPU in combination with the carrier board MBa93xxCA.
NXP provides a tool showing the multiplexing and simplifies the selection and configuration (i.MX Pins Tool NXP Tool).
The electrical and pin characteristics are to be taken from the i.MX 93 and PMIC documentation, see Table 37.
Attention: Destruction or malfunction, pin multiplexing
Depending on the configuration, many i.MX 93 pins can provide several different functions.
Please take note of the information concerning the configuration of these pins in the i.MX 93
Reference Manual (1), before integration or start-up of your carrier board / Starterkit.
Improper programming by operating software can cause malfunctions, deterioration or
destruction of the TQMa93xxCA.
The descriptions given in the following tables should be taken note of:
−DNC: These pins must never be connected and have to be left open.
Please contact TQ-Support for details.

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 7
3.1.2 Pinout TQMa93xxCA
The TQMa93xxCA has a total of 240 connector pins (2 x 120). The following tables show the TQMa93xxCA pin-out.
Table 2: Pinout TQMa93xxCA, X1
Ball
Dir.
Level
Signal
Pin
Signal
Level
Dir.
Ball
-
P
5 V
V_5V_IN
X1-A1
X1-B1
V_5V_IN
5 V
P
-
-
P
V_5V_IN
X1-A2
X1-B2
V_5V_IN
P
-
-
P
V_5V_IN
X1-A3
X1-B3
V_5V_IN
P
-
-
-
0 V
GND
X1-A4
X1-B4
GND
0 V
-
-
AA2
O
1.8 V
CCM_CLKO1
X1-A5
X1-B5
ENET1_TXC
1.8 V
O
U10
-
-
0 V
GND
X1-A6
X1-B6
GND
0 V
-
-
Y3
O
1.8 V
CCM_CLKO2
X1-A7
X1-B7
ENET1_TX_CTL
1.8 V
O
V10
U4
O
CCM_CLKO3
X1-A8
X1-B8
ENET1_TD0
O
W11
V4
O
CCM_CLKO4
X1-A9
X1-B9
ENET1_TD1
O
T12
-
-
0 V
GND
X1-A10
X1-B10
ENET1_TD2
O
U12
-
I/O
3.3 V
SCLH
X1-A11
X1-B11
ENET1_TD3
O
V12
-
I/O
SDAH
X1-A12
X1-B12
GND
0 V
-
-
-
-
0 V
GND
X1-A13
X1-B13
ENET1_RXC
1.8 V
I
AA7
-
I/O
1.8 V
SDAL
X1-A14
X1-B14
GND
0 V
-
-
-
I/O
SCLL
X1-A15
X1-B15
ENET1_RX_CTL
1.8 V
I
Y8
-
-
0 V
GND
X1-A16
X1-B16
GND
0 V
-
-
AA19
O
V_SD2
SD2_CLK
X1-A17
X1-B17
ENET1_RD0
1.8 V
I
AA8
-
-
0 V
GND
X1-A18
X1-B18
ENET1_RD1
I
Y9
Y19
I/O
V_SD2
SD2_CMD
X1-A19
X1-B19
ENET1_RD2
I
AA9
Y17
I
SD2_CD_B
X1-A20
X1-B20
ENET1_RD3
I
Y10
-
-
0 V
GND
X1-A21
X1-B21
GND
0 V
-
-
Y18
I/O
V_SD2
SD2_DATA0
X1-A22
X1-B22
ENET1_MDC
1.8 V
O
AA11
AA18
I/O
SD2_DATA1
X1-A23
X1-B23
ENET1_MDIO
I/O
AA10
Y20
I/O
SD2_DATA2
X1-A24
X1-B24
GND
0 V
-
-
AA20
I/O
SD2_DATA3
X1-A25
X1-B25
SD3_CLK1
1.8 V
O
V16
-
-
0 V
GND
X1-A26
X1-B26
GND
0 V
-
-
AA17
O
V_SD2
SD2_RESET_B
X1-A27
X1-B27
SD3_CMD1
1.8 V
O
U16
-
-
0 V
GND
X1-A28
X1-B28
SD3_DATA01
I/O
T16
-
P
1.8 V / 3.3V
V_SD2
X1-A29
X1-B29
SD3_DATA11
I/O
V14
-
-
0 V
GND
X1-A30
X1-B30
SD3_DATA21
I/O
U14
-
P
3.3 V
V_3V3_SD2
X1-A31
X1-B31
SD3_DATA31
I/O
T14
-
-
0 V
GND
X1-A32
X1-B32
GND
0 V
-
-
-
P
3.3 V
V_3V33
X1-A33
X1-B33
RFU
-
-
-
-
P
1.8 V
V_1V83
X1-A34
X1-B34
RFU
-
-
-
-
-
0 V
GND
X1-A35
X1-B35
GND
0 V
-
-
R20
I/O
V_GPIO
GPIO_IO17
X1-A36
X1-B36
PMIC_RST_B
1.8 V
I
-
-
-
0 V
GND
X1-A37
X1-B37
RESET_OUT#
open drain, needs external pull-up
T21
I/O
V_GPIO
GPIO_IO21
X1-A38
X1-B38
I2C2_SCL
3.3 V
I/O
D20
V20
I/O
GPIO_IO26
X1-A39
X1-B39
GND
0 V
-
-
R21
I/O
GPIO_IO16
X1-A40
X1-B40
GPIO_IO05
V_GPIO
I/O
L18
-
-
O V
GND
X1-A41
X1-B41
GPIO_IO04
I/O
L17
T20
I/O
V_GPIO
GPIO_IO20
X1-A42
X1-B42
GND
0 V
-
-
R17
I/O
GPIO_IO19
X1-A43
X1-B43
GPIO_IO06
V_GPIO
I/O
L20
R18
I/O
GPIO_IO18
X1-A44
X1-B44
GPIO_IO07
I/O
L21
-
-
0 V
GND
X1-A45
X1-B45
GND
0 V
-
-
N20
I/O
V_GPIO
GPIO_IO12
X1-A46
X1-B46
GPIO_IO00
V_GPIO
I/O
J21
N21
I/O
GPIO_IO13
X1-A47
X1-B47
GPIO_IO01
I/O
J20
-
-
0 V
GND
X1-A48
X1-B48
GPIO_IO02
I/O
K20
P20
I/O
V_GPIO
GPIO_IO14
X1-A49
X1-B49
GPIO_IO03
I/O
K21
P21
I/O
GPIO_IO15
X1-A50
X1-B50
GND
0 V
-
-
-
-
0 V
GND
X1-A51
X1-B51
GPIO_IO10
V_GPIO
I/O
N17
U21
I/O
V_GPIO
GPIO_IO24
X1-A52
X1-B52
GPIO_IO09
I/O
M21
U20
I/O
GPIO_IO23
X1-A53
X1-B53
GPIO_IO09
I/O
M20
U18
I/O
GPIO_IO22
X1-A54
X1-B54
GPIO_IO11
I/O
N18
-
-
0 V
GND
X1-A55
X1-B55
GND
0 V
-
-
W21
I/O
V_GPIO
GPIO_IO27
X1-A56
X1-B56
SAI1_RXD0
3.3 V
O
H20
V21
I/O
GPIO_IO25
X1-A57
X1-B57
SAI1_TXC
I
G20
-
-
0 V
GND
X1-A58
X1-B58
SAI1_TXFS
O
G21
Y21
I/O
V_GPIO
GPIO_IO29
X1-A59
X1-B59
SAI1_TXD0
O
H21
W20
I/O
GPIO_IO28
X1-A60
X1-B60
GND
0 V
-
-
1NC if NOR-Flash is placed
2Power-Output (max. 400 mA)
3Power-Output (max. 500 mA)

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 8
Table 3: Pinout TQMa93xxCA, X2
Ball
Dir.
Level
Signal
Pin
Signal
Level
Dir.
Ball
-
I/O
3.3 V
ISO_14443_LA
X2-A1
X2-B1
LVDS_D3_P
1.8 V
O
C1
-
I/O
ISO_14443_LB
X2-A2
X2-B2
LVDS_D3_N
O
B1
-
-
0 V
GND
X2-A3
X2-B3
GND
0 V
-
-
-
I
3.3 V
ISO_7816_CLK
X2-A4
X2-B4
LVDS_CLK_P
1.8 V
O
B3
-
I/O
ISO_7816_IO1
X2-A5
X2-B5
LVDS_CLK_N
O
A3
-
-
0 V
GND
X2-A6
X2-B6
GND
0 V
-
-
-
I/O
3.3 V
ISO_7816_IO2
X2-A7
X2-B7
LVDS_D2_P
1.8 V
O
B2
-
I
3.3 V
ISO_7816_RST_N
X2-A8
X2-B8
LVDS_D2_N
O
A2
-
-
0 V
GND
X2-A9
X2-B9
GND
0 V
-
-
W1
I
1.8 V
DAP_TDI
X2-A10
X2-B10
LVDS_D1_P
1.8 V
O
B4
Y2
O
DAP_TDO_TRACESWO
X2-A11
X2-B11
LVDS_D1_N
O
A4
Y1
O
DAP_TCLK_SWCLK
X2-A12
X2-B12
GND
0 V
-
-
W2
I/O
DAP_TMS_SWDIO
X2-A13
X2-B13
LVDS_D0_P
1.8 V
O
B5
-
-
0 V
GND
X2-A14
X2-B14
LVDS_D0_N
O
A5
-
P
V_LICELL
X2-A15
X2-B15
RTC_EVENT#
open drain, needs external pull-up
-
-
0 V
GND
X2-A16
X2-B16
GND
0 V
-
-
U6
O
1.8 V
ENET2_TXC
X2-A17
X2-B17
TEMP_EVENT#
open drain, needs external pull-up
-
-
0 V
GND
X2-A18
X2-B18
MIPI_DSI1_D0_N
1.8 V
O
A6
V6
O
1.8 V
ENET2_TX_CTL
X2-A19
X2-B19
MIPI_DSI1_D0_P
O
B6
T8
O
ENET2_TD0
X2-A20
X2-B20
GND
0 V
-
-
U8
O
ENET2_TD1
X2-A21
X2-B21
MIPI_DSI1_D1_N
1.8 V
O
A7
V8
O
ENET2_TD2
X2-A22
X2-B22
MIPI_DSI1_D1_P
O
B7
T10
O
ENET2_TD3
X2-A23
X2-B23
GND
0 V
-
-
-
-
0 V
GND
X2-A24
X2-B24
MIPI_DSI1_CLK_N
1.8 V
O
D6
AA3
I
1.8 V
ENET2_RXC
X2-A25
X2-B25
MIPI_DSI1_CLK_P
O
E6
-
-
0 V
GND
X2-A26
X2-B26
GND
0 V
-
-
Y4
I
1.8 V
ENET2_RX_CTL
X2-A27
X2-B27
MIPI_DSI1_D2_N
1.8 V
O
A8
AA4
I
ENET2_RD0
X2-A28
X2-B28
MIPI_DSI1_D2_P
O
B8
Y5
I
ENET2_RD1
X2-A29
X2-B29
GND
0 V
-
-
AA5
I
ENET2_RD2
X2-A30
X2-B30
MIPI_DSI1_D3_N
1.8 V
O
A9
Y6
I
ENET2_RD3
X2-A31
X2-B31
MIPI_DSI1_D3_P
O
B9
-
-
0 V
GND
X2-A32
X2-B32
GND
0 V
-
-
AA6
I/O
1.8 V
ENET2_MDIO
X2-A33
X2-B33
MIPI_CSI1_D0_N
1.8 V
I
A11
Y7
O
ENET2_MDC
X2-A34
X2-B34
MIPI_CSI1_D0_P
I
B11
-
-
0 V
GND
X2-A35
X2-B35
GND
0 V
-
-
C20
O
3.3 V
I2C1_SCL
X2-A36
X2-B36
MIPI_CSI1_CLK_N
1.8 V
I
D10
C21
I/O
I2C1_SDA
X2-A37
X2-B37
MIPI_CSI1_CLK_P
I
E10
-
-
0 V
GND
X2-A38
X2-B38
GND
0 V
-
-
J17
I
3.3 V
PDM_BIT_STREAM0
X2-A39
X2-B39
MIPI_CSI1_D1_N
1.8 V
I
A10
G17
O
PDM_CLK
X2-A40
X2-B40
MIPI_CSI1_D1_P
I
B10
-
-
0 V
GND
X2-A41
X2-B41
GND
0 V
-
-
G18
I
3.3 V
PDM_BIT_STREAM1
X2-A42
X2-B42
ONOFF
1.8 V
I
A19
B16
I/O
1.8 V
TAMPER0
X2-A43
X2-B43
USB1_ID
1.8 V
I
C11
F14
I/O
TAMPER1
X2-A44
X2-B44
USB2_ID
I
E12
-
-
0 V
GND
X2-A45
X2-B45
GND
0 V
-
-
B17
I
1.8 V
CLKIN1
X2-A46
X2-B46
V_GPIO4
1.8 V / 3.3 V
P
N15
A18
I
CLKIN2
X2-A47
X2-B47
USB1_VBUS
3,3 V
(5 V tolerant)
P
F12
J18
O
3.3 V
WDOG_ANY
X2-A48
X2-B48
USB2_VBUS
P
E14
-
I
3.3 V
WDOG_B
X2-A49
X2-B49
GND
0 V
-
-
-
-
0 V
GND
X2-A50
X2-B50
DNC
-
-
B12
B19
I
1.8 V
ADC_IN0
X2-A51
X2-B51
DNC
-
A12
A20
I
ADC_IN1
X2-A52
X2-B52
GND
0 V
-
-
B20
I
ADC_IN2
X2-A53
X2-B53
DNC
-
-
B13
B21
I
ADC_IN3
X2-A54
X2-B54
DNC
-
A13
-
-
0 V
GND
X2-A55
X2-B55
GND
0 V
-
-
E20
I
3.3 V
UART1_RXD
X2-A56
X2-B56
USB1_D_P
3.3 V
I/O
B14
E21
O
3.3 V
UART1_TXD
X2-A57
X2-B57
USB1_D_N
I/O
A14
F20
I
3.3 V
UART2_RXD
X2-A58
X2-B58
GND
0 V
-
-
F21
O
3.3 V
UART2_TXD
X2-A59
X2-B59
USB2_D_P
3.3 V
I/O
B15
-
-
0 V
GND
X2-A60
X2-B60
USB2_D_N
I/O
A15
Details about the electrical characteristics of single pins and interfaces are to be taken from the i.MX 93 documentation
(1), (2), (3), as well as the PMIC Data Sheet (4).
4Power-Input for NVCC_GPIO

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 9
3.2 System components
3.2.1 i.MX 93
3.2.1.1 i.MX 93 derivatives
Depending on the TQMa93xxCA version, one of the following i.MX 93 derivatives is assembled.
Table 4: i.MX 93 derivatives
TQMa93xxCA version
i.MX 93 derivative
i.MX 93 clocks
Temperature range
TQMa9352CA
i.MX 9352
2 x A55: 1.5 GHz, M33: 250 MHz, NPU
TQMa9351CA
i.MX 9351
1 x A55: 1.5 GHz, M33: 250 MHz, NPU
TQMa9332CA
i.MX 9332
2 x A55: 1.5 GHz, M33: 250 MHz
TQMa9331CA
i.MX 9331
1 x A55: 1.5 GHz, M33: 250 MHz
3.2.1.2 i.MX 93 errata
Attention: Destruction or malfunction, i.MX 93 errata
Please take note of the current i.MX 93 errata (5).

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 10
3.2.1.3 Boot modes
The i.MX 93 has a ROM with integrated boot loader. After the release of PMIC_POR# the System Controller (SCU) boots from
the internal ROM and then loads the program image from the selected boot device. For example, the integrated eMMC or the
optional QSPI NOR Flash can be selected as the default boot device. The following boot sources are supported by TQMa93xxCA:
•eMMC (SD1)
•QSPI/FlexSPI NOR Flash (SD1 + SD3)
•SD card (SD2)
•Serial Download (USB1)
Alternatively, an image can be loaded into the internal RAM using the serial downloader.
More information about the boot flow can be found in the Reference Manual (1), and the Data Sheet (2) of i.MX 93.
3.2.1.4 Boot configuration
This section provides information on boot mode configuration pins allocation and boot device interface allocation. The i.MX 93
uses four BOOT_MODE signals provided on the TQMa93xxCA's connector pins. These require pull-up/pull-down (4.7 / 100 )
wiring to 3.3 V and Ground. However, the BOOT_MODE signals are not dedicated to this function, but have other functionalities
in normal operation. The boot mode is initialized by sampling the BOOT_MODE[3:0] inputs when the reset is deactivated and are
to be set high or low according to the desired boot source at the time of readout. After these inputs are sampled, their
subsequent state does not affect the contents of the BOOT_MODE internal register.
The exact boot source configuration can be seen in the following table.
Table 5: Boot configuration i.MX 93
Boot source
Boot Core
BOOT_MODE3
BOOT_MODE2
BOOT_MODE1
BOOT_MODE0
Boot from eFuse
A55
0
0
0
0
Serial Downloader (USB1)
0
0
0
1
Boot from eMMC 5.1
(USDHC1, 8-bit))
0
0
1
0
Boot from SD 3.0 card
(USDHC2, 4-bit)
0
0
1
1
Boot from FlexSPI Serial NOR
0
1
0
0
Boot from FlexSPI NAND 2K
(not supported)
0
1
0
1
Boot from eFuse
M33
1
0
0
0
Serial Downloader (USB1)
1
0
0
1
Boot from eMMC 5.1
(USDHC1, 8-bit)
1
0
1
0
Boot from SD 3.0 card
(USDHC2, 4-bit)
1
0
1
1
Boot from FlexSPI Serial NOR
1
1
0
0
Boot from FlexSPI Serial
NAND 2K (not supported)
1
1
0
1
BOOT_MODE3 is used to distinguish between Low Power Boot (LPB - start of the M33 core) and Single Boot (start of the A55
core).
In LPB, only the M33 ROM is running after Power-On Reset (POR); the A55 core is expected to be kicked off by M33 firmware in
some use cases.
In Single Boot, the Cortex-A55 ROM loads both the Cortex-A55 firmware image and the Cortex-M33 firmware image (if exists). If
the container set has the Cortex-M33 firmware image, the Cortex-A55 ROM will read and place it in the Shared RAM (Cortex-M33
TCM). The Cortex-M33 BootROM is not involved in the Single Boot Flow. Once the Cortex-A55 loads the Cortex-M33 firmware
image to the Cortex-M33 TCM, the Cortex-A55 ROM will issue a message that kick off the Cortex-M33 core, and continues the
Cortex-A55 boot process, with Cortex-M33 & Cortex-A55 boot running in parallel.

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 11
3.2.2 Memory
3.2.2.1 LPDDR4 SDRAM
The memory interface of the i.MX 93 supports LPDDR4 and LPDDR4X memory (16 bit bus) with a maximum clock rate of 1866
MHz, which meets JEDEC LPDDR4-3733 standard. 1 GByte is the standard configuration, a maximum of 2 Gbyte of LPDDR4
SDRAM is supported.
3.2.2.2 eMMC
An eMMC is provided on the TQMa93xxCA for boot loader, operating system and application software. It is connected to the
i.MX 93 via SD1-interface. A maximum transfer rate of 400 MB/s is supported (HS400 mode). Resets have to be done via software.
i.MX 93
eMMC 5.1
SD1_CLK
SD1_CMD
CLK
CMD
SD1_DATA[7:0] DATA[7:0]
RST#
SD1_STROBE STROBE
VCC
VCCQ
1.8 V 3.3 V
NP
1.8 V
Figure 3: Block diagram eMMC
The boot configuration is described in chapter 3.2.1.3
3.2.2.3 QSPI NOR Flash / NAND Flash
QSPI NOR flash can optionally be assembled on the TQMa93xxCA. Because a separation of the signal paths is not possible, these
connector pins must not be wired when equipped with NOR Flash. With unpopulated NOR Flash the signals of the SD3 interface
can be used outside the module.
The NOR flash signals use a part of the NAND pins of the i.MX 93. All other NAND pins of the i.MX 93 are used from the
TQMa93xxCA for the eMMC as SD1 boot source and for the SD-Card (SD2).
Table 6: QSPI signals
Signal
i.MX 93
TQMa93xxCA
Power group
QSPI_DATA0
T16
X1-B28
1,8 V
QSPI_DATA1
V14
X1-B29
QSPI_DATA2
U14
X1-B30
QSPI_DATA3
T14
X1-B31
QSPI_SCLK
V16
X1-B25
QSPI_SS0#
U16
X1-B27

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 12
3.2.2.4 EEPROM M24C64-D
A 64 Kbit EEPROM is assembled by default on the TQMa93xxCA. The serial EEPROM is controlled by the I2C1 bus. The M24C64-D
offers an additional page, named the Identification Page (32 Byte). The Identification Page can be used to store sensitive
application parameters which can be (later) permanently locked in Read-only mode.
i.MX 93 EEPROM
I2C1_SCL
I2C1_SDA
SCL
SDA
Figure 4: Block diagram EEPROM
➢The EEPROM has I2C address 0x57 / 101 0111b
➢Identification Page (32 Byte) 0x5F / 101 1111b
3.2.2.5 EEPROM with temperature sensor SE97BTP
A serial EEPROM including temperature sensor type SE97BTP, controlled by the I2C1 bus, is assembled on the TQMa93xxCA.
The lower 128 bytes (address 00h to 7Fh) can be set to Permanent Write-Protected mode (PWP) by software. The upper 128 bytes
(address 80h to FFh) cannot be write-protected and are available for general data storage.
The overtemperature output of the SE97BTP is connected as open drain to TQMa93xxCA pin X2-B17 (TEMP_EVENT#). The device
is assembled on the top side of the TQMa93xxCA (component D6).
➢The device provides the following I2C addresses:
oEEPROM (Normal Mode): 0x53 / 101 0011b
oEEPROM (Protection Mode): 0x33 / 011 0011b
oTemperature sensor: 0x1B / 001 1011b
3.2.3 Trust Secure Element SE050
An NXP Trust Secure Element SE050 is available on the TQMa93xxCA as an assembly option.
i.MX 93
I2C1_SDA
I2C1_SCL
SE050
I2C_SDA
ISO_7816_IO1
ISO_7816_IO2
ISO_7816_CLK
ISO_7816_RST
ISO_14443_LA
ISO_14443_LB
I2C_SCL
V_3V3_IN
Connector pins
ISO_14443_LB
ISO_7816_IO2
ISO_14443_LA
ISO_7816_RST
ISO_7816_CLK
ISO_7816_IO1
Figure 5: Block diagram SE050

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 13
When equipped, the chip provides two interfaces according to ISO 7816 and ISO 14443. Among other things, antennas can be
connected to these.
Table 7: ISO_7816 and ISO_14443 signals
Signal
Direction
TQMa93xxCA
Remark
ISO_7816_CLK
I
X2-A4
Only with populated
Trust Secure Element
ISO_7816_RST
I
X2-A8
ISO_7816_IO1
I/O
X2-A5
ISO_7816_IO2
I/O
X2-A7
ISO_14443_LA
I/O
X2-A1
ISO_14443_LB
I/O
X2-A2
The SE050 is controlled by the I2C1 bus. More details can be found in (8).
➢The Trust Secure Element has I2C address 0x48 / 100 1000b
3.2.4 Accelerometer/Gyroscope
As an optional extension a 3D Digital Accelerometer / 3D Digital Gyroscope (ISM330DHCX from STMicroelectronics) is provided
on theTQMa93xxCA, which has an I2C interface. It allows to determine the position of the module and provides two interrupts.
However, these are not routed to the outside.
➢The Accelerometer/Gyroscope has I2C address 0x6A / 110 1010b
3.2.5 RTC
The TQMa93xxCA can use the internal Real Time Clock of the i.MX 93 or can be provided with an optional discrete RTC
PCF85063A.
3.2.5.1 i.MX 93 internal RTC
The i.MX 93 provides an internal RTC, which has its own power domain, supplied by the PMIC. The quartz used to clock the RTC
has a standard frequency tolerance of ±20 ppm @ +25 °C.
Note: RTC power supply
The CPU internal RTC can be used in regular operation. If the TQMa93xxCA supply (5 V) fails,
it is no longer available, since the i.MX 93 power rail is no longer supplied.
3.2.5.2 Discrete RTC PCF85063A
In addition to the i.MX 93 internal RTC the TQMa93xxCA provides a discrete RTC PCF85063A as an assembly option,
which is controlled by the I2C1 bus. The quartz used to clock the RTC has a standard frequency tolerance of ±20 ppm @ +25 °C.
The discrete RTC has an interrupt output which provides the open-drain signal RTC_EVENT# at pin X2-B15. This pin requires a
pull-up to 3.3 V (maximum 3.6 V) on the carrier board.
The RTC PCF85063A is only directly supplied by V_LICELL when the PMIC or the TQMa93xxCA supply is switched off.
During normal operation of the TQMa93xxCA, the PMIC supplies 3.3 V. To prevent charging a non-rechargeable backup supply, a
diode on the baseboard is needed for V_LICELL.

User's Manual l TQMa93xxCA UM 0001 l © 2023, TQ-Systems GmbH Page 14
Connector pins
V_5V_IN
VDD
Power
supply
V_LICELL
PCF85063A
VDD
PMIC
IN
Protection
Protection
OUT
Coin Cell
(typ. 3 V)
Figure 6: Block diagram RTC supply (TQMa93xxCA with discrete RTC)
➢The discrete RTC has I2C address 0x51 / 101 0001b
Note: RTC power supply
The BBSM functions of the i.MX 93 can only be used if the TQMa93xxCA is supplied with 5 V.
Because the BBSM rail is not supplied when the TQMa93xxCA is not powered-up, we recommend
using the optional RTC PCF85063A.
3.2.6 Interfaces
3.2.6.1 Overview
Except for the internal interfaces, all functional pins of the i.MX 93 are routed to TQMa93xxCA connector pins. Each customer
must check the suitability of the multiplexing in the respective project and adapt it if necessary. The following table shows one
exemplary multiplexing with the TQMa93xxCA to utilize the most primary interfaces simultaneously:
Table 8: TQMa93xxCA interfaces
i.MX 93 Interface
Quantity
Remark
Internal interfaces
LPDDR4
1
LPDDR4(X), x16
SD3 (QSPI)
1
SD1 (eMMC)
1
8 bit (HS400)
External interfaces
ADC
1
4 x inputs
CAN
2
GPIO
6
I2C
3
1 x for internal components, 2x for other peripherals
JTAG
1
LVDS
1
4 x diff. DATA, 1x diff. CLK
MIPI CSI
1
2 x diff. DATA, 1x diff. CLK
MIPI DSI
1
4 x diff. DATA, 1x diff. CLK
RGMII
2
SAI (Audio)
1
SPI
2
1 x CS each (2x CS possible with omission of GPIOs)
SmartCard ISO14443 / ISO7816
1
optionally provided by TSE
TAMPER
2
UART
5
1 x incl. RTS/CTS
USB 2.0
2
SD2 (SD-Card)
1
4 bit