1.
SIGMA
6
SYSTEM
INTRODUCTION
The SIGMA 6 computer system
can
concurrently process
operations for business,
engineering/scientific,
and
general-
purpose applications.
The
basic system consists of a central
processor,
32,
768 words of memory, and independent,
multi-
plexed
I/O
capability.
It
is
easily expandable by adding
memory units,
input/output
processors, and peripheral
de-
vices. Figure 1 shows a typical SIGMA 6 system.
A SIGMA 6 system consists of the following majorelements:
• A memory consisting of up to four magnetic
core
storage
units.
• A central processor unit
{CPU}
that
addresses core mem-
ory, fetches and stores information, performs arithmetic
and logical operations, sequences and controls instruc-
tion
execution,
and controls the
exchange
of information
between core memory and
other
elements of
the
system.
•
An
i
nput/
outputsystem cor.trolled by one or more i
nput/
output processors {lOPs},
each
providing
data
transfer
between core memory and peripheral
devices.
The lOPs
have separate access to core memory which
are
inde-
pendent of the CPU. They operate asynchronously
and simultaneously with the CPU.
GENERAL
CHARACTERISTICS
A SIGMA 6 computer system has features and operating
characteristics
that
permit
efficient
functioni
ng
in
real-
time, general-purpose, time-sharing, and multiuse computing
environments:
• Word-oriented memory {32-bit word plus parity bit}
which
can
be addressed and
altered
as
byte
(8-bit),
halfword {2-byte}, word {4-byte}, and doubleword
(8-byte) quantities.
• Full parity checking for both CPU/memory and
input/
output operations.
•
•
•
•
Memory expandable
from
32,768
to
131,072
words
{131
,072to524,288bytes} in incrementsof 16,384 words.
Direct addressing of
the
entire
core memory, within the
primary instruction word and without the need for base
registers, indirect addressing, or indexing.
Indirect addressing, with or without postindexing.
Displacement index registers,
automatically
self-
adjusting for
all
data
sizes.
Immediate addressing' of operands, for
greater
storage
efficiency and increased speed.
• Sixteen general-purpose registers,
expandable
(in
blocks of 16) to 512 to
reduce
transfer of
data
into and
out of registers in a multiuse environment.
• Hardware memory mapping, which obviates
the
problem
of memory fragmentation and provides dynamic program
relocation.
•
Selective
memory access protection with four modes for
system and information security and
protection.
•
Selective
memory-write protection.
• Watchdog timer, assuring nonstop operation.
• Real-time priority interrupt system with automatic
iden-
tification
and priority assignment, fast response time,
and up to 235 levels
that
can
be individually armed,
enabled,
and triggered by program control.
• Interruptibi Iity of long instructions,
guarantee
i
ng
fast
response
to
interrupts.
• Automatic traps, for error conditions and for simulation
of optional instructions not physically implemented, all
under program control.
• Power fai
I-safe,
for automatic, safe shutdown in the
event
of a power failure.
• Multiple interval timers, with a
choice
of resolutions
for independent time bases.
• Privileged instruction logic {master/slave modes}, for
concurrent, time-shared operation.
• Complete instruction set including:
• Byte, halfword, word, and doubleword operations.
•
Use
of
all
memory-referencing instructions for
register-to-register
operations, with or without
indirect
addressing and postindexing, and within
the normal instruction format.
• Multiple register operations.
•
•
•
•
Fixed-point
arithmetic operations in halfword,
word, and doubleword modes.
Optional
floating-point
hardware operations, in
short and long formats, with
significance,
zero,
and normalization control and
checking,
all
under
program control.
Full complement of logical operations {AND, OR,
exclusive
OR}.
Comparison operations, including compare between
limits {with limits
in
memory or in registers}.
SIGMA 6 System
