Acromag Intel 4 XVME-6500A User manual

XVME-6500A
Intel®4th Generation Core
Single-Slot VMEbus CPU Module
USER’S MANUAL
ACROMAG INCORPORATED
30765 South Wixom Road
Wixom, MI 48393-2417 U.S.A.
Tel: [phone]
Email: [email protected]
Copyright 2015, Acromag, Inc., Printed in the USA.
Data and specifications are subject to change without notice.
8501191A

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Table of Contents
1.0 GENERAL INFORMATION............................................................................................7
1.1 Intended Audience .......................................................................................................7
1.2 Preface.........................................................................................................................7
1.2.1 Trademark, Trade Name and Copyright Information ....................................................................... 7
1.2.2 Class A Product Warning................................................................................................................... 7
1.2.3 Environmental Protection Statement ............................................................................................... 7
1.3 Product Summary.........................................................................................................8
1.4 Related Material...........................................................................................................9
1.5 Ordering Information ...................................................................................................9
1.6 Key Features and Benefits ..........................................................................................10
1.6.1 Intel® 4th Gen (Haswell) Core CPU ................................................................................................. 10
1.6.2 Intel QM87 Chipset (Lynx Point) PCH.............................................................................................. 11
1.6.3 Intel 82580EB Quad Ethernet Controller ........................................................................................ 11
1.6.4 Nuvoton NCT6106D Super-I/O........................................................................................................ 12
1.6.5 Atmel AT97SC3204 (1.2) or SLB9665XT20 (2.0) TPM...................................................................... 12
1.6.6 FPGA-based VME to PCI Express Bridge.......................................................................................... 12
1.6.7 Expansion Sites................................................................................................................................ 12
2.0 PREPARATION FOR USE........................................................................................... 14
2.1 Unpacking and Inspecting...........................................................................................14
2.2 Installing into a Backplane ..........................................................................................15
3.0 HARDWARE INFORMATION AND CONFIGURATION....................................... 16
3.1 Module Hardware Switch Configuration .....................................................................17
3.1.1 Core Configuration Switch SW1 ...................................................................................................... 17
3.1.2 Core Configuration Switch SW2 ...................................................................................................... 18
3.1.3 VME Configuration Switch SW4...................................................................................................... 19
3.1.4 JTAG VREF Configuration Switch SW5............................................................................................. 20
3.1.5 VME PCIe Configuration Switch SW6 .............................................................................................. 21
3.1.6 VME Configuration Switch SW7...................................................................................................... 22
3.2 Power Supply and Management .................................................................................22

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3.2.1 Power Options ................................................................................................................................ 22
3.2.2 Programmable CPU Power Limits ................................................................................................... 23
3.2.3 Power Management ....................................................................................................................... 24
3.2.3.1 ACPI System States ........................................................................................................ 24
3.2.3.2 ACPI Processor States .................................................................................................... 24
3.3 CPU............................................................................................................................25
3.3.1 Active Processor Core Selection...................................................................................................... 25
3.3.2 Turbo Boost Configuration.............................................................................................................. 25
3.3.3 PCI Express Graphics (PEG) ............................................................................................................. 25
3.4 Platform Controller Hub (PCH)....................................................................................26
3.5 System Memory .........................................................................................................27
3.6 Video .........................................................................................................................27
3.6.1 VGA ................................................................................................................................................. 27
3.6.2 Digital Display Interfaces................................................................................................................. 27
3.6.2.1 DVI ................................................................................................................................. 28
3.6.2.2 HDMI.............................................................................................................................. 28
3.6.2.3 Integrated Audio............................................................................................................ 28
3.6.3 Configuring the Primary Display ..................................................................................................... 29
3.6.4 Configuring the Video Memory....................................................................................................... 29
3.6.5 Video Display Options..................................................................................................................... 29
3.7 Intel®High Definition Audio........................................................................................29
3.8 SATA ..........................................................................................................................29
3.9 General I/O ................................................................................................................30
3.9.1 SMBus and I2C ................................................................................................................................ 30
3.9.2 Low Pin Count (LPC) ........................................................................................................................ 30
3.9.3 Serial Ports ...................................................................................................................................... 30
3.9.4 USB.................................................................................................................................................. 31
3.10 Gigabit Ethernet .......................................................................................................31
3.11 Battery Powered Real Time Clock (RTC) ....................................................................32
3.12 Security....................................................................................................................32
3.12.1 Trusted Platform Support ............................................................................................................. 32
3.12.2 Password Control.......................................................................................................................... 32
3.13 System Management................................................................................................33
3.13.1 Intel® Hyper-Threading Technology............................................................................................... 33
3.13.2 Enhanced Intel®SpeedStep Technology (EIST).............................................................................. 33

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3.13.3 Intel®Virtualization Technology (Intel VT-x and VT-d).................................................................. 33
3.13.4 Intel®Trusted Execution Technology (TXT) ................................................................................... 34
3.13.5 Intel®Turbo Boost Technology...................................................................................................... 34
3.13.6 Intel®Active Management Technology......................................................................................... 35
3.13.7 Intel®Matrix Storage Technology.................................................................................................. 35
3.13.8 Intel®Configurable TDP Technology ............................................................................................. 35
3.14 Thermal Management ..............................................................................................35
3.14.1 Thermal Monitoring ...................................................................................................................... 36
3.14.2 Thermal Throttling ........................................................................................................................ 36
3.14.2.1 CPU Throttling (Hardware Controlled) ........................................................................ 36
3.14.2.2 Thermal Management (OSPM Controlled) .................................................................. 36
3.14.3 Memory Throttling........................................................................................................................ 36
3.14.4 Thermal Management Hardware.................................................................................................. 36
3.15 Watchdog.................................................................................................................37
3.16 Expansion Sites.........................................................................................................37
3.16.1 XMC Modules................................................................................................................................ 37
3.16.2 PMC Modules................................................................................................................................ 38
3.16.3 PMC/XMC JTAG Interfaces............................................................................................................ 38
3.16.4 XBRD-9060 I/O Expander Module................................................................................................. 39
3.16.5 Power Available to Expansion Modules........................................................................................ 39
3.17 VME Interface...........................................................................................................41
3.18 Front Panel Layout....................................................................................................42
4.0 FIRMWARE/BIOS INFORMATION AND CONFIGURATION ............................ 43
4.1 XVME-6500A Special BIOS Features ............................................................................43
4.2 Drivers and Utilities....................................................................................................43
5.0 SERVICE AND REPAIR............................................................................................... 44
5.1 Service and Repair Assistance.....................................................................................44
5.2 Preliminary Service Procedure ....................................................................................44
5.3 Where to Get Help......................................................................................................44
6.0 SPECIFICATIONS......................................................................................................... 44
6.1 Physical......................................................................................................................44

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6.2 Connector Information ...............................................................................................45
6.2.1 J3 CPU XDP Debug Connector......................................................................................................... 45
6.2.2 J6 SPI BIOS Programming Header ................................................................................................... 45
6.2.3 J17 FPGA-based VME Bridge Programming Header ....................................................................... 45
6.2.4 VME Interface ................................................................................................................................. 46
6.2.4.1 P0 VME Connector (Optional)........................................................................................ 46
6.2.4.2 P1 VME Connector......................................................................................................... 47
6.2.4.3 P2 VME Connector (Standard I/O)................................................................................. 48
6.2.4.4 P2 VME Connector (XVME-6300 Compatible I/O - Consult Factory for this Option)..... 49
6.2.5 Lower PMC/XMC Site...................................................................................................................... 50
6.2.5.1 J11 Lower PMC Site PCI-X Connector ............................................................................ 50
6.2.5.2 J12 Lower PMC Site PCI-X Connector ............................................................................ 51
6.2.5.3 J13 Lower PMC Site PCI-X Connector ............................................................................ 52
6.2.5.4 J14 Lower PMC Site Rear-I/O Connector ....................................................................... 53
6.2.5.5 J15 Lower XMC Site PCIe Connector.............................................................................. 54
6.2.5.6 J8 Lower PMC/XMC Site JTAG Connector...................................................................... 54
6.2.5.7 J16 Lower XMC Site Rear I/O Connector ....................................................................... 55
6.2.6 Upper PMC/XMC Site...................................................................................................................... 56
6.2.6.1 J21 Upper PMC Site PCI-X Connector ............................................................................ 56
6.2.6.2 J22 Upper PMC Site PCI-X Connector ............................................................................ 57
6.2.6.3 J23 Upper PMC Site PCI-X Connector ............................................................................ 58
6.2.6.4 J24 Upper PMC Site Rear I/O Connector ....................................................................... 59
6.2.6.5 J25 Upper XMC Site PCIe Connector.............................................................................. 60
6.2.6.6 J9 Upper PMC/XMC Site JTAG Connector...................................................................... 60
6.2.6.7 J7 Upper PMC/XMC Site Expansion Connector ............................................................. 61
6.2.7 Front Panel Connectors................................................................................................................... 62
6.2.7.1 J5 COM/USB/VGA Connector ........................................................................................ 62
6.2.7.2 J4 Dual Ethernet RJ Point 5 Connector .......................................................................... 63
6.2.8 P3 CPU Fan Connector .................................................................................................................... 63
6.3 P2 I/O Signal Requirements ........................................................................................64
6.3.1 VGA ................................................................................................................................................. 64
6.3.2 ESD .................................................................................................................................................. 64
It is strongly suggested that ESD protection be included in interface circuitry on the VGA and USB ports.
Failure to do so may cause damage the XVME-6500A in the event of an ESD discharge into the I/O pins.
................................................................................................................................................................... 64
6.4 Power Requirements..................................................................................................65
6.5 Environmental Considerations....................................................................................66
6.6 Reliability Prediction..................................................................................................67
6.7 XVME-6500A Certificate of Volatility...........................................................................68

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7.0 XBRD-9060 I/O EXPANDER ACCESSORY MODULE.......................................... 69
7.1 Ordering Information .................................................................................................69
7.2 Hardware Information and Configuration ...................................................................70
7.2.1 Switch SW1 Configuration .............................................................................................................. 70
7.3 mSATA Module Installation ........................................................................................70
7. 4 Installation onto XVME-6500A...................................................................................70
7.5 Specifications .............................................................................................................71
7.5.1 Physical ........................................................................................................................................... 71
7.5.2 Connector Information ................................................................................................................... 72
7.5.2.1 J3 Expansion Connector................................................................................................. 72
7.5.2.2 J7 Ethernet Connector................................................................................................... 73
7.5.2.3 J2 RS-232 Serial Connector ............................................................................................ 73
7.5.2.4 RS-232 Serial Adapter Cable .......................................................................................... 73
7.5.2.5 J4 USB 2.0 Connector..................................................................................................... 74
7.5.2.6 J5 USB 2.0 Connector..................................................................................................... 74
7.5.2.7 J1 mSATA Connector...................................................................................................... 75
7.5.2.8 J6 mSATA Connector...................................................................................................... 76
7.6 Power Requirements..................................................................................................77
7.7 Environmental Considerations....................................................................................77
7.8 Reliability Prediction..................................................................................................77
7.9 XBRD-9060 Certificate of Volatility..............................................................................78
8.0 XVME-9640 REAR-TRANSITION ACCESSORY MODULE ................................. 79
8.1 Ordering Information .................................................................................................81
8.2 Hardware Information and Configuration ...................................................................81
8.2.1 Switch SW1 Configuration .............................................................................................................. 81
8.3 mSATA Module Installation ........................................................................................81
8.4 Specifications .............................................................................................................82
8.4.1 Physical ........................................................................................................................................... 82
8.4.2 Connector Information ................................................................................................................... 82
8.4.2.1 RJ0 VME Connector (Optional) ...................................................................................... 82
8.4.2.2 RJ2 VME Connector ....................................................................................................... 83
8.4.2.3 J1 VGA Connector .......................................................................................................... 84

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8.4.2.4 J4 USB 2.0 Connector..................................................................................................... 84
8.4.2.5 J3 USB 2.0 Connector..................................................................................................... 84
8.4.2.6 J7 DVI-D Connector........................................................................................................ 85
8.4.2.7 J8 Dual Ethernet RJ Point 5 Connector .......................................................................... 86
8.4.2.8 J5 Upper PMC/XMC User I/O Connector ....................................................................... 87
8.4.2.9 P4 Lower PMC/XMC User I/O Connector (Optional) ..................................................... 88
8.4.2.10 P2 RS-232/RS-485 Serial Port....................................................................................... 88
8.4.2.11 P3 Lower PMC/XMC User I/O Connector (Optional) ................................................... 89
8.4.2.12 P1 Audio Connector..................................................................................................... 89
8.4.2.13 J6 mSATA Connector.................................................................................................... 90
8.4.2.14 J2 mSATA Connector.................................................................................................... 91
8.5 Power Requirements..................................................................................................92
8.6 Environmental Considerations....................................................................................92
8.7 Reliability Prediction..................................................................................................93
8.8 XVME-9640 Certificate of Volatility.............................................................................93
REVISION HISTORY ............................................................................................................ 94

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1.0 GENERAL INFORMATION
1.1 Intended Audience
This user manual was written for technically qualified personnel who will be
working with systems incorporating the XVME-6500A CPU. It is not intended
for a general, non-technical audience that is unfamiliar with VMEbus devices
and their application.
1.2 Preface
The information contained in this manual is subject to change without notice,
and Acromag, Inc. (Acromag) does not guarantee its accuracy. Acromag
makes no warranty of any kind with regard to this material, including, but not
limited to, the implied warranties of merchantability and fitness for a
particular purpose. Further, Acromag assumes no responsibility for any
errors that may appear in this manual and makes no commitment to update,
or keep current, the information contained in this manual. No part of this
manual may be copied or reproduced in any form, without the prior written
consent of Acromag.
1.2.1 Trademark, Trade Name and Copyright Information
© 2015 by Acromag Incorporated.
All rights reserved. Acromag and Xembedded are registered trademarks of
Acromag Incorporated. All other trademarks, registered trademarks, trade
names, and service marks are the property of their respective owners.
1.2.2 Class A Product Warning
This is a Class A product. In a domestic environment this product may cause
radio interference, in which case the user may find it necessary to take
adequate corrective measures.
1.2.3 Environmental Protection Statement
This product has been manufactured to satisfy environmental protection
requirements where possible. Many components used (structural parts,
circuit boards, connectors, batteries, etc.) are capable of being recycled. Final
disposition of this product after its service life must be conducted in
accordance with applicable country, state, or local laws or regulations.

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1.3 Product Summary
The XVME-6500A is a CPU module that uses an Intel®4th Generation Core
Processor (Haswell) 6U VME64x VMEbus form factor. It is available in an air-
cooled model only. An extended temperature air-cooled model is also
available for operating in a -40°C to +75°C range.
The standard module has two DDR3L ECC SODIMMs, for a total of 16GB of
DDR3 memory. The standard model The SODIMMs are firmly attached to the
module with screws and surrounded by heat sink material to provide a
mechanically and thermally robust mechanism.
A large amount of I/O is available, as summarized in the “Key Features and
Benefits” section below.
There are two PMC/XMC sites available on the module. These can be used
as 2 XMC, 2 PMC, or one of each type. All 64 pins of rear I/O from the
PMC/XMC module's P4 connector are routed to the XVME-6500A's P0 and
P2 connectors. Note the P0 connector is optional and also carries 2 Gigabit
Ethernet connections.
Two special build options are offered for the P0 and P2 I/O. Instead of the 64
pins of rear I/O from the lower site XMC module's P4 connector, the P0
connector can instead carry I/O from the XMC module's P6 connector. An
option is also available to have the P2 connector's I/O compatible with the
XVME-6300 by giving up some of the PMC/XMC I/O normally available on
the P2 connector. Please consult the factory for these options.
In lieu of one PMC/XMC module, the optional XBRD-9060 I/O Expander
module may be installed to give more I/O on the front panel, as well as 2
SSD mSATA drives.
The module uses a FPGA-based VME bridge on a dedicated PCIe bus to
minimize VMEbus transfer times. The module will function in either a 3-row
(with reduced I/O) or 5-row VMEbus backplane, with or without a 3.3V
backplane power supply (reduced 5V & 3.3V power is available to the
PMC/XMC sites when a 5V-only power supply is available from the
backplane).
The optional XVME-9640 Rear-Transition Module is available to give easy
access to all of the P2 connector's I/O signals.
A two digit LED display is available for Power ON Self-Test (POST) codes,
should a problem arise during the boot operation. This display is available
for application software user codes after POST to aid in software debugging.
A 26-pin XDP debug connector is also available for connecting compatible
emulator tools directly to the CPU. For more information see Intel
publication 479493, Shark Bay and Denlow Platforms Debug Port Design
Guide.

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1.4 Related Material
The following manuals and part specifications provide the necessary
information for in-depth understanding of the XVME-6500A module.
•ANSI/VITA 1.1-1991 (R2003), VME64 Extensions. http://vita.com
•ANSI/VITA 1.5-2003 (R2009), 2eSST. http://vita.com
•ANSI/VITA 39-2003, PCI-X Auxiliary Standard for PMCs and
Processor PMCs. http://vita.com
•ANSI/VITA 42, XMC. http://vita.com
•The APTIO Haswell Core BIOS Manual For Acromag Products
(8501026).
•Intel® document No. 328901, Mobile 4th Generation Intel® Core™
Processor Family Datasheet –Volume 1 of 2, Rev: 002, September,
2013.
http://www.intel.com/content/www/us/en/processors/core/CoreT
echnicalResources.html
•ALTHEA 7910 Application Programming Interface Software API for
PCI Express to VME Interface.
1.5 Ordering Information
When ordering the XVME-65ab-116cd-LF VMEbus CPU module, please select
from and specify the available options (X, Y and Z) as defined below (such as
XVME-6510A-1160-LF, XVME-6510A-1161E-LF, XVME-6511-1160-LF, XVME-
6511-1162E-LF, etc.):
•Select the TPM option (a):
✓1: TPM 1.2
✓2: TPM 2.0
•Select the rear I/O to P0 option (b):
✓0: PMC P4 rear I/O
✓1: XMC P6 rear I/O
•Select the Connector Option (c);
✓0: with P0
✓1: without P0
✓2: with P0, battery-less option
✓3: without P0. Battery-less option
•Select the operating environment (temperature) option (d):
✓Blank: Standard temperature operation
0°C to 70°C
✓E: Extended temperature operation
-40°C to 75°C

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1.6 Key Features and Benefits
The XVME-6500A block diagram shown in Fig. 1.6.a illustrates the key components and
features that are summarized on the following pages.
Fig. 1.6.a: XVME-6500A Block Diagram
1.6.1 Intel® 4th Gen (Haswell) Core CPU
This 2.4GHz quad-core i7, 64-bit, 22-nanometer (Haswell) CPU with integrated GT2
graphics contains direct interfaces for DDR3L, DDI, and PCIe x16. In addition, the
Direct Media Interface (DMI) is used to connect to the QM87 Platform Control Hub
(PCH).
•DDR3L SDRAM –Two SODIMM sockets support up to 16GB of DDR3L ECC
at 1600MHz. Dual-channel mode is used with the two SODIMMs. The
SODIMMs are attached to the module firmly with screws and surrounded
by heat sink material to provide a robust mechanism both mechanically
and thermally.
•PCIe x8 (2) –Traditionally used for external graphics, but on the XVME-
6500A supports any PMC/XMC devices. One of the connections is muxed
with a PEX8114 PCIe > PCI-X bridge for PMC vs. direct XMC connection. This
bridge drives both PMC sites when enabled, but the lower site may still
contain an XMC module even if the PMC bridge is enabled.
•DVI-D –This digital display interface supports connection of both, DVI-D, or
HDMI display devices.

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•Programmable CPU power limits –By simply programming a lower power
limit in the BIOS setup, the CPU can be used in applications where less
power is available or heat removal is an issue. This is accomplished by the
CPU automatically underclocking its frequency to maintain a power level at
the set limit.
1.6.2 Intel QM87 Chipset (Lynx Point) PCH
The Intel 8 Series QM87 (Lynx Point) PCH provides extensive I/O support, as listed
below:
•PCIe x4 (2) –There are two PCIe ports of x4 width. The first is connected to
the FPGA-based VME Bridge. The other is connected to the Intel 82580EB
Quad Gigabit Ethernet controller.
•SATA II (2) –There are two SATA ports that operate up to 3Gb/sec
connected to the VME P2 connector.
•SATA III (2) –There are two SATA ports that operate up to 6Gb/sec
connected to the Expansion Site connector for the optional XBRD-9060
•Bootable on-board SSD Flash –40GB of soldered-down on-board SSD Flash
is standard on all units. The device can be write protected with an option in
the BIOS.
•USB 2.0 (6) –There are two ports connected to the VME P2 connector and
two ports connected to the front panel's 26-pin connector that function at
USB 2.0 or USB 1.1 speeds. There are an additional two ports available on
the Expansion Site connector for the optional XBRD-9060.
•VGA –An analog VGA port is available, including DDC clock and data, at
either the VME P2 connector or the front panel's 26-pin connector. Only
one connection may be used at a time and should auto switch when a
monitor is plugged in to either port. Override switches are available on
SW2.
•LPC –The Low Pin-count Bus is connected to both the NCT6106D Super-I/O
for serial ports and debug port 80 connections, in addition to the
AT97SC3204 (1.2) or SLB9665XT20 (2.0) TPM device.
•SPI –The Serial Peripheral Interface is used for the onboard boot flash.
•HDA Audio –The HDA audio port is connected to an ALC892 high definition
audio codec. Analog stereo line-in and line-out ports are available on the
VME P2 connector.
•SMBUS –This I2C-compatible System Management Bus has connections to
the memory DIMMs, the XMC connectors, and also to an onboard EEPROM
for module identification.
1.6.3 Intel 82580EB Quad Ethernet Controller
The Intel 82580EB Gigabit Ethernet Controller contains both the MAC and the
physical layer. It provides 4 ports that auto-sense 10-Base-T, 100Base-T, and
1000Base-TX connections. Two of these are available on the front panel's RJ Point 5
connector. Two are available on the optional VME P0 connector, for use on a VITA
31.1 Switch-Fabric compliant backplane, or via the optional XVME-9640 RTM module.

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One of these P0 ports may instead be switched to the Expansion Site connector,
making it available on the front panel via the XBRD-9060 I/O Expander module.
1.6.4 Nuvoton NCT6106D Super-I/O
The Nuvoton NCT6106D is an LPC device that provides temperature and voltage
monitoring, Port 80 debug via 2 digit 7-segment display, and the following serial
ports:
•One RS-232 only, including RTS, CTS, DTR, and DSR control lines. Available
on the front panel's 26-pin connector.
•One RS-232/RS-422/RS-485 (software selectable). TX/RX signals only.
Available on the VME P2 connector.
•One RS-232 only. TX/RX signals only. Routed to the Expansion Site connector
to make the port available on the front panel via the optional XBRD-9060.
1.6.5 Atmel AT97SC3204 (1.2) or SLB9665XT20 (2.0) TPM
The Atmel AT97SC3204 and Infineon SLB9665XT20 are fully integrated security
modules that implement version 1.2, or 2.0, of the Trusted Computing Group (TCG)
specification for Trusted Platform Modules (TPM). The TPM includes a cryptographic
accelerator capable of computing a 2048-bit RSA signature in 200ms and a 1024-bit
RSA signature in 40ms. Performance of the SHA-1 accelerator is 20μs per 64-byte
block.
1.6.6 FPGA-based VME to PCI Express Bridge
The FPGA-based VME to PCIe bridge is a full VME64x Master/Slave interface with
slot-1 functions and interrupt management. All VME64x data transactions (SBT, BLT,
MBLT, 2eVME and 2eSST) on all common addressing space modes (A16, A24 and
A32) along with a fully programmable hardware byte swapper function are
supported. It has been successfully implemented and validated in VME SBCs since
2009 under Linux and VxWorks allowing the solution to meet high maturity and
reliability levels required by the industry.
1.6.7 Expansion Sites
There are two expansion sites available on the XVME-6500A, referred in this manual
as the Upper Site and the Lower Site. The Upper Site is at the top of the XVME-6500A
when installed vertically in a VME chassis. The Lower Site is in the middle of the
board, adjacent to the CPU heatsink.
The Upper Site can be used for a PMC or XMC module, with the I/O from the J24
connector routed to the VME P2 connector. The Upper Site can instead be used with
the optional XBRD-9060 I/O Expander module.
The Lower Site can be used for a PMC or XMC module, with the I/O from the J14
connector routed to the VME P0 connector, if installed. Alternatively, I/O from the
J16 connector can be routed to the P0 connector.

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Note: If one PMC and one XMC module are installed in the Expansion Sites, the PMC
module must be installed in the Upper Site.

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2.0 PREPARATION FOR USE
IMPORTANT PERSONAL AND PRODUCT SAFETY CONSIDERATIONS
It is very important for the user to consider the possible safety implications of
power, wiring, component, sensor, or software failures in designing any type
of control or monitoring system. This is especially important where personal
injury or the loss of economic property or human life is possible. It is
important that the user employ satisfactory overall system design. It is
understood and agreed by the Buyer and Acromag that this is the Buyer's
responsibility.
WARNING: This board utilizes static sensitive components and should only
be handled at a static-safe workstation.
This product is an electrostatic sensitive device and is packaged accordingly.
Do not open or handle this product except at an electrostatic-free
workstation. Additionally, do not ship or store this product near strong
electrostatic, electromagnetic, magnetic, or radioactive fields unless the
device is contained within its original manufacturer’s packaging. Be aware
that failure to comply with these guidelines will void the Acromag Limited
Warranty.
2.1 Unpacking and Inspecting
Upon receipt of this product, inspect the shipping carton for evidence of
mishandling during transit. If the shipping carton is badly damaged or water
stained, request that the carrier's agent be present when the carton is
opened. If the carrier's agent is absent when the carton is opened and the
contents of the carton are damaged, keep the carton and packing material for
the agent's inspection.
For repairs to a product damaged in shipment, refer to the Acromag Service
Policy to obtain return instructions. It is suggested that salvageable shipping
cartons and packing material be saved for future use in the event the product
must be shipped.
This board is physically protected with packing material and electrically
protected with an anti-static bag during shipment. However, it is
recommended that the board be visually inspected for evidence of
mishandling prior to applying power.

XVME-6500A
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 15 -
http://www.acromag.com
- 15 -
https://www.acromag.com
2.2 Installing into a Backplane
The XVME-6500A is a 6U, single-slot module. For proper cooling, the air-
cooled models must only be installed into an air-cooled chassis.
The XVME-6500A modules are designed to comply with all physical and
electrical VMEbus backplane specifications of VME64x.
The XVME-6500A is available both with and without a P0 connector. Without
P0 would normally be required for a legacy system that contains a stiffener
bar in that location.
In order to have access to some of the listed P2 I/O and to supply enough
power for the i7-4700EQCPUit is recommended that a backplane with 5-row,
160-pin P1 and P2 connectors be used.
Note: When used in a legacy system with 3-row, 96-pin P1 and P2 connectors,
power available to the expansion sites will be severely limited and the
programmable power limits on the CPU should be used.
WARNING: Never install or remove any boards before turning off power to
the bus and all related external power supplies.
1. Disconnect all power supplies to the backplane and the card cage.
Disconnect the power cable.
2. Make sure backplane connectors P1 and P2 are available.
3. Verify that all DIP switch settings are correct.
4. Verify that the card cage slot is clear and accessible.
5. Install the XVME-6500A in the card cage by centering the unit on the
plastic guides in the slots (P1 connector facing up). Push the board
slowly toward the rear of the chassis until the P1 and P2 connectors
engage. The board should slide freely in the plastic guides.
WARNING: Do not use excessive force or pressure to engage the connectors.
If the boards do not properly connect with the backplane, remove the
module and inspect all connectors and guide slots for damage or
obstructions.
6. Secure the module to the chassis by tightening the machine screws at
the top and bottom of the board.
7. Connect all remaining peripherals by attaching each interface cable into
the appropriate connector on the front of the XVME-6500A board, or on
the XVME-9640 Rear Transition Module.

XVME-6500A
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 16 -
http://www.acromag.com
- 16 -
https://www.acromag.com
3.0 HARDWARE INFORMATION AND CONFIGURATION
Fig. 3.1.a: XVME-6500A Top View

XVME-6500A
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 17 -
http://www.acromag.com
- 17 -
https://www.acromag.com
3.1 Module Hardware Switch Configuration
3.1.1 Core Configuration Switch SW1
Table 3.1.a: Core Configuration Switch SW1
Table 3.1.a summarizes the functions, settings, and descriptions for dip
switches SW1-1 thru SW1-4.
Core Configuration Switch SW1
Position
Function
Switch Setting
Description
1
Front Panel
Reset Button
OFF
No Pushbutton Reset
ON (default)
Front Panel Reset Button
Causes Local Reset
2
ORB GND
OFF (default)
ORB GND Isolated
ON
ORB GND tied to digital
GND
3
BIOS Recovery
OFF (default)
Normal Operation
ON
Restore BIOS Defaults
4
Onboard 3.3V
Regulator
OFF (default)
Auto Enable Onboard 3.3V
Regulator if Not on
Backplane
ON
Force Onboard 3.3V
Regulator On
SW1-1 is used to configure whether the front panel reset switch can be used to
reset the XVME-6500A (and subsequently the whole VME chassis depending
on SW4-6).
SW1-2 is used to isolate ORB GND (the front panel's chassis connection) from
digital ground, if necessary to isolate ground loops.
SW1-3 is reserved and should be left in the OFF position for normal operation.
SW1-4 is used to configure the operation of the onboard 3.3V regulator. When
the switch is OFF the onboard 3.3V regulator is automatically enabled
whenever 3.3V is not detected on the backplane. Setting this switch to ON
forces the onboard 3.3V regulator to be enabled always.

XVME-6500A
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 18 -
http://www.acromag.com
- 18 -
https://www.acromag.com
3.1.2 Core Configuration Switch SW2
Table 3.1.b summarizes the functions, settings, and descriptions for dip
switches SW2-1 thru SW2-4.
Table 3.1.b: Core Configuration Switch SW2
Core Configuration Switch SW2
Position
Function
Switch Setting
Description
1
PMC Bus Speed
Override
OFF
100/50/25MHz
ON (default)
133/66/33MHz
2
XMC Select
Override
OFF (default)
Upper Site XMC/PMC Auto-
Detect
ON
Upper Site Force XMC
3:4
Monitor
Auto-Detect
Override
OFF:OFF
Force Rear VGA Port Enable
OFF:ON
Force Front VGA Port Enable
ON:OFF
(default)
VGA Port Auto-Detect
ON:ON
Force Front VGA port Enable
SW2-1 is used to override the automatic selection of the PMC bus speed.
When the switch is on the bus speed is automatically selected at
133/66/33MHz. When the switch is off the speed is overridden as follows:
133MHz normal bus speed will slow down to 100MHz
66MHz normal bus speed will slow down to 50MHz
33MHz normal bus speed will slow down to 25MHz
Note that with two 133MHz PMC modules installed there may be instability
unless the bus speed is slowed down to 100MHz, as recommended by VITA 39.
SW2-2 is used to override the automatic detection of PMC/XMC modules in
the upper PMC/XMC site. If an installed XMC module is not automatically
recognized, closing this switch will turn off the PMC bridge and force the
connection to the XMC card instead of the bridge.
SW2-3 and 2-4 are used to override the automatic VGA monitor detection on
the VGA ports. If a monitor connected to a port is not automatically
recognized, setting the switches as shown will force a particular VGA port to be
active.

XVME-6500A
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 19 -
http://www.acromag.com
- 19 -
https://www.acromag.com
3.1.3 VME Configuration Switch SW4
Table 3.1.c summarizes the functions, settings, and descriptions for dip switch
SW4.
Table 3.1.c: VME Configuration Switch SW4
VME Configuration Switch SW4
Position
Function
Function Description
1-2
VME_
SYSCON
Sw.1 –Sw.2
OFF –OFF : Disable VME System Controller
OFF –ON : Enable VME system Controller
(default)
ON –OFF : Enable in VME64x mode while
GA = “00001”
ON –ON : Enable Auto-ID mode by BGIN#3
detected low
3
SYSRESET_in
_ENA
VME SYSRESETn assertion on VME backplane
will cause a local reset (OFF by default)
4
VME64x_
AUTOID_ENA
Enable VME Auto Slot Identification Logic (ON
by default)
5
PON_FSM_
DIS
Disable PON_FSM micro-sequencer (ON by
default)
6
SYSRESET_ou
t_ENA
A local reset will generate a VME SYSRESETn
assertion on VME backplane (ON by default)
7
SPI_WR_
PROT
Enable Write Protect for SPI Flash EEPROM
configuration (ON by default)
8
SPI_CFG_
ENA
Enable SPI Flash EEPROM configuration (ON by
default)
SW4 is used to configure the VME system controller properties, as well as the
reset behavior, start-up behavior and properties of the EEPROM which holds
the FPGA firmware.
SW4-1 and SW4-2 are used to manually enable or disable the system controller
functionality of the bridge. System controller can also be automatically
enabled in 64x mode when the geographic address of the board is “00001,” or
slot 1. If both switches are on, Auto-ID mode is selected and system controller
will be enabled if the BGIN#3 signal from the backplane is detected low at
power-up.
If SW4-3 is on, a VME SYSRESETn assertion on the backplane will cause a local
reset. Otherwise, the signal will be isolated from the backplane.
If a VME64x backplane is being used, SW4-4 can be used to enable Auto Slot
Identification.