Advantech MIC-6314 Series User manual

User Manual
MIC-6314
OpenVPX 6U CPU Blade with
4th/5th Gen Intel® Xeon® E3v4/
Core™ Processor

MIC-6314 User Manual ii
Copyright
The documentation and the software included with this product are copyrighted 2019
by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right
to make improvements in the products described in this manual at any time without
notice. No part of this manual may be reproduced, copied, translated, or transmitted
in any form or by any means without the prior written permission of Advantech Co.,
Ltd. The information provided in this manual is intended to be accurate and reliable.
However, Advantech Co., Ltd. assumes no responsibility for its use, nor for any
infringements of the rights of third parties that may result from its use.
Acknowledgements
Intel® and Pentium® are trademarks of Intel® Corporation.
Microsoft Windows and MS-DOS are registered trademarks of Microsoft Corp.
All other product names or trademarks are properties of their respective owners.
Product Warranty (2 years)
Advantech warrants to you, the original purchaser, that each of its products will be
free from defects in materials and workmanship for two years from the date of pur-
chase.
This warranty does not apply to any products that have been repaired or altered by
persons other than repair personnel authorized by Advantech, or products that have
been subject to misuse, abuse, accident, or improper installation. Advantech
assumes no liability under the terms of this warranty as a consequence of such
events.
Because of Advantech’s high quality-control standards and rigorous testing, most
customers never need to use our repair service. If an Advantech product is defective,
it will be repaired or replaced at no charge during the warranty period. For out-of-war-
ranty repairs, you will be billed according to the cost of replacement materials, ser-
vice time and freight. Please consult your dealer for more details.
If you think your product is defective, follow the steps below.
1. Collect all the information about the problem encountered. (For example, CPU
speed, Advantech products used, other hardware and software used, etc.) Note
anything abnormal and list any messages displayed onscreen when the prob-
lem occurs.
2. Call your dealer and describe the problem. Please have your manual, product,
and any relevant information readily available.
3. If your product is diagnosed as defective, obtain a return merchandize authori-
zation (RMA) number from your dealer. This allows us to process your return
more quickly.
4. Carefully pack the defective product, a completed Repair and Replacement
Order card and a proof of purchase date (such as a photocopy of your sales
receipt) into a shippable container. Products returned without a proof of pur-
chase date are not eligible for warranty service.
5. Write the RMA number clearly on the outside of the package and ship the prod-
uct prepaid to your dealer.
Part No. 2002631401 Edition 2
Printed in Taiwan December 2019

iii MIC-6314 User Manual
Declaration of Conformity
CE
This product has passed the CE test for environmental specifications when shielded
cables are used for external wiring. We recommend the use of shielded cables. This
type of cable is available from Advantech. Please contact your local supplier for
ordering information.
FCC Class A
This equipment has been tested and found to comply with the limits for a Class A dig-
ital device, pursuant to part 15 of the FCC rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated
in a commercial environment. This equipment generates, uses, and can radiate radio
frequency energy and, if not installed and used in accordance with the instruction
manual, may cause harmful interference to radio communications. Operation of this
equipment in a residential area is likely to cause harmful interference. In such cases,
users are required to correct the interference at their own expense.
FM
This equipment has passed the FM certification. According to the National Fire Pro-
tection Association, work sites are classified into different classes, divisions, and
groups based on hazard considerations. This equipment is compliant with the specifi-
cations for Class I, Division 2, Groups A, B, C, and D indoor hazards.
Technical Support and Assistance
1. Visit the Advantech website at http://support.advantech.com to obtain the latest
product information.
2. Contact your distributor, sales representative, or Advantech's customer service
center for technical support if you need additional assistance. Please have the
following information ready before calling:
–Product name and serial number
–Description of your peripheral attachments
–Description of your software (operating system, version, application software,
etc.)
–A complete description of the problem
–The exact wording of any error messages

MIC-6314 User Manual iv
Warnings, Cautions, and Notes
Document Feedback
To assist us in making improvements to this manual, we welcome any comments and
constructive criticism. Please send all comments in writing to support@advan-
tech.com
Packing List
Before setting up the system, check that the items listed below are included in the
shipment and in good condition. If any item is missing or damaged, please contact
your dealer immediately.
1 x MIC-6314 all-in-one single board computer (CPU heatsink and PCH heat-
sink included)
1 x storage carrier (2.5" hard drive/ SSD, or M.2) (assembled)
1 x Solder side cover (assembled)
1 x RJ45 to DB9 cable
1 x Warranty certificate
Safety Warnings: CE, FCC class A
Warning! Warnings indicate conditions that if not observed can cause personal
injury!
Caution! Cautions are included to help prevent hardware damage or data losses.
For example,
“Batteries are at risk of exploding if incorrectly installed. Do not attempt
to recharge, force open, or heat the battery. Replace the battery only
with the same or equivalent type recommended by the manufacturer.
Discard used batteries according to the manufacturer's instructions.”
Note! Notes provide additional optional information.

v MIC-6314 User Manual
Safety Instructions
1. Read these safety instructions carefully.
2. Retain this user manual for future reference.
3. Disconnect this equipment from all AC outlets before cleaning. Use only a damp
cloth for cleaning. Do not use liquid or spray detergents.
4. For plugable equipment, the power outlet socket must be located near the
equipment and easily accessible.
5. Protect this equipment from humidity.
6. Place the equipment on a reliable surface during installation. Dropping or letting
the equipment fall may cause damage.
7. The openings on the enclosure are for air convection. Protect the equipment
from overheating. Do not cover the openings.
8. Ensure that the voltage of the power source is correct before connecting the
equipment to the power outlet.
9. Position the power cord away from high-traffic areas. Do not place anything over
the power cord.
10. All cautions and warnings on the equipment should be noted.
11. If the equipment is not used for a long time, disconnect it from the power source
to avoid damage from transient overvoltage.
12. Never pour liquid into an opening. This may cause fire or electrical shock.
13. Never open the equipment. For safety reasons, the equipment should be
opened only by qualified service personnel.
14. If one of the following occurs, have the equipment checked by service person-
nel:
The power cord or plug is damaged.
Liquid has penetrated into the equipment.
The equipment has been exposed to moisture.
The equipment does not work well, or you cannot get it to work according to
the user's manual.
The equipment has been dropped and damaged.
The equipment has obvious signs of breakage.
15. Do not leave this equipment in an environment where the storage temperature
fluctuates below -55 °C (-67 °F) or above 105 °C (221 °F) as this may cause
damage. The equipment should be stored in a controlled environment.
16. Batteries are at risk of exploding if incorrectly replaced. Replace only with the
same or equivalent type as recommended by the manufacturer. Discard used
batteries according to the manufacturer’s instructions.
The sound pressure level at the operator's position does not exceed 70 dB (A) in
accordance with the IEC 704-1:1982 specifications.
DISCLAIMER: These instructions are provided according to the IEC 704-1.
Advantech disclaims all responsibility for the accuracy of any statements contained
herein.

MIC-6314 User Manual vi
Safety Precaution - Static Electricity
Follow these simple precautions to protect yourself from harm and the products from
damage.
To avoid electrical shock, always disconnect the power from the PC chassis
before manual handling. Do not touch any components on the CPU card or
other cards while the PC is powered on.
Disconnect the power before making any configuration changes. The sudden
rush of power as a jumper is connected or a card installed may damage sensi-
tive electronic components.
We Appreciate Your Input
Please let us know if any aspect of this product, including the manual, could benefit
from improvements or corrections. We appreciate your valuable input in helping
make our products better.

vii MIC-6314 User Manual
Contents
Chapter 1 Hardware Configuration......................1
1.1 Introduction ............................................................................................... 2
1.1.1 MIC-6314 SKU introduction .......................................................... 2
Table 1.1: Processor Type .......................................................... 2
1.2 Specifications ............................................................................................ 3
1.2.1 OpenVPX Interface ....................................................................... 3
1.2.2 CPU .............................................................................................. 3
1.2.3 Processor...................................................................................... 3
Table 1.2: Processor Type .......................................................... 3
1.2.4 BIOS ............................................................................................. 3
1.2.5 Chipset.......................................................................................... 4
1.2.6 Memory ......................................................................................... 4
1.2.7 Ethernet ........................................................................................ 4
1.2.8 Storage Interface .......................................................................... 4
1.2.9 Serial Ports ................................................................................... 4
1.2.10 USB Ports ..................................................................................... 5
1.2.11 LEDs ............................................................................................. 5
1.2.12 Watchdog Timer............................................................................ 5
1.2.13 Optional Rear I/O Modules ........................................................... 5
1.2.14 Mechanical and Environmental Specifications.............................. 5
1.2.15 Compact Mechanical Design ........................................................ 5
1.2.16 PCIE Bridge .................................................................................. 6
1.2.17 I/O Connectivity............................................................................. 6
1.2.18 XMC (Switched Mezzanine Card) VITA 42 Compliant.................. 6
1.2.19 Hardware Monitor ......................................................................... 7
1.2.20 Super I/O....................................................................................... 7
1.2.21 RTC and Battery ........................................................................... 7
1.2.22 IPMI............................................................................................... 7
1.2.23 BMC .............................................................................................. 7
1.3 Functional Block Diagram ......................................................................... 8
Figure 1.1 MIC-6314 functional block diagram ............................ 8
1.4 Board Map................................................................................................. 9
Figure 1.2 Board map .................................................................. 9
1.5 Jumpers and Switches .............................................................................. 9
Table 1.3: MIC-6314 Jumper Description.................................... 9
Table 1.4: MIC-6314 Switch Description ..................................... 9
1.5.1 Clear CMOS (CN2) ..................................................................... 10
Table 1.5: CN2 Clear RTC ........................................................ 10
1.5.2 XMC VIO Setting (JP1) ............................................................... 10
Figure 1.3 JP11 for XMC VIO (+5V or +12V) ............................ 10
Table 1.6: P11 for XMC VIO (+5V or +12V) .............................. 10
1.5.3 Switch Settings ........................................................................... 10
Table 1.7: Backplane LAN Configuration .................................. 10
Table 1.8: PCIe configuration of the Expansion Plane (P2) ...... 11
Table 1.9: PCIe configuration of the Data Plane (P1) ............... 11
Table 1.10:RIO COM RS232/RS485/RS422 Mode Selection .... 11
Table 1.11:SW3 Front COM and RTM COM1/COM2 Port Selec-
tion for BMC/SIO UART............................................ 12
1.6 Connector Definitions.............................................................................. 13
Table 1.12:MIC-6314 Connector Description ............................. 13
Figure 1.4 MIC-6314 front panel ports, indicators, and buttons. 13
Table 1.13: Front Panel LEDs ..................................................... 13
1.6.1 USB Connectors ......................................................................... 13
1.6.2 Serial Ports ................................................................................. 14

MIC-6314 User Manual viii
1.6.3 Ethernet Configuration................................................................ 14
1.6.4 SATA Daughter Board Connector (HDD/Extension Module)...... 14
1.6.5 System Reset and BMC Reset Button........................................ 14
1.7 Safety Precautions.................................................................................. 14
1.8 Installation Steps..................................................................................... 15
Figure 1.5 Complete assembly of MIC-6314 convection with the
SATA daughter board............................................... 15
Figure 1.6 Complete assembly of MIC-6314 convection with the
M.2 daughter board .................................................. 16
Figure 1.7 Complete assembly of MIC-6314 ruggedized convec-
tion with the M.2 daughter board.............................. 16
1.9 Battery Replacement .............................................................................. 17
1.10 Software Support .................................................................................... 17
1.11 Power consumption ................................................................................ 17
Table 1.14:MIC-6314 power consumption ................................. 17
Table 1.15:MIC-6314 XMC site power budget ........................... 17
Chapter 2 AMI APTIO BIOS Setup..................... 19
2.1 Introduction ............................................................................................. 20
2.2 Entering Setup ........................................................................................ 20
Figure 2.1 Press <DEL> or <ESC> to enter setup .................... 20
2.2.1 Main Setup.................................................................................. 21
Figure 2.2 Main setup screen .................................................... 21
Table 2.1: BIOS Menu: Main ..................................................... 21
2.2.2 Platform Setup ............................................................................ 22
Figure 2.3 Platform setup screen .............................................. 22
Table 2.2: Platform configuration .............................................. 22
Figure 2.4 Serial console settings screen.................................. 23
Table 2.3: Serial Console Settings ............................................ 23
Figure 2.5 USB configuration screen......................................... 26
Table 2.4: USB Configuration.................................................... 26
Figure 2.6 Trusted computing screen........................................ 27
Table 2.5: Trusted Computing................................................... 27
Figure 2.7 Virtualization settings screen.................................... 28
Table 2.6: Virtualization............................................................. 28
Figure 2.8 Platform management screen .................................. 29
Table 2.7: Platform Management .............................................. 29
Figure 2.9 BMC self-test log screen .......................................... 30
Table 2.8: BMC Self-Test Log ................................................... 30
Figure 2.10System event log screen .......................................... 31
Table 2.9: System Event Log .................................................... 31
2.2.3 Hardware Setup.......................................................................... 32
Figure 2.11Hardware settings screen......................................... 32
Figure 2.12CPU configuration screen ........................................ 32
Figure 2.13Northbridge configuration screen ............................. 33
Figure 2.14Memory configuration screen ................................... 33
Figure 2.15PCI Express port configuration screen..................... 34
Table 2.10:PCI Express Port Configuration ............................... 34
Figure 2.16PCI subsystem setting screen.................................. 35
Table 2.11:PCI Subsystem Settings........................................... 35
Figure 2.17Southbridge configuration screen............................. 37
Figure 2.18SATA configuration screen....................................... 37
Table 2.12:SATA Configuration.................................................. 38
Figure 2.19ACPI settings screen................................................ 38
Table 2.13:ACPI Settings ........................................................... 38
Figure 2.20NCT6106D Super IO configuration screen...............39
Figure 2.21Serial port 1/2/3/4 configuration screen.................... 39
Table 2.14:Serial Port 1/2/3/4 Configuration .............................. 40

ix MIC-6314 User Manual
Table 2.15: SATA Configuration.................................................. 40
Figure 2.22NCT6106D HW monitor screen................................ 40
2.2.4 Server Management Setup ......................................................... 41
Figure 2.23Server management configuration screen................ 41
2.2.5 Boot Setup .................................................................................. 42
Figure 2.24Boot configuration screen......................................... 42
Table 2.16: Boot Configuration.................................................... 42
Figure 2.25Hard disk driver BBS priorities screen...................... 43
Table 2.17:Hard Disk Driver BBS Priority Settings..................... 43
Figure 2.26CSM16 parameters screen....................................... 44
Table 2.18: CSM16 Parameters .................................................. 44
Figure 2.27CSM parameters screen........................................... 45
Table 2.19: CSM Parameters ...................................................... 45
2.2.6 Security Setup............................................................................. 46
Figure 2.28Security configuration screen ................................... 46
2.2.7 Save & Exit Options .................................................................... 47
Figure 2.29Save & Exit configuration screen.............................. 47
Table 2.20: Save & Exit Configuration......................................... 47
Chapter 3 BMC Firmware Operation .................49
3.1 Module Management .............................................................................. 50
3.2 IPMI Interfaces ........................................................................................ 50
Figure 3.1 IPMI interfaces.......................................................... 50
3.2.1 IPMB ........................................................................................... 50
3.2.2 KCS............................................................................................. 50
3.2.3 LAN ............................................................................................. 51
3.3 Sensors ................................................................................................... 51
3.3.1 Sensor List .................................................................................. 52
Table 3.1: Sensor List................................................................ 52
3.3.2 Threshold-Based Sensors .......................................................... 53
Table 3.2: Threshold Descriptions............................................. 53
Table 3.3: Voltage Sensor List .................................................. 53
Table 3.4: Temperature Sensor List .......................................... 54
3.3.3 Discrete Sensors......................................................................... 54
Table 3.5: Voltage Regulator Hot Sensor Bits........................... 54
Table 3.6: Processor Hot Sensor Bits ....................................... 54
Table 3.7: Thermal Trip Sensor Bits.......................................... 55
3.3.4 Example Sensor Data ................................................................. 55
3.3.5 Integrity Sensor........................................................................... 56
Table 3.8: Integrity Sensor Event Definitions ............................ 57
Table 3.9: Integrity Sensor Event Data...................................... 58
3.4 FRU Information...................................................................................... 60
3.4.1 FRU Information Access Commands.......................................... 60
3.4.2 Example FRU Data ..................................................................... 60
3.5 OEM Commands..................................................................................... 60
Table 3.10: OEM Command Overview........................................ 60
3.5.1 IPMItool Raw Command ............................................................. 61
3.5.2 Configuration OEM Commands .................................................. 61
3.5.3 LAN Controller Interface Selection.............................................. 61
3.5.4 FPGA COM Port UART MUX ..................................................... 62
Table 3.11: OEM Interfaces......................................................... 62
Table 3.12:COM1 UART MUX Settings ..................................... 63
Table 3.13:COM2 UART MUX Settings ..................................... 63
3.5.5 BMC UART (CLI) Baud Rate OEM Command ........................... 64
3.5.6 BMC UART (CLI) Enable/Disable OEM Command .................... 64
3.5.7 Read Port 80 (BIOS POST Code) OEM Command.................... 65
3.5.8 MAC Address Mirroring OEM Command.................................... 65
Table 3.14: MAC Address Mapping............................................. 65

MIC-6314 User Manual x
3.5.9 Load Default Configuration OEM Command .............................. 65
3.5.10 Swap BIOS Banks OEM Command ........................................... 66
3.5.11 Graceful Shutdown Timeout OEM Command ............................ 66
3.6 UART and UART Multiplexer .................................................................. 67
3.6.1 UART Block Diagram.................................................................. 67
Figure 3.2 UART functional block overview............................... 67
3.7 ACPI........................................................................................................ 67
3.7.1 ACPI-Featured Graceful Shutdown ............................................ 67
3.7.2 Graceful Shutdown Timeout ....................................................... 67
3.8 BIOS Failover/Redundancy .................................................................... 68
3.8.1 Overview..................................................................................... 68
3.8.2 BIOS Boot Watchdog.................................................................. 68
3.9 Supported Watchdogs ............................................................................ 68
3.9.1 Firmware Watchdog.................................................................... 68
3.9.2 BMC Watchdog........................................................................... 68
3.10 Resets..................................................................................................... 69
3.10.1 Baseboard Management Controller Resets................................ 69
3.10.2 Payload Reset ............................................................................ 69
3.11 Serial Over LAN Setup............................................................................ 70
3.11.1 Preconditions for SOL................................................................. 70
3.11.2 LAN Configuration with IPMItool................................................. 70
3.11.3 SOL Session with IPMItool ......................................................... 72
Chapter 4 HPM.1 Update.................................... 75
4.1 HPM.1 Preconditions .............................................................................. 76
4.1.1 IPMItool....................................................................................... 76
4.1.2 Interfaces .................................................................................... 76
4.2 BMC Bootloader Upgrade....................................................................... 77
4.2.1 Load New BMC Bootloader Image ............................................. 77
4.2.2 Activate BMC Bootloader............................................................ 77
4.3 BMC Firmware Upgrade ......................................................................... 78
4.3.1 Load New BMC Firmware Image................................................ 78
4.3.2 Activate BMC Firmware .............................................................. 78
4.4 FPGA configuration upgrade .................................................................. 79
4.4.1 Load new FPGA image............................................................... 79
4.4.2 Activate FPGA configuration....................................................... 79
4.5 BIOS Upgrade......................................................................................... 80
4.5.1 Load New BIOS Image ............................................................... 80
4.5.2 Activate BIOS Image .................................................................. 81
4.6 Verify Successful Upgrades.................................................................... 82
Appendix A Pin Assignments............................... 83
A.1 P0 Connector .......................................................................................... 84
Table A.1: P0 VPX I/O ............................................................... 84
A.2 P1 Connector .......................................................................................... 85
Table A.2: P1 VPX I/O ............................................................... 85
A.3 P2 Connector .......................................................................................... 86
Table A.3: P2: I/O ...................................................................... 86
A.4 P3 Connector (Reserved) ....................................................................... 87
Table A.4: P3 VPX I/O ............................................................... 87
A.5 P4 Connector .......................................................................................... 88
Table A.5: P4 VPX I/O ............................................................... 88
A.6 P5 Connector .......................................................................................... 89
Table A.6: P5 VPX I/O ............................................................... 89
A.7 P6 Connector .......................................................................................... 90
Table A.7: P6 VPX I/O ............................................................... 90
A.8 Additional Connectors............................................................................. 91

xi MIC-6314 User Manual
Table A.8: CNSATA1 Daughter Board Connector ..................... 91
Table A.9: J15 (P15) Connector ................................................ 91
Table A.10:VCN1 VGA Connector.............................................. 92
Table A.11:CNCOM1 (RJ45) Connector..................................... 92
Table A.12:CN and CN5 USB Ports 1 and 2 .............................. 92
Table A.13:BT1 CMOS Battery................................................... 92
Table A.14:RJ1 LAN1 Connector................................................ 92
Figure A.1 RJ11 LAN indicator................................................... 92
A.8.1 M/D, PWR, BMC HB, and IDE/Hot-Swap LEDs ......................... 93
Appendix B Programming the Watchdog Timer..95
B.1 Watchdog Timer Programming Procedure.............................................. 96
Appendix C I/O Controller List ..............................97
C.1 I/O Controller List .................................................................................... 98
Appendix D Glossary .............................................99
D.1 Glossary ................................................................................................ 100
Appendix E BIOS Checkpoint .............................103
E.1 Checkpoint Ranges/Descriptions .......................................................... 104
E.2 Standard Checkpoints........................................................................... 105
E.2.1 SEC Phase ............................................................................... 105
E.2.2 PEI Phase ................................................................................. 105
E.2.3 DXE Phase ............................................................................... 107
E.3 ACPI/ASL Checkpoints ......................................................................... 109
E.4 OEM-Reserved Checkpoint Ranges ..................................................... 109
Appendix F IPMI/PICMG Command Subset
Supported by BMC111
F.1 Standard IPMI Commands (v2.0).......................................................... 112
F.1.1 IPM Device Global Commands................................................. 112
F.1.2 BMC Watchdog Timer Commands ........................................... 112
F.1.3 BMC Device and Messaging Commands ................................. 112
F.1.4 Chassis Device Commands...................................................... 114
F.1.5 Event Commands ..................................................................... 114
F.1.6 PEF and Alerting Commands ................................................... 114
F.1.7 Sensor Device Commands ....................................................... 115
F.1.8 FRU Device Commands ........................................................... 115
F.1.9 SDR Device Commands ........................................................... 115
F.1.10 SEL Device Commands............................................................ 116
F.1.11 LAN Device Commands............................................................ 116
F.1.12 Serial/Modem Device Commands ............................................ 116
F.1.13 Bridge Management Commands (ICMB).................................. 117
F.1.14 Discovery Commands (ICMB) .................................................. 118
F.1.15 Bridging Commands (ICMB) ..................................................... 118
F.1.16 Event Commands (ICMB) ......................................................... 118
F.1.17 OEM Commands for Bridge NetFn ........................................... 118
F.1.18 Other Bridge Commands .......................................................... 119
F.2 PICMG IPMI Commands....................................................................... 119

MIC-6314 User Manual xii
F.2.1 AdvancedTCA (PICMG 3.0 R3.0 Base Specification) .............. 119
F.2.2 HPM.1 (R1.0)............................................................................ 120
F.3 OEM/Group IPMI Commands ............................................................... 120
F.3.1 Advantech OEM Commands .................................................... 120
Appendix G Drivers and Tools............................ 121
G.1 OpenIPMI.............................................................................................. 122
G.2 IPMItool................................................................................................. 122

Chapter 1
1Hardware
Configuration
This chapter explains how to
configure the MIC-6314 hardware.

MIC-6314 User Manual 2
1.1 Introduction
The MIC-6314 is Advantech’s next generation single processor 6U VPX blade, based
on the 4th/ 5th Generation Intel® Core™ embedded platform with increased cache
size and efficiency, as well as instruction set improvements. The MIC-6314 provides
two configurable PCIE x 8 ports in the VPX data plane and two PCI Express ports x8
lanes in the VPX expansion plane to enable the highest performance available in the
6U VPX form factor compute intense applications. These PCIE interfaces offer high
speed up to PCIE gen. 2 (5Gb/s) throughput, low latency, scalable, error recoverable
deterministic inter connectivity to the mainstream peripherals and I/O cards such as
DSP and FPGA cards. The PCIE widths and ports on the data plane and the exten-
sion plane of MIC-6314 is user configurable, which make MIC-6314 capable to
replace the PCIE switch blade in a small system.
With a SO-DIMM socket and additional soldered, onboard DRAM with ECC in a dual
channel design running up to 1600MT/s, the MIC-6314 can be integrated into various
harsh environments while maintaining maximum memory throughput, and supports
memory expansion by using the latest SO-DIMM technology simultaneously.
Tailored for harsh environments, the MIC-6314 has a native ruggedized convection
cooled heat sink adaptable to various chassis environments; with the alternated
optional air cooled heat sink, additional I/O is provided on the front panel. An onboard
soldered, industrial SSD is included for maximum reliability, and a SSD socket is also
available for a cost-efficient, modular storage. By using Intel®’s powerful PCH (Lynx
Point) with its advanced SATA controller, the MIC-6314 offers high storage capacity
at up to 6Gbps transfer speed. An onboard XMC site with PCIe x8 gen.3 connectivity
can host high speed offload or I/O mezzanines. Two USB 3.0 ports on the front panel
can connect to external devices with up to 5Gbps data rate. Network and remote con-
nectivity can be achieved via a RS-232 console (RJ-45) and two GbE RJ-45 ports,
powered by Intel®’s latest Gigabit Ethernet controller.
The Intel® next generation graphics engine Iris Pro offers up to 2x the graphic perfor-
mance compared to previous generation solutions. Triple independent display sup-
port can be implemented by using VGA and 2 DVI ports on MIC6314. Audio is
powered by a ALC892 controller via the backplane interface, and provides media
support. A PCIE interface is reserved for the optional M.2 high speed stor-
age.Besides the modern M.2 storage, three SATA III one SATA II and seven USB
ports (2x USB 3.0, 5x USB 2.0) are also connected to the backplane to fulfill the
demand for extra IO ports or storage. Four GbE ports (two SERDES selectable) sup-
port system level IP connectivity, and four UART interfaces (RS232/422/485 select-
able) can be leveraged to interface to legacy devices and consoles.
1.1.1 MIC-6314 SKU introduction
Table 1.1: Processor Type
MIC-6314
Model Number CPU Number of Cores
Cooling
Method
External Storage
(not included) XMC
MIC-6314-A1A4E I7-5850EQ 4 Convection
cooling SSD --
MIC-6314-A2A4E I7-5850EQ 4 Convection
cooling PCIE M.2 Yes
MIC-6314-B1C4E i5-4402E 2
Ruggedized
convection
cooling
SSD --

3 MIC-6314 User Manual
Chapter 1 Hardware Configuration
1.2 Specifications
1.2.1 OpenVPX Interface
MIC-6314 is compliant with the OpenVPX MOD6-PAY-4F1Q2U2T-12.2.1-2 profile.
Two lanes of PCEI x 8 are provided in the P1 dataplane. Another two lanes of PCIe
x8 are routed to the P2 expansion plane. All of these PCIE lanes come from a gen. 3
PCIE switch respectively. Please contact the Advantech representatives for the differ-
ent configuration availability. Two lanes of 1GBase-T (can be configured to SerDes
upon request) are employed for the P4 control plane. Another two lanes of 1GBase-T
are routed to the P6 user define plane.
1.2.2 CPU
MIC-6314 supports Intel® Xeon® E3Lv4 and Core™ i5-4402E processors, with clock
frequencies of up to 3.4 GHz. The Intel® Xeon® E3Lv4 processor is integrated with
the Intel® Iris™ Pro Graphics P6300 embedded graphics controller that supports
OpenGL 4.3, DirectX 11.2, and OpenCL 2.0 for enhanced 3D graphics processing.
Moreover, the Intel® Xeon® E3Lv4 processor is equipped with Intel® Turbo Boost
Technology 2.0, which activates automatically when the OS requests the highest pro-
cessor performance state.
Meanwhile, the 4th Gen Intel® Core™ i5-4402E processor offers a two-fold improve-
ment in performance compared to that of the previous generation. Finally, the inclu-
sion of Intel® HT Technology enables MIC-6314 to execute multiple demanding
applications simultaneously, while maintaining system responsiveness.
1.2.3 Processor
The Intel® i7-5850EQ processor is the default for the air-cooled MIC-6314 SKU
(MIC-6314-A series with i7-5850EQ), whereas the Intel® Core™ i5-4402E processor
is the default for the conduction-cooled MIC-6314 SKU (MIC-6314-B series).
Please contact your distributor or local Advantech representative for information
regarding the availability of other Xeon® E3Lv4 or 4th/5th Gen Core™ SKUs.
1.2.4 BIOS
MIC-6314 features an 8 Mbyte SPI flash containing a board-specific BIOS (from AMI)
designed to meet industrial and embedded system requirements.
Table 1.2: Processor Type
Intel CPU
Model Number
CPU
architecture # cores Graphic Engine Freq. Cache DMI CPU TDP
i7-5850EQ Broadwell
(14nm) 4Intel® Iris™ Pro Graphics P6200
3.4GHz
(max) 6MB 5 GT/s 47W
i5-4402E Haswell
(22nm) 2Intel® HD Graph- ics 4600 2.7 GHz 3 MB 5 GT/s 25W
Note! Because power consumption and thermal restrictions vary between dif-
ferent VPX systems, please double check these items before installing a
higher speed CPU not specified in the table above.

MIC-6314 User Manual 4
1.2.5 Chipset
The Intel® Mobile QM87 (Lynx Point) chipset integrates several capabilities to pro-
vide flexibility for connecting I/O devices. The Intel® QM87 chipset offers fast access
to peripheral devices and delivers outstanding performance through high bandwidth
interfaces, such as PCI Express, Serial ATA, and integrated USB 3.0. The chipset
also reduces power consumption through the enhanced link power management of
the Advanced Host Controller Interface (AHCI), enables easy expansion with native
hot plug support, and enhances boot and multi-tasking performance with native com-
mand queuing (NCQ).
1.2.6 Memory
MIC-6314 is equipped with 8 GB of onboard DDR3L memory with ECC support. The
SKU with convection heatsink also has one 204-pin SODIMM socket that can accom-
modate an additional 8GB of 1.35V memory.
The following SODIMMs have been verified with this product:
1.2.7 Ethernet
MIC-6314 features two Intel® I210 LAN controllers to provide two lanes of 10/100/
1000Base-T Ethernet connectivity (on LAN 1 and 2) to the front panel, while four 10/
100/1000Base-T Ethernet lanes are provided to P4 and P6 with I350AM4.
Front I/O (RJ45)
Backplane
To configure the two P4 lanes of Ethernet to SerDes, contact your local Advantech
representative for assistance.
1.2.8 Storage Interface
The MIC-6314 supports four ports of SATA III and two SATA II interfaces. A SATA III
interface is routed to the SATA connector on the daughter board. The rest of three
SATAIII are routed to P5. Two SATA II interfaces are connected to an onboard sol-
dered, industrial SSD for maximum reliability and the backplane via P5 respectively.
The default onboard flash capacity is 64GB. For different onboard flash capacity,
please contact your local Advantech branch or distributor to offer the customized
option.
MIC-6314 also provides a M.2 daughter board in the MIC-6314-A2A4E SKU. This
M.2 has a PCIe gen. 2 x 2 interface, and it supports PCIe M-key type M.2 therefore.
1.2.9 Serial Ports
MIC-6314 supports 4 COM ports. COM1 and COM2 are switchable to the onboard
RJ45 COM port or RTM. All COM ports can be configured to RS232/RS422/RS485
mode via the onboard switch.
Brand Size Speed Vendor PN ECC Pin
Count
Memory
Chip
ATP 8 GB DDR3L
1600 AW24P7228BLK0M Yes 204 pins Micron
Advantech 8 GB DDR3L
1600 AQD-SD3L8GE16-SG Yes 204 pins Samsung
8 GB DDR3L
1600 AQD-SD3L8GE16-MG Yes 204 pins Micron

5 MIC-6314 User Manual
Chapter 1 Hardware Configuration
1.2.10 USB Ports
Two USB 3.0 compliant ports with fuse protection are provided. Both ports are routed
to the front panel connectors on MIC-6314. Two additional USB 3.0 ports are routed
to the rear I/O module via the P5 connector. Besides USB 3.0 ports, one USB 2.0
port is provided to the front panel (the air cooled SKU), and another five ports to the
backplane P6.
1.2.11 LEDs
Four LEDs are provided on the front panel as follows:
One blue LED indicates hot-swap capability. The blue color indicates that the
board can be safely removed from the system.
One yellow LED indicates HDD status. A blinking light indicates HDD activity.
One LED indicates power status. When the LED light is green, power is being
provided to the board.
One LED indicates BMC status. The light is green when the BMC is present.
1.2.12 Watchdog Timer
An onboard watchdog timer provides system reset capabilities via software control.
The programmable time intervals range from 1 to 255 seconds. This function is
enabled by default in the SKU with IPMI management. Should you require this func-
tion in the SKU without IPMI management, please contact your local field service
engineer or salesperson.
1.2.13 Optional Rear I/O Modules
Please contact your local Advantech representative or distributor for custom RI/O
inquires.
1.2.14 Mechanical and Environmental Specifications
Operating Temperature: -40 ~ 70 °C (32 ~ 131 °F)
Storage Temperature: -40 ~ 85 °C (-40 ~ 185 °F)
Humidity: 95% @ 40 °C (non-condensing)
Humidity (Non-Operating): 95% @ 60 °C (non-condensing)
Vibration: VITA47, V2 (conduction cooled SKU with onboard flash only)
0.008 g²/Hz, 2 Grms, 5-500Hz (convection cooled)
Shock: 40G (with onboard flash only)
Altitude: 50,000 m above sea level
Board Size: 233.35 x 160 mm (6U size), 1-slot (4 TE) wide
Weight: 0.95 kg
1.2.15 Compact Mechanical Design
The MIC-6314’s mechanical design is compliant with VITA 48.2, REDI specifications.
The MIC-6314-B1C4E model is Advantech’s standard conduction-cooled SKU. For
custom conduction-cooled heatsink designs, please check with your distributor or
local Advantech representative for feasibility.
Note! The MIC-6314’s operating temperature range depends on the processor
installed and the airflow through the chassis.

MIC-6314 User Manual 6
1.2.16 PCIE Bridge
MIC-6314 uses a PLX PEX8733 component, a 32-lane, 8-port, Gen 3 PCIe switch
device as a gateway for intelligent subsystems. When configured as a system con-
troller, the bridge acts as a standard transparent PCI Express bridge. MIC-6314
receives power from the backplane and supports rear I/O. The PLX PEX8733 com-
ponent offers the following features:
PCIe interface:
–PCI Express Base Specification, r3.0
Supports transparent and non-transparent operation modes
Supports forward and reverse bridging
End-to-end CRC (ECRC) and Poison bit support
Failover support, can be configured for 1+1 redundancy or N+1 redundancy
Please consult the PLX PEX8733 data book for details.
1.2.17 I/O Connectivity
The MIC-6314’s front panel I/O is provided by two RJ45 Gigabit Ethernet ports, one
RJ45 COM port, two USB 3.0 ports, one USB 2.0, one DVI connector, and one XMC/
PMC knockout.
The onboard I/O consists of one SATA channel that can be connected to a daughter
board or a CFast slot. Rear I/O connectivity is available via the following VPX con-
nectors:
P1: Two PCIe x8
P2: Two PCIe x8
P4: XMC I/O, GPIO, two lanes of GbE or SerDes
P5: Four SATA ports (3 SATA III ports and one SATA II port), two COM ports,
two DVI ports, two USB 2.0, and two USB 3.0
P6: Two GbE, five USB 2.0, keyboard/mouse, two COM ports, Line-In, Line-Out,
and Mic
Please refer to the appendix for detailed pin definitions.
1.2.18 XMC (Switched Mezzanine Card) VITA 42 Compliant
Additional I/O or co-processing functionality is supported by add-on PMC modules.
MIC-6314 supports one XMC site that is fully compliant with the VITA 46.9 PMC/XMC
Rear I/O Fabric Signal Mapping on 3U and 6U VPX Modules Standard specification.
The two-layer front panel design complies with IEEE 1101.10. All connectors are
firmly screwed to the front panel, and a shielding gasket is attached to the panel
edge, reducing emissions and increasing protection from external interference.
Front Panel Main On-board Features
Part Number Display USB Ethernet
(RJ45)
Console
(RJ45) CPU SODIMM Socket
MIC-6314-A1A4E DVI x1 2.0x1;
3.0x2 2 1 I7-5850EQ Yes
MIC-6314-A2A4E DVI x1 2.0x1;
3.0x2 2 1 I7-5850EQ Yes
MIC-6314-B1C4E VGA x1 3.0x2 0 0 i5-4402E No

7 MIC-6314 User Manual
Chapter 1 Hardware Configuration
1.2.19 Hardware Monitor
A hardware monitor (NCT7904D) is available for monitoring critical hardware param-
eters. The monitor is attached to the BMC for monitoring the CPU temperature and
core voltage.
1.2.20 Super I/O
The MIC-6314 Super I/O device supports the following legacy PC devices:
Four serial ports connected to the rear I/O module (COM1 to COM4) or front
panel via a multiplexer in the FPGA (COM1 or COM2).
The PS2 (keyboard/mouse) is routed to the rear I/O module.
1.2.21 RTC and Battery
The RTC module maintains the date and time. On the MIC-6314 model, the RTC cir-
cuitry is connected to battery sources (CR2032M1S8-LF, 3V, 210mAH).
1.2.22 IPMI
MIC-6314 uses the Intelligent Platform Management Interface (IPMI) to monitor the
system health. A NXP LPC1768 microcontroller provides BMC functionality to inter-
face between the system management software and platform hardware. Full IPMI
details are provided in Chapter 3.
1.2.23 BMC
The management firmware of MIC-6314 is implemented on a 32-bit ARM Cortex-M3
core. An external SPI EEPROM is used for storing field-replaceable unit (FRU) inven-
tory data and non-volatile configurations.
1.2.23.1 Key Features
Advantech integrity sensor
Based on Advantech’s IPMI core and designed for xTCA, CPCI, and VPX
Compliant with IPMI 1.5 and IPMI 2.0 specifications
IPMI-over-LAN
Serial-over-LAN
KCS interface for direct IPMI communication between the operating system and
BMC
BIOS fail over, including BIOS watchdog
Full BMC Watchdog support as defined in the IPMI specification
Full BMC firmware redundancy
–Manual roll back
–Automatic roll back for update failure
HPM.1 for in field updates, supporting
–BMC firmware
–FPGA
–BIOS
UART muxing between all serial interfaces for easy console access (UART1,
UART2 only)
Additional sensors for hardware monitoring

MIC-6314 User Manual 8
1.3 Functional Block Diagram
Figure 1.1 MIC-6314 functional block diagram
Daughter board
Intel
Broadwell-H
4/2 Core / GT2
ECC/BGA
SPI
8MB
TPM
FPGA
Handle SW
RS232
User + Reset
buttons
User LEDs
Intel
PCH
2x USB 2.0 / 3.0
BMC
UART (2x)
to RTM
8GB DDR3 onboard
FDIx2 DMI
SPI
LPC
NC-SI
3x SATAIII (6Gbps)
SPI
Power+IPMB
P0
P1
P2
P3
(N/A)
P4
P5
P6
USB 3.0 (2x)
Audio
UART (2x)
From FPGA
1xPCIex16/ 2x PCIex8(NT selectable on one port)
I350 (1)
2x 1GBase ȸT
(SERDES opt)
USB 2.0 (2x)
DVIx2
DVI x2
VGA (optional, to front panel or backplane)
to P5
From CPU
PCIex8
XMC
8d +12d XMC IO
SPI
8MB
IPMB0-A/B
to P0
PCIe x 8
USB 2.0
SATAIII (6Gbps)
1600 w/ ECC
1600 w/ ECC
8GB DDR3 SODIMM
Intel
QuadNIC
2x PCIex1
KB/MS
From SIO
SSD
onboard
SATAII (3Gbps)
PCIex4
Intel
GbE NIC
GPIOx16 to P2, P4, P6
or
codec
Intel
QuadNIC
NC-SI from BMC
P6
From Intel I350
2x 1GBase ȸT
UART (2x)
From SIO
SATAII (3Gbps)
From QM87
USB 2.0 (3x)
USB 2.0 (3x)
to P6
2x 1GBase ȸT
Line-in
Line-out
MIC
DVI
VGA from PCH
(optional)
1xPCIex16/ 2x PCIex8/
4x PCIe x4
(NT selectable on one port)
PCIe x 8
PCIE switch
PCIE switch
1x PCIe x2
M.2 Daughter
board