Beck IPC SC123 User manual

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 1
Hardware Manual
IPC@CHIP Embedded Controller Family
SC123/SC143
High Performance, 80186-Compatible,
16-Bit Embedded Microcontroller
Single Chip PC with Flash, RAM, Watchdog
Order No. IPC@CHIP
Embedded Controller SC123:
541094
Embedded Controller SC123-LF:
543257
Embedded Controller SC123-IEC:
541528
Embedded Controller SC123-IEC-LF:
543259
Embedded Controller SC143:
541529
Embedded Controller SC143-LF:
543258
Embedded Controller SC143-IEC:
541530
Embedded Controller SC143-IEC-LF:
543260

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 2
Copyright & Trademark
IPC@CHIP® is a registered trademark of Beck IPC. Ethernet is a
registered trademark of Xerox Corporation. All other product names,
company names, logos or other designations mentioned herein are
trademarks of their respective owners.
AM186 is a trademark of Advanced Micro Devices, Inc.
Ethernet is a registered trademark of Xerox Corporation.
SPI is a trademark of Motorola, Inc.
No part of this guide may be reproduced or transmitted in any form for
any purpose other than the purchaser's personal use, without the express
written permission of Beck IPC.
Beck IPC GmbH
Grüninger Weg 24
35415 Pohlheim-Garbenteich / Germany
Phone: [phone]
Fax: [phone]
Technical Support
Phone: [phone]
Fax: [phone]
Online: www.beck-ipc.com
E-mail: [email protected]

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 3
Table of Contents
1Overview .................................................................................................................... 7
2Features..................................................................................................................... 8
3Block Diagram............................................................................................................ 9
4Pin Description ......................................................................................................... 10
4.1 Pin Configuration ........................................................................................................................ 10
4.2 System Interface......................................................................................................................... 11
4.3 Chip Selects................................................................................................................................ 13
4.4 DMA............................................................................................................................................ 14
4.5 Interrupts..................................................................................................................................... 14
4.6 UART0 Interface......................................................................................................................... 14
4.7 UART1 Interface......................................................................................................................... 15
4.8 UART2 Interface......................................................................................................................... 15
4.9 I²C Bus........................................................................................................................................ 16
4.10 Pure PIOs ................................................................................................................................... 16
4.11 SPI Bus / UART3........................................................................................................................ 17
4.12 Timers......................................................................................................................................... 17
4.13 CAN Bus Interface...................................................................................................................... 18
4.14 USB Interface ............................................................................................................................. 18
4.15 JTAG Interface............................................................................................................................ 18
4.16 Ethernet 0 Interface (Internal PHY) ............................................................................................ 19
4.17 MII Ethernet 1 Interface (External PHY)..................................................................................... 19
4.18 PHY Power (Internal PHY) ......................................................................................................... 20
4.19 Power.......................................................................................................................................... 20
4.20 Programmable I/O Pins .............................................................................................................. 21
5System Start-up Configuration.................................................................................. 22
5.1 PIO Pins...................................................................................................................................... 22
5.2 Address Pins............................................................................................................................... 22
5.3 PFI Pin........................................................................................................................................ 23
6Functional Description.............................................................................................. 24
6.1 CPU ............................................................................................................................................ 24
6.1.1 Registers ............................................................................................................................................... 24
6.1.2 Memory Organization ............................................................................................................................ 25
6.1.3 24-Bit Address Mode............................................................................................................................. 25
6.1.4 Peripheral Accesses through the Address-/Databus ............................................................................. 26
6.2 UARTs ........................................................................................................................................ 32
6.2.1 RTOS Update via serial ports................................................................................................................ 32
6.3 SPI.............................................................................................................................................. 33
6.4 I²C............................................................................................................................................... 35
6.5 CAN ............................................................................................................................................ 36
6.5.1 Introduction............................................................................................................................................ 36
6.5.2 TX Channels.......................................................................................................................................... 37
6.5.3 RX Channel ........................................................................................................................................... 37
6.6 USB............................................................................................................................................. 38
6.7 Power Fail Interrupt .................................................................................................................... 39
6.7.1 Description............................................................................................................................................. 39

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 4
6.7.2 Storing non-volatile data to internal flash memory................................................................................. 39
6.7.3 Storing non-volatile data to external memory ........................................................................................ 39
6.8 Mapping external memory.......................................................................................................... 40
6.9 MII Interface................................................................................................................................ 40
6.10 Timers......................................................................................................................................... 41
6.11 Reset........................................................................................................................................... 41
7System Overview...................................................................................................... 42
7.1 Memory map............................................................................................................................... 42
7.2 System interrupts........................................................................................................................ 43
7.3 Watchdog.................................................................................................................................... 43
8Characteristics.......................................................................................................... 44
8.1 Absolute Maximum Ratings........................................................................................................ 44
8.2 Recommended Operating Ranges............................................................................................. 44
8.2.1 Voltage and Temperature...................................................................................................................... 44
8.2.2 Supply Current....................................................................................................................................... 44
8.2.3 Inputs..................................................................................................................................................... 45
8.2.4 Outputs.................................................................................................................................................. 45
8.2.5 Programmable Input/Output Pins .......................................................................................................... 45
8.2.6 XIN/XOUT Pins...................................................................................................................................... 45
8.2.7 PHY Receiver Input Characteristics ...................................................................................................... 46
8.2.8 100Base-TX Transceiver Characteristics .............................................................................................. 46
8.3 AC Characteristics...................................................................................................................... 47
8.3.1 Timing Parameter List............................................................................................................................ 47
8.3.2 System bus timing ................................................................................................................................. 48
8.3.3 Reset timing........................................................................................................................................... 49
9Routing and Placement Rules.................................................................................. 50
9.1 PCB Board Design suggestion for SC123/SC143...................................................................... 50
9.2 Routing and placement rules for Ethernet components ............................................................. 51
9.3 Suggested Magnetics ................................................................................................................. 51
10 Package Information.............................................................................................. 52
10.1 Dimensions................................................................................................................................. 52
10.2 Cover Description ....................................................................................................................... 53
11 Application Examples ............................................................................................ 54
11.1 Minimum Circuit Requirements .................................................................................................. 54
11.2 Ethernet Example Circuit............................................................................................................ 55
11.3 External memory......................................................................................................................... 56
11.4 Traffic/Link/Speed LEDs............................................................................................................. 57
11.5 SC1x3 Socket............................................................................................................................. 58
11.6 Custom series programming of SC1x3....................................................................................... 58
12 CPUCLK handling ................................................................................................. 59
13 Reflow Profile ........................................................................................................ 60
14 History ................................................................................................................... 61

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 5
List of Figures
Figure 3-1: Block Diagram............................................................................................................................................... 9
Figure 4-1: Ball Grid Array Looking through Top of Package ........................................................................................ 10
Figure 5-1: power on flowchart with power fail interrupt enabled................................................................................... 23
Figure 6-1: 24-Bit Address Generation.......................................................................................................................... 25
Figure 6-2: Contiguously segments in memory ............................................................................................................. 25
Figure 6-3: 8 Bit read access from C00h, CSBE = 0, Read = 0x55 ............................................................................... 26
Figure 6-4: 16 Bit read access from C00h, CSBE = 0, Read = 0x1234.......................................................................... 26
Figure 6-5: 16 Bit read access from C01h, CSBE = 0, Read = 0x5678.......................................................................... 27
Figure 6-6: 8 Bit read access from C01h, CSBE = 0, Read = 0x55 ............................................................................... 27
Figure 6-7: 8 Bit write access to C00h, CSBE = 0, Write = 0x23.................................................................................... 28
Figure 6-8: 16 Bit write access to C00h, CSBE = 0, Write = 0x1234.............................................................................. 28
Figure 6-9: 16 Bit write access to C01h, CSBE = 0, Write = 0x5678.............................................................................. 29
Figure 6-10: 8 Bit write access to C01h, CSBE = 0, Write = 0x23 ................................................................................. 29
Figure 6-11: 8 Bit write access to C00h, CSBE = 1, Write = 0x23 ................................................................................. 30
Figure 6-12: 8 Bit write access to C01h, CSBE = 1, Write = 0x23 ................................................................................. 30
Figure 6-13: 16 Bit write access to C00h, CSBE = 1, Write = 0x1234............................................................................ 31
Figure 6-14: 16 Bit write access to C01h, CSBE = 1, Write = 0x5678............................................................................ 31
Figure 6-15: TX Message Routing................................................................................................................................. 37
Figure 6-16: Pullup-/down Resistors for USB full-speed device.................................................................................... 38
Figure 6-17: Sketch of the logic to decode the chip select for an external memory....................................................... 40
Figure 6-18: Internal reset processing........................................................................................................................... 41
Figure 7-1: Memory Map............................................................................................................................................... 42
Figure 8-1: System bus timing....................................................................................................................................... 48
Figure 8-2: Reset Timing............................................................................................................................................... 49
Figure 9-1: PCB Board Design suggestion.................................................................................................................... 50
Figure 9-2: PCB Board Design suggestion.................................................................................................................... 50
Figure 10-1: Package Dimensions ................................................................................................................................ 52
Figure 10-2: Cover......................................................................................................................................................... 53
Figure 11-1: Minimum Circuit Requirements for SC1x3 ................................................................................................ 54
Figure 11-2: Ethernet Example Circuit........................................................................................................................... 55
Figure 11-3: Example circuit for connecting an external memory.................................................................................. 56
Figure 11-4: Circuit Example for two bi-coloured LEDs................................................................................................. 57
Figure 11-5: Circuit Example for four mono-coloured LEDs.......................................................................................... 57
Figure 11-6: SC1x3-Socket........................................................................................................................................... 58
Figure 13-1: Reflow Profile............................................................................................................................................ 60

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 6
List of Tables
Table 4-1: Pin Description of System Interface ............................................................................................................. 12
Table 4-2: Pin Description of Chip Selects.................................................................................................................... 13
Table 4-3: Pin Description of DMA Request Pins.......................................................................................................... 14
Table 4-4: Pin Description of Interrupts......................................................................................................................... 14
Table 4-5: Pin Description of UART0............................................................................................................................. 14
Table 4-6: Pin Description of UART1............................................................................................................................. 15
Table 4-7: Pin Description of UART2............................................................................................................................. 15
Table 4-8: Pin Description of I²C Bus ............................................................................................................................ 16
Table 4-9: Pin Description of Pure PIO pins.................................................................................................................. 16
Table 4-10: Pin Description of SPI Bus / UART3........................................................................................................... 17
Table 4-11: Pin Description of Timers ........................................................................................................................... 17
Table 4-12: Pin Description of CAN Bus........................................................................................................................ 18
Table 4-13: Pin Description of USB............................................................................................................................... 18
Table 4-14: Pin Description of JTAG............................................................................................................................. 18
Table 4-15: Pin Description of internal PHY.................................................................................................................. 19
Table 4-16: Pin Description of MII ................................................................................................................................. 19
Table 4-17: Pin Description of PHY Power Pins............................................................................................................ 20
Table 4-18: Pin Description of Power Pins.................................................................................................................... 20
Table 4-19: List of PIO sharing designations................................................................................................................. 21
Table 6-1: General Purpose Registers.......................................................................................................................... 24
Table 6-2: Segment, Status and Control Registers....................................................................................................... 24
Table 6-3: Segment Register Selection Rules............................................................................................................... 25
Table 6-4:Context between SDO and SDI to MOSI and MISO in different modes ........................................................ 34
Table 6-5: Provided CAN baud rates............................................................................................................................. 36
Table 6-6: Truth Table of FLSSEL and UCSOUT# and external memory..................................................................... 40
Table 8-1: Absolute Maximum Ratings.......................................................................................................................... 44
Table 8-2: Recommended Operating Ranges............................................................................................................... 44
Table 8-3: Supply Current ............................................................................................................................................. 44
Table 8-4: Inputs ........................................................................................................................................................... 45
Table 8-5: Outputs......................................................................................................................................................... 45
Table 8-6: PIOs............................................................................................................................................................. 45
Table 8-7: 3. I/O Characteristics Xin/Xout Pins ............................................................................................................. 45
Table 8-8: PHY Receiver Input Characteristics............................................................................................................. 46
Table 8-9: 100Base-TX Transceiver Characteristics..................................................................................................... 46
Table 8-10: AC Characteristics...................................................................................................................................... 47
Table 10-1: Package Dimensions.................................................................................................................................. 52
Table 13-1: Typical Reflow Profile Conditions............................................................................................................... 60

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 7
1 Overview
The IPC@CHIP® SC1X3 family is a combination of hardware and software including the preinstalled real time
operating system, TCP/IP stack, Web server, FTP server, Telnet server, enable designers to reduce the size, power
consumption, and cost of embedded systems, while increasing reliability, functionality, performance and time to
market.
The IPC@CHIP® SC1x3 family of System on Chip microcontrollers are embedded controllers that come with a 16-bit
186 processor and are designed to WEB- or LAN-enable products. The operating frequency is up to 96 MHz, the
package is a BGA-177 package.
The IPC@CHIP® SC1x3 family is the ideal solution for new designs requiring Ethernet TCP/IP communication over
twisted pair and/or through any serial interface. They come with an integrated 8MByte RAM and up to 8MByte FLASH,
thus reducing memory subsystem costs. The minimum endurance of the Flash memory is 100.000 write cycles
(depending on environmental stress e.g. temperature, used space and file size).
The IPC@CHIP® SC1X3 family microcontrollers also integrate the functions of the CPU, address bus, data bus, two
independent timers, watchdog timer, chip selects, interrupt controller, DMA controller, four asynchronous serial ports,
and programmable I/O pins on one chip. It also supports I²C-Bus and SPI (Serial Peripheral Interface). The USB
device interface supports user specific connections to standard USB hosts like PCs.
The IPC@CHIP® SC1X3 family is a highly integrated design that provides all Media Access Control (MAC) and
Encode-Decode (ENDEC) functions in accordance with the IEEE 802.3, 802.3u, and 802.3af standard. The integrated
10/100Base-T PHY makes IPC@CHIP® SC1X3 more cost-effective.
The IPC@CHIP® SC1X3 has been designed to meet the most common requirements of embedded products
developed for the communications, office automation, mass storage, and general embedded markets. Specific
applications would include industrial controls, data collection, protocol conversion, process monitoring and internet
connectivity.
As an option it can also be used in combination with an IEC61131-3 CoDeSys Run Time System.
IPC@CHIP
RAM
FLASH
CoDeSys license included
SC123
8 MByte
2 MByte
no
SC123-IEC
8 MByte
2 MByte
yes
SC143
8 MByte
8 MByte
no
SC143-IEC
8 MByte
8 MByte
yes

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 8
2 Features
16-bit SC186-EX CPU
Software compatible with SC186/AM186
(x86 instruction set)
Programmable PLL provides up to 96 MHz
using one 25MHz Clock
256 KByte internal fast SRAM (zero wait state
operation)
Embedded boot loader in ROM
Full external system bus interface
24-bit address bus
16-bit data bus
Programmable Chip Selects
Embedded Ethernet controllers
Two 10/100Mbps Ethernet Controllers with
one built-in PHY and one MII PHY interface,
32 byte FIFOs
Four high performance serial ports
RS232/422/485 RTS/CTS and DMA
Enhanced receive FIFOs (4 deep)
Additional handshake control
Two CAN V2.0B 1 Mbps controllers
hardware priority queuing and data filtering
features
One Universal Serial Bus (USB) 1.1 Port
One 3-wire Serial Peripheral Interface (SPI)
controller (48MHz)
One 2-wire I²C serial controller
JTAG interface
In-circuit emulator support with breakpoints
and trace buffer
Four DMA channels, interrupt controller, 2
independent timers, and external memory
select logic
Watchdog-timer and power-on reset logic
Internal 8 MByte SDRAM memory
Up to 8 MByte Flash memory
Expandable through external Flash memory
Special NV-SRAM interface supports external
non-volatile memory
31 GPIO pins
Package 25x25 mm 177 PBGA, 1.27 pitch, lead
free, RoHS compliant
Temperature range: -25°C to 85°C ambient
Power Dissipation < 2 W
Pre-installed Real Time Operating System
(IPC@CHIP RTOS)
Software-compatible with the 80C186
microcontrollers and IPC@CHIP family
SC11/12/13 with widely available native
development tools, applications, and system
software

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 9
3 Block Diagram
Figure 3-1: Block Diagram
SDRAM
FLASH
RX, TX
10/100 Ethernet
MII Interface 1
PIO24:0
PIO31:26
PLL
XIN, XOUT,
CPUCLK, PLLBYP
LED 3:0
Reset
Generator,
Watchdog
PHY
Ethernet MAC 1:0
System Interface
ARDY
Asynch.
Serial
Ports
TXD 3,2,1,0
RXD 3,2,1,0
RTS 3,2,1,0
CTS 3,2,1,0
DMA
Controller
PIO Unit
Timer
Controller
TMRIN 1:0
TMROUT 1:0
Interrupt
Controller
INT 1,3,5#
PFI
Chip-
Select Unit
USB
CAN
Controller
I²C
Controller
SPI
Controller
RSTIN, RSTOUT
USBP, USBN
CANTXD 1:0
CANRXD 1:0
I2CCLK, I2CDTA
PCS7:0, MCS0
UCSOUT#, FLSSEL
SDI, SDO, SCK,
SLVSEL
WR#
WRL#
RD#
WRH#
D15:0
A22:1
UCSIN#
DRQ 3:0

IPC@CHIP SC123/SC143
Hardware Manual V1.06 [18.02.2010]
©2000-2008 BECK IPC GmbH Page 10
4 Pin Description
4.1 Pin Configuration
Figure 4-1: Ball Grid Array Looking through Top of Package
DNC Do Not Connect !