Freescale Semiconductor MPC8272ADS User manual

MPC8272ADSUG
3/2004
Rev. 0.1
MPC8272ADS
User Guid
e
This datasheet has been downloaded fromhttp://www.digchip.com at this page

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Contents
Section
Number Title Page Number
Contents ii
Contents
Paragraph
Number Title Page Number
Contents
About This Book
Chapter 1
Overview
1.1 MPC8272ADS Specifications ............................................................................. 1-1
1.2 MPC8272ADS Features ...................................................................................... 1-2
Chapter 2
Hardware Preparation and Installation
2.1 Unpacking Instructions........................................................................................ 2-1
2.2 Hardware Preparation .......................................................................................... 2-1
2.2.1 Setting the VDDL Supply Voltage Level........................................................... 2-3
2.2.2 Setting MODCK(1:3) for PLLs Multiplication Factor—SW5 (#6–#8) .......... 2-3
2.2.3 Setting Hard Reset Configuration Source—JP9.............................................. 2-4
2.2.4 Setting Boot Source......................................................................................... 2-5
2.2.5 Setting MODCKH(0:3) for PLL Multiplication Factors................................. 2-6
2.2.6 Setting PCI_ARBITER for PCI Mode-Enabled.............................................. 2-6
2.2.7 Setting PCI_DLL for PCI Mode-Enabled ....................................................... 2-6
2.2.8 Clock-In Source Selection ............................................................................... 2-7
2.2.9 FCC1 Ethernet Port Mode—MII/RMII...........................................................2-7
2.2.10 FCC2 Ethernet Port Mode—MII/RMII...........................................................2-8
2.2.11 USB Speed Selection....................................................................................... 2-8
2.2.12 USB Mode Selection ....................................................................................... 2-8
2.2.13 COP/JTAG Connection.................................................................................... 2-9
2.2.14 Forced Parallel Port Connection...................................................................... 2-9
2.2.15 Power On/Off Switch....................................................................................... 2-9
Chapter 3
Installation Instructions

Contents
Paragraph
Number Title Page Number
MPC8272ADS User Guide
3.1 Installation Instructions........................................................................................ 3-1
3.1.1 Host-Controlled Operation .............................................................................. 3-1
3.1.2 Stand Alone Operation..................................................................................... 3-2
3.1.3 COP/JTAG Connector—P21...........................................................................3-3
3.1.4 Terminal to MPC8272ADS RS-232 Connection.............................................3-3
3.1.5 10/100-Base-T Ethernet Ports Connection......................................................3-4
3.1.6 Memory Installation......................................................................................... 3-4
3.1.6.1 Flash Memory SIMM Installation............................................................... 3-4
Chapter 4
Operating Instructions
4.1 Controls and Indicators........................................................................................4-1
4.1.1 Power-On RESET Switch—SW3.................................................................... 4-1
4.1.2 ABORT Switch—SW6.................................................................................... 4-1
4.1.3 Soft Reset Switch—SW7................................................................................. 4-1
4.1.4 Hard Reset Switches—SW6 & SW7...............................................................4-1
4.1.5 Reset Configuration Switch—SW2.................................................................4-2
4.1.6 Software Options Switch—SW1.....................................................................4-2
4.1.7 3IDDL Measurement—JP1 ............................................................................. 4-2
4.1.8 Thermal Sense Connector—JP7...................................................................... 4-2
4.1.9 IDDH Measurement—JP14............................................................................. 4-3
4.1.10 VPP Source Selector—JP4............................................................................... 4-3
4.1.11 GND Bridges ................................................................................................... 4-4
4.1.12 Power O.K. Indicator—LD13.......................................................................... 4-4
4.1.13 12V Indicator—LD14...................................................................................... 4-4
4.1.14 UTOPIA Multi PHY Indicator—LD28........................................................... 4-4
4.1.15 5-V Indicator—LD15 ...................................................................................... 4-4
4.1.16 3.3-V Indicator—LD16 ................................................................................... 4-4
4.1.17 USB Power Indicator—LD5............................................................................ 4-4
4.1.18 -12V Indicator—LD17 .................................................................................... 4-4
4.1.19 RUN Indicator—LD18 .................................................................................... 4-5
4.1.20 ATM ON Indicator—LD19 ............................................................................. 4-5
4.1.21 Fast Ethernet Port 1 Enabled—LD20.............................................................. 4-5
4.1.22 Fast Ethernet Port 2 Enabled—LD22.............................................................. 4-5
4.1.23 RS232 Port 1 ON—LD23................................................................................ 4-5
4.1.24 Fast Ethernet Port 1 Full Duplex Indicator—LD1........................................... 4-5
4.1.25 RS232 Port 2 ON—LD24................................................................................ 4-5
4.1.26 Fast Ethernet Port 1 100Base-Tx Indicator—LD2..........................................4-6
4.1.27 Ethernet Port 1 Tx/Rx Indicator—LD3........................................................... 4-6
4.1.28 General Purpose Led 2 Indicator—LD26........................................................4-6
4.1.29 Ethernet Port 1 LINK Indicator—LD4............................................................ 4-6

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Contents v
4.1.30 Fast Ethernet Port 2 Full Duplex Indicator—LD6........................................... 4-6
4.1.31 General Purpose Led 1 Indicator—LD25........................................................4-6
4.1.32 Fast Ethernet Port 2 100Base-Tx Indicator—LD7..........................................4-6
4.1.33 USB Enabled Indicator—LD21.......................................................................4-6
4.1.34 Ethernet Port 2 LINK Indicator—LD9............................................................ 4-7
4.1.35 Ethernet Port 2 Tx/Rx Indicator—LD8........................................................... 4-7
4.1.36 VDDL Indication—LD27 ................................................................................. 4-7
4.1.37 Parallel Port connection—LD10...................................................................... 4-7
4.1.38 External Debugger Connection Indicator—LD11........................................... 4-7
Chapter 5
Module Design
5.1 Reset and Reset Configuration ............................................................................ 5-1
5.1.1 Power-On Reset ............................................................................................... 5-1
5.1.2 Power-On Reset Configuration........................................................................ 5-1
5.1.3 Hard Reset........................................................................................................ 5-2
5.1.3.1 COP/JTAG Port Hard Reset ........................................................................5-2
5.1.3.2 Manual Hard Reset ...................................................................................... 5-3
5.1.3.3 Internal Sources Hard Reset ........................................................................ 5-3
5.1.3.4 Hard Reset Configuration............................................................................ 5-3
5.1.4 Soft Reset......................................................................................................... 5-7
5.1.4.1 COP/JTAG Port Soft Reset.......................................................................... 5-8
5.1.4.2 Manual Soft Reset........................................................................................ 5-8
5.1.4.3 Internal Sources Soft Reset.......................................................................... 5-8
5.1.5 PCI Bus Reset..................................................................................................5-8
5.1.6 Local Interrupter .............................................................................................. 5-9
5.1.6.1 ABORT Interrupt......................................................................................... 5-9
5.1.6.2 ATM UNI Interrupt......................................................................................5-9
5.1.7 Fast Ethernet PHY Interrupt............................................................................5-9
5.1.8 PCI Interrupt.................................................................................................... 5-9
5.2 Clock Generator................................................................................................. 5-13
5.2.1 MPC8272 Clock ............................................................................................ 5-13
5.2.2 PCI Clock....................................................................................................... 5-13
5.3 Bus Configuration.............................................................................................. 5-14
5.3.1 Single PowerQUICC II Mode........................................................................ 5-14
5.4 Buffering............................................................................................................ 5-14
5.5 Chip-Select Generator........................................................................................ 5-15
5.6 Synchronous DRAM (60X Bus)........................................................................5-15
5.6.1 SDRAM Programming .................................................................................. 5-16
5.6.2 SDRAM Refresh............................................................................................ 5-17
5.7 Flash Memory SIMM ........................................................................................5-17

Contents
MPC8272ADS User Guide
5.7.1 Flash Programming Voltage........................................................................... 5-19
5.8 E2PROM Memory............................................................................................. 5-19
5.9 PCI Bus.............................................................................................................. 5-20
5.10 Communication Ports ........................................................................................ 5-22
5.10.1 ATM Port ....................................................................................................... 5-22
5.10.2 100/10 Base T Ports.......................................................................................5-23
5.10.2.1 DM9161 Control........................................................................................ 5-23
5.10.3 RS232 Ports ................................................................................................... 5-24
5.10.3.1 RS-232 Ports’ Signal Description.............................................................. 5-24
5.10.4 USB Port........................................................................................................ 5-25
5.10.5 PC Parallel Port.............................................................................................. 5-25
5.11 Board Control and Status Register - BCSR.......................................................5-25
5.11.1 BCSR0 Board Control—Status Register 0.................................................... 5-27
5.11.2 BCSR1 Board Control—Status Register 1.................................................... 5-27
5.11.3 BCSR2 Board Control—Status Register 2.................................................... 5-28
5.11.4 BCSR3 Board Control - Status Register 3..................................................... 5-31
5.11.5 BCSR4 Board Control—Status Register 4.................................................... 5-32
5.11.6 BCSR5 and BCSR7 Board Control—Status Register 3 and 5 ...................... 5-33
5.12 COP/JTAG Port ................................................................................................. 5-33
Chapter 6
Memory Map
6.1 Overview.............................................................................................................. 6-1
6.2 PowerQUICC II Register Programming.............................................................. 6-5
6.2.1 System Initialization ........................................................................................ 6-6
6.2.2 Memory Controller Register Programming..................................................... 6-7
Chapter 7
Physical Properties
7.1 Power Supply....................................................................................................... 7-1
7.1.1 5-V Rail............................................................................................................ 7-3
7.1.2 3.3-V Rail......................................................................................................... 7-3
7.1.3 5-V Standby Rail ............................................................................................. 7-3
7.1.4 VDDH Rail........................................................................................................ 7-3
7.1.4.1 VDDL Bus..................................................................................................... 7-3
7.1.4.2 12-V Rail ..................................................................................................... 7-4
7.1.4.3 -12-V Rail.................................................................................................... 7-4
7.2 Connectors ........................................................................................................... 7-4
7.2.1 ATX Power Connector..................................................................................... 7-4
7.2.2 Fast Ethernet Port Connectors .........................................................................7-4

Contents
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Contents vi
7.2.3 ATM 155 Port Connection...............................................................................7-5
7.2.4 RS232 Port Connector..................................................................................... 7-5
7.2.5 CPM Expansion Connector ............................................................................. 7-5
7.2.6 COP/JTAG Port Connector.............................................................................. 7-5
7.2.7 Logic Analyzer Connectors............................................................................. 7-5
7.2.8 Mach’s In System Programming (ISP) Connector .......................................... 7-5
7.2.9 PCI Connectors................................................................................................ 7-5
7.2.10 System Expansion Connector..........................................................................7-6
7.2.11 USB Connector................................................................................................ 7-6
7.2.12 Parallel Port Connector.................................................................................... 7-6
7.3 PCB Layout.......................................................................................................... 7-6
Chapter 8
Support
8.1 Interconnect Signals............................................................................................. 8-1
8.1.1 P13—RS232 Ports 1 and 2 Connectors........................................................... 8-1
8.1.2 P10 and P23 100/10 Base-T Ethernet Port Connector..................................... 8-2
8.1.3 P21—COP/JTAG Connector...........................................................................8-2
8.1.4 P1—CPM Expansion Connector.....................................................................8-4
8.1.5 P9, P11, P14, P22, P17, P5, P20, P18, P15, P24,P12
Logic Analyzer MICTOR Connectors....................................................... 8-13
8.1.6 P26, P28, P29—PCI Connectors ................................................................... 8-13
8.1.7 P31 - ATX Power Supply Connector............................................................. 8-15
8.1.8 P3,P4,P25—Mach/Lattice ISP Connector..................................................... 8-16
8.1.9 P2—System Expansion Connector................................................................8-17
8.1.10 P16, P19—USB Connectors.......................................................................... 8-22
8.2 Programmable Logic Equations......................................................................... 8-23
8.2.1 U3—BCSR Code........................................................................................... 8-23
8.2.2 U41—Power switch debounce....................................................................... 8-53
Appendix A
Revision History
Index

Contents
Paragraph
Number Title Page Number
MPC8272ADS User Guide

Figures
Figure
Number Title Page Number
Figures ix
Figures
1-1 MPC8272ADS Block Diagram................................................................................... 1-4
2-1 MPC8272ADS Top Side Part Location Diagram ....................................................... 2-2
2-2 VDDL Trimmer—RP1 ................................................................................................. 2-3
2-3 SW5 Description......................................................................................................... 2-4
2-4 Hard Reset Configuration Source Selection—JP9...................................................... 2-5
2-5 SW2 Description......................................................................................................... 2-6
2-6 Clock Source Selection............................................................................................... 2-7
2-7 FCC1 Ethernet Mode Selection ..................................................................................2-7
2-8 FCC2 Ethernet Mode Selection ..................................................................................2-8
2-9 USB Mode Selection................................................................................................... 2-9
2-10 Forced Parallel Port Connection ................................................................................. 2-9
3-1 Host-Controlled Operation Scheme—Command Converter ...................................... 3-1
3-2 Host Controlled Operation Scheme—Parallel Port .................................................... 3-2
3-3 Stand Alone Configuration ......................................................................................... 3-2
3-4 P21—COP/JTAG Port Connector............................................................................... 3-3
3-5 P1A/P1B—RS232 Serial Port Connector................................................................... 3-3
3-6 Flash Memory SIMM Insertion ..................................................................................3-4
4-1 SW1 Description......................................................................................................... 4-2
4-2 JP7 Therm Connector.................................................................................................. 4-3
4-3 JP13 VPP Source Selection ......................................................................................... 4-3
5-1 PCI Host Configuration Registers............................................................................... 5-7
5-2 PCI Interrupt Routing Scheme.................................................................................. 5-10
5-3 Main Clock Generator Scheme................................................................................. 5-13
5-4 PCI Clock Generator Scheme ................................................................................... 5-14
5-5 60x SDRAM Connection Scheme ............................................................................5-16
5-6 FLASH SIMM Connection Scheme.........................................................................5-18
5-7 E2PROM Connection Scheme..................................................................................5-20
5-8 PCI Bus Scheme........................................................................................................ 5-21
5-9 RS232 Serial Ports Connector................................................................................... 5-24
5-10 Debug Station Connection Schemes......................................................................... 5-33
5-11 COP/JTAG Port Connector....................................................................................... 5-34
7-1 MPC8272ADS Power Scheme ................................................................................... 7-2

Figures
MPC8272ADS User Guide

Tables
Table
Number Title Page Number
Tables xi
Tables
i Acronyms and Abbreviated Terms ............................................................................ xvii
1-1 MPC8272ADS specifications ..................................................................................... 1-1
2-1 MODCK(1:3) Encoding.............................................................................................. 2-4
5-1 BCSR/FLASH Hard Reset Configuration Word......................................................... 5-4
5-2 E2PROM Hard Reset Configuration Word.................................................................5-6
5-3 PCI Interrupt Register Description ...........................................................................5-10
5-4 PCI Interrupt Mask Register Description.................................................................. 5-12
5-5 MPC8272ADS Chip Select Assignments................................................................. 5-15
5-6 100 MHz SDRAM Mode Register Programming..................................................... 5-17
5-7 BCSR0 Description................................................................................................... 5-27
5-8 BCSR1 Description................................................................................................... 5-27
5-9 BCSR2 Description................................................................................................... 5-28
5-10 FLASH Presence Detect (7:5) Encoding .................................................................. 5-29
5-11 FLASH Presence Detect (4:1) Encoding .................................................................. 5-30
5-12 EXTOOLI(0:3) Assignment...................................................................................... 5-30
5-13 PowerQUICC II Board Version Encoding................................................................5-30
5-14 PowerQUICC II Board Revision Encoding.............................................................. 5-30
5-15 External Tool Revision Encoding ............................................................................. 5-31
5-16 BCSR3 Description................................................................................................... 5-31
5-18 PCI Board Present Signal Definitions....................................................................... 5-32
5-17 BCSR4 Description................................................................................................... 5-32
5-19 BCSR5 to BCSR7 Description ................................................................................. 5-33
5-20 COP/JTAG Port Signals Description........................................................................ 5-34
6-1 MPC8272ADS Memory Map—Flash (or BCSR) as Boot Device.............................6-1
6-2 MPC8272ADS Memory Map—E2PROM as Boot Device........................................ 6-3
6-3 BCSR/Flash Power On Reset Configuration..............................................................6-6
6-4 E2PROM Power On Reset Configuration ..................................................................6-6
6-5 SIU Register Programming......................................................................................... 6-7
6-6 Memory Controller Initialization For 100MHz—Flash as Boot Device.................... 6-7
6-7 Memory Controller Initialization For 100MHz—E2PROM as Boot Device............. 6-8
6-8 Memory Controller Initialization For 100MHz.......................................................... 6-9
7-1 Expansion Connectors Maximum Current Consumption........................................... 7-2
7-2 Maximum Power Consumption Per Add-In Card....................................................... 7-2
8-1 P13 Connector............................................................................................................. 8-1
8-2 P10,P23 100/10 Base-T Ethernet Connector .............................................................. 8-2

Tables
Table
Number Title Page Number
MPC8272ADS User Guide
8-3 P16—COP/JTAG Connector ...................................................................................... 8-2
8-4 P1—CPM Expansion Connector ................................................................................ 8-4
8-5 P26, P28, P29—PCI Connectors............................................................................... 8-13
8-6 P31—ATX Power Supply Connector .......................................................................8-15
8-7 P3—Lattice ISP Connector....................................................................................... 8-16
8-8 P2—System Expansion Connector........................................................................... 8-17
8-9 P16, P19—USB Connectors ..................................................................................... 8-22

About This Book
About This Book
The MPC8272 is a versatile communications processor that integrates on one chip a
high-performance PowerPC™ RISC microprocessor, a very flexible system integration
unit, encryption hardware, and many communications peripheral controllers that can be
used in a variety of applications, particularly in communications and networking systems.
The primary objective of this manual is to describe the functionality of the MPC8272ADS
board. It contains operational, functional and general information about the
MPC8272ADS. This board is meant to serve as a platform for software and hardware
development for the MPC8272 processor in a TEPBGA package (516 Pins in Hip7). The
high-performance MPC8272 PowerQUICC II™ processor family contains a PowerPC™
core and addresses the needs of a wide variety of networking and communications
applications.
Using its on-board resources and a debugger, a developer can download code, run it, set
breakpoints, display memory and registers and connect proprietary hardware using the
expansion connectors, to be incorporated into a desired system with the MPC8272
processor.
This board could also be used as a demonstration tool (for example, application software
may be programmed either on or off-board into its Flash memory and run in exhibitions).
Although this book describes aspects regarding the PowerPC architecture that are critical
for understanding the MPC8272 core, it does not contain a complete description of the
architecture. Where additional information might help the reader, references are made to
Programming Environments Manual for 32-Bit Implementation of the PowerPC
Architecture, REV 2. Refer to “Architecture Documentation” for ordering information.
The information is subject to change without notice, as described in the disclaimers on the
title page of this book. As with any technical documentation, it is the reader’s responsibility
to use the most recent version of the documentation. Before using this manual, determine
whether it is the latest revision and the existence of errata or addenda. To locate any
published errata or updates for this document, refer to the worldwide web at
www.motorola.com/semiconductors.

MPC8272ADS User Guide
Audience
This manual is intended for system software and hardware developers and applications
programmers who want to develop products using the MPC8272 integrated processor.
Readers should understand the following topics:
• Computer networking
• Basic principles of RISC processing
• Details of the PowerPC architecture
Organization
The following list describes the major sections of this manual:
• Chapter 1, “Overview,” provides a high-level description of the MPC8272ADS,
describing general operation, basic features, and a block diagram.
• Chapter 2, “Hardware Preparation and Installation,” provides unpacking
instructions and information about setting various modes, switches, and other
configuration on the MPC8272ADS.
• Chapter 3, “Installation Instructions,” provides information about host-controlled
and stand alone operation, memory installation, and connection setup.
• Chapter 4, “Operating Instructions,” provides information about controls and
indicators for the MPC8272ADS.
• Chapter 5, “Module Design,” provides information about MPC8272ADS reset and
reset configuration, the clock generator,bus configuration, buffering, the chip-select
generator, synchronous DRAM, Flash memory, and E2PROM memory.
• Chapter 6, “Memory Map,” discusses PowerQUICC II register programming.
• Chapter 7, “Physical Properties,” provides information about the power supply,
connectors, and PCB layout.
• Chapter 8, “Support,” provides information about interconnect signals and
programmable logic equations.
• Appendix A, “Revision History,” provides information about the revision history of
this document.
The book also contains an index.
Suggested Reading
This section lists additional reading that provides background for the information in this
manual as well as general information about the PowerPC architecture.

About This Book
MPC8272 Documentation
Supporting documentation for the MPC8272 can be accessed through the world-wide web
at www.motorola.com/semiconductors. This documentation includes technical
specifications, reference materials, and detailed applications notes.
Architecture Documentation
Architecture documentation is organized in the following types of documents:
• Manuals—These books provide details about individual implementations of the
PowerPC architecture and are intended to be used with the Programming
Environments Manual. These include the G2 Core Reference Manual (Motorola
order #: G2CORERM).
• Programming environments manuals—These books provide information about
resources defined by the PowerPC architecture that are common to processors that
implement the PowerPC architecture. The two versions include one that describes
the functionality of the combined 32- and 64-bit architecture models and one that
describes only the 32-bit model. The MPC8280 adheres to the 32-bit architecture
definition.
—Programming Environments for 32-Bit Implementations of the PowerPC
Architecture (Motorola order #: MPCFPE32B)
•The Programmer’s Pocket Reference Guide for the PowerPC Architecture:
MPCPRGREF/D—This guide provides an overview of registers, instructions, and
exceptions for 32-bit implementations.
• Application notes—These short documents contain useful information about
specific design issues useful to programmers and engineers working with
Motorola’s processors.
For a current list of documentation, refer to www.motorola.com/semiconductors.
Related Documentation
Motorola documentation is available from the sources listed on the back cover of this
manual. The document order numbers are included in parentheses for ease in ordering:
•Programming Environments Manual for 32-Bit Implementations of the PowerPC
Architecture, which describes resources defined by the PowerPC architecture.
• The G2 Core Reference Manual, which describes features for the embedded G2
processor core, a derivative of the original MPC603e PowerPC microprocessor
design.
• The Tsi107™ PowerPC Host Bridge User Manual, published by Tundra
Semiconductor Corporation (Tundra). See the Tundra website at www.tundra.com
for more information.

MPC8272ADS User Guide
• User’s manuals—Thesebooks providedetailsaboutindividualimplementationsand
are intended for use with the Programming Environments Manual.
• Addenda/errata to user’s manuals—Because some processors have follow-on parts,
an addendum describes the additional features and functionality changes. These
addenda are intended for use with the corresponding user’s manuals.
• Hardware specifications—Hardware specifications provide specific data about bus
timing, signal behavior, and AC, DC, and thermal characteristics, as well as other
design considerations. Separate hardware specifications are provided for each part
described in this book.
• Technical summaries—Each device has a technical summary that provides an
overview of its features. This document is roughly equivalent to the overview
(Chapter 1) of a user’s manual for implementation.
•The Programmer’s Reference Guide for the PowerPC Architecture—This concise
reference includes the register summary, memory control model, exception vectors,
and the PowerPC instruction set.
•The Programmer’s Pocket Reference Guide for the PowerPC Architecture—This
foldout card provides an overview of PowerPC registers, instructions, and
exceptions for 32-bit implementations.
• Application notes—These useful short documents address specific design issues for
programmers and engineers who work with Motorola processors.
Additional literature is published as new processors become available. For a current list of
documentation, refer to http://www.motorola.com/semiconductors.
Conventions
This document uses the following notational conventions:
cleared/set The words ‘set’ and ‘cleared’ are reserved for use with bits and
fields, but not signals. A bit or field is cleared when it contains the
value zero. A bit is set when it contains the value one. However, a
field can be set to a value that contains zeros and ones.
asserted/negated The words ‘asserted’ and ‘negated’ are reserved for use with signals
and not bits.
mnemonics Instruction mnemonics are shown in lowercase bold.
italics Italics indicate variable command parameters, for example, bcctrx.
Book titles in text are set in italics.
Internal signals are set in italics, for example, qual BG.
0x0 Prefix to denote hexadecimal number
0b0 Prefix to denote binary number

About This Book
rA, rB Instruction syntax that identifies a source GPR
rD Instruction syntax that identifies a destination GPR
frA, frB, frC Instruction syntax that identifies a source FPR
frD Instruction syntax that identifies a destination FPR
REG[FIELD] Abbreviations for registers are shown in uppercase text. Specific
bits, fields, or ranges appear in brackets. For example, MSR[LE]
refers to the little-endian mode enable bit in the machine state
register.
x In some contexts, such as signal encodings, an unitalicized x
indicates a 'don’t care' logic.
xAn italicized x indicates an alphanumeric variable.
nAn italicized n indicates an numeric variable.
¬ NOT logical operator
& AND logical operator
| OR logical operator
Indicates reserved bits or bit fields in a register. Although these bits
can be written to as ones or zeros, they are always read as zeros.
Acronyms and Abbreviations
Table i contains acronyms and abbreviations that appear in this document.
Table i. Acronyms and Abbreviated Terms
MPC8272ADS ADS board For MPC8272 processor
PQ2 PowerQUICC II
MPC8275 PowerQUICC II Hip7 in TEPBGA package
VOYAGER MPC8260 - PowerQUICC 2
PPC PowerPC
PCI Peripheral components interconnect
USB Universal serial bus
CPM Communication processor module
SDRAM Synchronous dynamic random access memory
VADS Voyager application development system
Kbyte 1024 bytes
LSB Least significant byte
lsb Least significant bit
Mbyte 1048576 bytes
0 0 0 0

MPC8272ADS User Guide
DIMM Dual in-line memory module
SIMM Single in-line memory module
TBD To be defined
UPM User programmable machine
EVB Evaluation board
GPCM General purpose chip-select machine
GPL General purpose line
BCSR Board control and status register
FLASH Non volatile reprogrammable memory.
ZIF Zero input force
BGA Ball grid array
ADI Application development interface.
COP Common on-chip processor
SAR Segmentation And reassembly
UTOPIA Universal test & operations interface for ATM
Table i. Acronyms and Abbreviated Terms (continued)
MPC8272ADS ADS board For MPC8272 processor

Chapter 1. Overview
Chapter 1
Overview
The primary objective of this manual is to describe the functionality of the MPC8272ADS
board. It contains operational, functional and general information about the
MPC8272ADS. This board is meant to serve as a platform for software and hardware
development for the MPC8272 processor in a TEPBGA package (516 Pins in Hip7). The
high-performance MPC8272 PowerQUICC II™ processor family contains a PowerPC™
core and addresses the needs of a wide variety of networking and communications
applications.
Using its on-board resources and a debugger, a developer can download code, run it, set
breakpoints, display memory and registers and connect proprietary hardware using the
expansion connectors, to be incorporated into a desired system with the MPC8272
processor.
This board could also be used as a demonstration tool (for example, application software
may be programmed either on- or off-board into its Flash memory and run in exhibitions).
1.1 MPC8272ADS Specifications
Table 1-1 shows the MPC8272ADS specifications.
Table 1-1. MPC8272ADS specifications
CHARACTERISTICS SPECIFICATIONS
Power requirements (no other boards attached) +5Vdc @ TBD A (Typ.), TBD A (Max.)
+3.3Vdc @ TBD A (Typ.), TBD A (Max.)
+12Vdc - @TBD A Max.
-12Vdc - @TBD A Max.
Microprocessor MPC8272 running @ up to 100 MHz bus clock frequency.
Addressing
Total address range on PPC bus:
Total address range on Local bus:
Flash Memory SIMM (PPC bus)
Synchronous Dynamic RAM DIMM (PPC bus)
4 GBytes (32 address lines)
256 KBytes External (18 address lines)
4 GBytes Internal (32 address lines internal decoding)
8 MByte, 32 bits wide expandable to 32 MBytes
64 MByte, 64 bits wide

MPC8272ADS User Guide
MPC8272ADS Features
1.2 MPC8272ADS Features
This section summarizes the features of the MPC8272ADS. Major features are the
following:
• Supports MPC8272 (Hip7) processor
• 64-bit PowerQUICC II Communication Processor, running at up to 100MHz
external bus frequency
• 64-MByte synchronous DRAM (soldered on-board), residing on 60X bus (PBI
mode), controlled by SDRAM machine. Hard reset is applied by depressing BOTH
Soft Reset & ABORT buttons.
• 8-MByte, 80-pin Flash SIMM, buffered from 60X bus. Supports up to 32 MBytes,
controlled by GPCM, 5V/12V Programmable, with automatic Flash SIMM
identification, using BCSR. Supports both On and OFF SIMM Flash reset.
• 5V/12V VPP (in-circuit programming voltage) for Flash SIMM—jumper selectable
• 64 KBytes E2PROM, buffered from the 60x bus and controlled by the GPCM
• Board control and status register—BCSR, controlling boards’ operation
• On-board COP/JTAG connector
• On-board logic to support direct connection to standard parallel port (EPP/SPP
modes) in desktop PC for debug purposes using MetroWerks CodeWarrior tools
• Power-on reset option using JTAG
• Programmable power-on reset and hard-reset configuration using E2PROM or Flash
memory for the PowerQUICC II core
• PCI local bus is PCI Standard 2.2-compliant
• 3 PCI slots are available to host up to three masters/targets cards at 3.3 V only.
Arbitration is supported by the on-chip arbiter.
• PCI bus supports 25–66 MHz at 3.3 V devices (determined by the user).
• Simple generic interrupt controller to handle the PCI interrupts (4 in each PCI slot)
Operating temperature 0OC - 70OC (room temperature)
Storage temperature -25OC to 85OC
Relative humidity 5% to 90% (non-condensing)
Dimensions:
Length
Width
Thickness
12" (305 mm)
9" (229 mm)
0.063" (1.6 mm)
Table 1-1. MPC8272ADS specifications (continued)
CHARACTERISTICS SPECIFICATIONS