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EG59 uses MT6139 as RF transceiver. MT6139 is a highly-integrated
RF transceiver IC for GSM850/GSM900/DCS1800 bands. It includes 4
LNAs, 2 RF quadrature mixers, a channel filter, a programmable-gain
amplifier for the receiver, a high-precision I/Q modulator for the
transmitter, a 26MHz VCXO reference, a fractional-N frequency
synthesizer with a fully-integrated LC-tank VCO and 3 built-in LDO
regulators for VCO, VCXO and SDM. Its functional block diagram is
shown as below.
The MT6139 includes a Phase-Locked Loop (PLL)-based fractional-N
frequency synthesizer with a fully-integrated LC-tank VCO. It provides
the Local Oscillator (LO) signals for both receiver and transmitter. In
order to reduce the inherent spurs caused by the fractional-N
synthesizer, a 3rd-order sigma-delta modulator with a dithering function
is used to generate the division number N for the prescaler. The
prescaler is composed of a high-frequency divided-by-2 circuit and a
multi-modulus frequency divider with the programmable division number
ranging from 32 to 127. A conventional digital-type Phase-Frequency
Detector (PFD) with a charge pump is used for phase comparison.
4.1.2.2.3. Transmitting unit
MT6139 transmitter adopts the direct-conversion architecture with
higher integration level and simpler frequency plan. It consists of
BaseBand (BB) I/Q filters, I/Q modulators, frequency dividers, output
buffers and a bias-core circuit. BB I/Q differential signals from the BB
chip are fed into the one-pole RC low-pass filter first for better out-of-
the-band noise performance. The 3-dB frequency corner is allocated at
700kHz. Two double balanced mixers (modulators), one for I+/I- and
another for Q+/A- signals, are responsible for translating the filtered BB
I/Q signals to the transmitting frequencies. LO signals are provided by
the divided-by-2 (DCS1800) and divided-by-4 (GSM850/GSM900)
dividers. The output buffers amplify the modulator output signals to an
adequate level to fulfill P-in requirement of Power Amplifier (PA). At last,
the on-chip balun is used to convert the differential signals to single-
ended output signal.
4.1.2.2.4. Receiving unit
The receiver section includes Quad-Band Low-Noise Amplifiers (LNAs),
RF quadrature mixers, channel filters, Programmable-Gain Amplifiers
(PGAs), and on-chip automatic DC-offset correction loops. The
differential inputs are matched to SAW filters using LC networks and the
H/L gain step is 36dB. Following the LNAs are two quadrature RF
mixers that down-convert the RF signal to IF I/Q signals. The LO signals
