IBM 709 Configuration guide


~~
General
Information
Manual
iii
709·7090
Data
Processing System

MINOR
REVISION
(August, 1960)
This
edition,
Form
D22-6508-2, is a
minor
revISIon of
the
pre-
ceding
edition
but
does
not
obsolete
Form
D22-6508-1.
The
principal
change
in
this
edition
is
the
addition
of
a section
on
1401
operation
on
page 31.
© 1959, 1960 by Internatio.nal Business Machines Corporation

INTRODUCTION
Binary
Notation
Octal
Notation
Magnetic
Cores
CENTRAL
PROCESSING
UNIT
Stored
Program
.
Assembly Programs .
Computer
Operations
Information
Paths
Indexing
and
Indirect
Addressing
Sample
Problems
.
Operator's
Consoles.
.
INPUT-OUTPUT
COMPONENTS
•
Magnetic
Tape
Storage.
Auxiliary
Equipment
.
Data
Synchronizer
IBM
755
Tape
Control.
Multiplexor
Data
Channel
. .
External
Signal
Direct
Data
Feature
.
Magnetic
Drum
Storage
Punched
Cards
Card
Reader
Card
Punch
..
Printer
Cathode
Ray
Tube
Equipment
SHARE
Organization
Programming
System
FORTRAN
AUTOMATIC
CODING
SYSTEM.
APPENDIX
Contents
5
6
6
7
10
10
13
15
16
18
20
22
24
24
30
31
35
35
36
37
37
37
39
40
41
41
42
44
44
44
46
47

IBM
7090
Data
Processing System

IBM
709·7090
Data Processing System
Data
processing
sy~tems
are
finding new
application
in
virtually
every
phase
of
science, business,
and
in-
dustry.
Rapidly
expanding
scientific investigations in-
volve
many
complex
calculations.
The
vast
amount
of
data
constantly
being
used
in
aircraft
industries,
government
agencies,
and
business establishments
of
all kinds
demand
machines to
compute,
select,
and
correlate
data
at
electronic speeds.
Figure I shows
the
kind
of
problem
that
computers
are solving for scientists today.
Many
similar
prob-
lems
are
encountered
and
solved
in
the
scientific field;
however,
the
computer
is
adaptable
to business
appli-
cations as well.
The
computer
can
be,
and
is,
used
for payroll,
material
inventory,
or
any
of
a
great
num-
ber
of
other
business
problems
requiring
prompt,
accurate results.
In
the
sample
problem,
the
computer
calculates
the
density
and
velocity
of
air
at
each
of
the
mesh-points
shown.
From
these
data,
engineers
can
evaluate
the
lifting
power
and
drag
of
the
wing
section. By solv-
ing
a
number
of
these problems,
an
optimum
new
wing design is developed.
The
mathematical
formulas used are:
4.
p=
f (p)
Figure 1. Aircraft
Application
Equations
1,
2
and
3
are
replaced
by difference
equations
over
a
network
as
shown
in
the
figure.
This
difference system
and
equation
4
form
a set
of
simul-
taneous
non-linear
algebraic equations.
These
are
solved
on
the
computer
by
repeating
calculations,
called
an
iteration
method.
In
this
one
typical prob-
lem,
there
are
800 equations,
100
iterations, 80,000
operations
per
iteration,
and
8,000,000
operations
per
solution.
Figure 2 shows a comparison,
in
time, between
man-
ual
methods
of
solution
and
solution
by computers.
The
times
are
approximate.
This
comparison
shows
that
computers
of
today now have
the
ability
to solve
problems
that
cannot
be solved
in
a lifetime
of
man-
ual
labor.
One
of
the
first things to be considered
in
a com-
puter
system is
an
understanding
of
the
functions
of
its various components. A simplified
computer
sys-
tem consists
of
three
main
units
as
shown
in
Figure
3.
In
a typical
computer
system, several types
of
input-
output
devices
are
needed.
These
may be
units
such
~
r\
\ Pencil and paper
{
15
years
Desk
calculator
80 weeks
IBM
701
2 minutes
IBM
704
30 seconds
IBM
709
25 seconds
IBM
7090
5 seconds
Figure
2.
Time
Comparison
of
Computation
Methods (Approxi-
mate)
Introduction
5

Figure
3.
Main
Computer
Components
as
punched
card
readers, a device to
read
or
write
on
magnetic
or
paper
tape, a
telephone
or
teletype line,
punched
card
recorders,
and
printing
equipment.
An
input
component
is
any
device
capable
of
feed-
ing
information
into
a
computing
and
data
handling
unit,
usually called
the
central
processing
unit.
A storage
unit
must
also be
provided
to store
or
"remember"
all
input
data
and
instructions (also
called orders) to
the
computer.
These
instructions are
then
used
to tell
the
computer
how
the
processing
of
data
is
to be executed.
The
central
processing
unit
has
an
arithmetic
sec-
tion
to accomplish all
arithmetic
and
logical opera-
tions
and
a section to modify
or
change instructions
to
adapt
the
processing
to
variations
within
the
es-
tablished procedure. A
control
section is also a
part
of
the
central
processing
unit
and
directs
the
com-
puter
in
its
operation
by
making
logical decisions.
An
example
of
one
of
these decisions
would
be a test to
determine
if
a
number
is positive
or
negative. As a
result
of this test,
the
computer
can
take
a different
processing course for each alternative. Simple tests
may be
combined
to
make
complex
logical decisions.
The
output
components
are
any devices
capable
of
recording
the
resultant
data
after
the
central
process-
ing
unit
has
operated
upon
it.
Binary
Notation
The
common
decimal
notation
of
the
commercial
and
scientific
world
is a
familiar
one.
This
notation
is so
familiar
that
its use is
hardly
questioned. However,
it
is possible
that,
for
some purposes,
other
number-
ing
systems
are
more
convenient.
What
numbering
system
to
use
is
entirely a
matter
of convenience. Decimal
notation
is
used
because
it
is
most
familiar
and
is
understood
by most people.
However,
had
our
primeval
ancestors developed
eight
fingers
instead
of
ten, we
would
probably
be
more
familiar
with
a
numbering
system based
on
eight,
rather
than
ten,
and
we
might
consequently
question
the
decimal system.
6
IBM
709-7090
The
decimal system,
with
its
ten
digits, is
learned
by most
people
early
in
their
training.
This
system
serves well for
counting
purposes.
Why
then
should
computers designed
to
assist
mathematicians,
engi-
neers
and
businessmen, be designed to use
the
binary
system
of
numbers?
The
reason
is
that
current
digital
computers
use
binary
circuits; therefore,
the
mathematics
of
com-
puters
is
binary
in
nature.
The
octal system
is
a
shorthand
method
of
writing
long
binary
numbers.
Octal
notation
is used
when
discussing
the
computer,
but
has
no
relation
to
the
internal
computer
circuits.
The
binary,
or
"base two" system, uses
the
two sym-
bols 0
and
1 to
represent
all
quantities.
Counting
starts
in
the
same
manner
as
in
the
decimal system
with
a 0
for
zero
and
then
a I for one.
At
two, how-
ever, there
are
no
more
symbols to be used.
It
is
therefore necessary to take
the
same step
at
two
in
the
binary
system
that
is
taken
at
ten
in
the
decimal
sys-
tem.
This
step is to place a I
in
the
next
position
to
the
left
and
start
again
with
a 0
in
the
original
position. A
binary
10
is
equivalent
in
this respect to
a 2
in
the
decimal system.
Counting
is
continued
in
an
analogous
manner
with
a carry to
the
next
higher
order
every
time
a two is reached
instead
of
every
time a
ten
is
reached.
Counting
in
the
binary
system
is
as
follows:
Binar) Decimal
Binary
Decimal
8 4 2 1
84
2 1
0 = 0 1 = 1
1 0 -2 1 1 -3
100
-4 1 0 1 -5
1 1 0 -6
11
1 = 7
1 0 o0 -8 1 0 o 1 -9
Octal
Notation
It
has
already
been
pointed
out
that
binary
numbers
require
about
three
times as
many
positions as deci-
mal
numbers
to express
the
equivalent
number.
This
is
not
a
problem
to
the
computer
itself,
but
in
talking
and
writing, these
binary
numbers
are bulky. A
long
string
of
ones
and
zeros
cannot
be effectively trans-
mitted
from
one
individual
to
another.
Some short-
hand
method
is necessary.
The
octal
number
system
fills this need. Because
of
its simple
relationship
to
binary,
numbers
can
be
converted from
one
system
to
another
by inspection.
The
base
of
the
octal system
is
8.
This
means
there
are
eight
symbols:
0,
1,
2,
3,
4, 5,
6,
and
7.
There
are
no
8's
or
9's.
The
important
relationship
is
that
three
binary
positions
are
equiva-
lent
to
one
octal position.
The
following
table
com-
bines
what
has
been
shown
concerning
decimal
and
binary
with
the
octal
numbers.

BINARY OCTAL
DECIMAL
0 0 0
1 1 1
10 2 2
11
3 3
100
4 4
101
5 5
110
6 6
III
7 7
At
this
point
a carry to
the
next
higher
position
of
the
number
is necessary, since all
eight
symbols
in
the
octal system have
been
used.
1000
1001
1010
1011
10
II
12
13
8
9
10
11
As
far
as
the
internal
circuitry
of
the
computer
is
con-
cerned,
it
only
understands
binary
ones
and
zeros.
The
octal system
is
used
to
provide
a
shorthand
method
of
reading
and
writing
binary
numbers
so
that
the
contents
of
a register,
when
shown
on
the
operator's
panel,
may
be
read
directly.
This
is
shown
in
Figure 4,
using
a 36-digit
binary
number.
Reg;
ster contents (b;nary)
Octal
value
Figure
4.
Binary
Representation
of Register
Contents
Magnetic
Cores
The
main
storage
medium
for
many
computers
is
the
magnetic
core.
Each
magnetic core is a
ring
or
doughnut
shaped
piece
of
ferromagnetic
material.
The
cores "remem-
ber"
information
indefinitely,
and
can
recall
it
in
a
few
millionths
of
a second.
When
a wire
is
inserted
through
the
hollow
center
of
a core (Figure
5),
an
electrical
current
passed
along
the
wire sets
up
a mag-
netic
field
around
the
wire.
This
field magnetizes
the
core.
When
the
current
is removed,
the
core
remains
magnetized.
1£
a
current
is
passed
along
the
wire
in
Core
Is
Set
Figure
5. Magnetic Core Action
the
opposite
direction,
the
magnetic
field set
up
around
the wire is reversed.
When
this occurs,
the
core
is
said to have
"flipped"
or
changed
its mag-
netic state. A "sense" wire
is
inserted
through
the
core
and,
when
the
core flips, a small electrical voltage
is sent along
the
sense wire.
This
voltage
may
then
be amplified
and
used
in
the
computer
(Figure
6).
Computer
Figure 6.
Flipping
of a Magnetic Core
As
with
the
magnetic core, all
computer
elements
are
able
to
represent
two states.
These
two
distinct
states
provide
the basis by
which
these elements
hold
information.
For
this reason,
the
elements
are
called
bi-stable elements.
For
example,
one
state
may
be
interpreted
as
the
digit
0;
the
other,
as
1.
Similarly,
the
elements may be used to represent:
plus
or
minus,
on
or
off,
yes
or
no,
and
so on. Several of these ele-
ments are shown
in
Figure
7.
The
IBM
709
and
7090
Data
Processing Systems use
high-speed core storage units.
Each
unit
is
divided
into
distinct sections called locations.
Each
location
is
uniquely
identified by a
number
assigned to it.
This
identifying
number
is
called
an
address because
just
as
a street address denotes
the
precise
location
of
a
particular
building
on
that
street, this
number
de-
liD
..
State
Figure
7.
Bi·stable
Computer
Elements
Introduction
7

Number 1500
Figure
8.
Core Storage
Unit
notes the location of a
particular
item
of
data
inside
the core storage
unit
called a
"word"
(Figure
8).
Each word is
further
subdivided
into
elements
called bits. Each
bit
has a value
of
either
a 0
or
a
1.
Thus.
the bits
(36
in
each word)
are
the basic units
of
information
in
the computer. Figure 8 also shows
S6
"planes"
or
"stories"
in
the core storage "building."
The
operation
of locating a word
in
core storage may
be compared to the
operation
of
an
elevator
in
an
office
building.
The
elevator picks
up
passengers from
each floor;
in
core storage,
one
bit
of
information is
read
or
stored from each plane.
In
actual computer
operation, all
36
bits are read, stored,
or
operated
upon
simultaneously, one from each plane.
As
previously stated, one word contains
36
bits
of
information. Core storage contains two types of
words:
1.
A word
upon
which arithmetic
or
logical oper-
ations are to be performed
is
called a data-word.
2.
A word
interpreted
by the
computer
as a code
to
"order
or
instruct"
it
to perform a
particular
operation
is
called an instruction-word.
8
IBM
709-7090
Figure 9. Instructions
and
Data
in
Core Storage
Both types of words are combinations of
36
zeros
and
ones.
An
instruction is able to "direct"
the
computer
to perform some type
of
operation, e.g., read. write,
add, subtract,
or
test for zero.
If
a
data
word were
incorrectly used
as
an
instruction, the computer
might
perform
an
illegal
operation
depending
upon
the
data
bit
configuration.
Data
words form records. fields,
amounts, results,
and
so
on. Figure 9 is a schematic
of core storage
with
both
types
of
words contained
in
separate locations.
Core storage
units
are available to provide the com-
puters
with
a capacity
of
4096, 8192,
or
32,768 word
locations of
36
information
bits each. As a decimal
digit is expressed by three
of
these bits, a total of
II
significant decimal digits may be expressed by each
word.
In
BCD coding (alphamerical characters),
one
word contains six numerical
or
alphabetic characters.
Thus,
the 32,768 words of core storage may contain
the binary equivalent to 360,448 decimal digits of stor-
age
or
the BCD representation of 196,608 characters.
The
actual capacity of storage is thus directly related
to the type of coding used.
Figure
10
shows the three core storage units
that
are available for the 709
and
7090
Data
Processing
Systems.
The
IBM
737
Core Storage, used
with
the 709
system, has 4,096 words
of
storage.
The
IBM
738
and
the
IBM
7302 Core Storage have 32,768 words
of
stor-
age
and
are used
with
the
709
and
the 7090 systems,
respectively.

Figure
10.
IBM Core Storage
Units
Introduction
9

Central Processing
Unit
The
central processing
unit
can
be divided
into
two
basic parts,
information
processing elements
and
exe-
cution
controls.
The
information
processing elements
are normally referred to
as
the
arithmetic
section.
The
execution controls are called simply
the
control
section.
The
arithmetic
section
is
the
computer's problem-
solving
unit.
The
operations
of
addition, subtraction,
multiplication,
and
division, as well as shifting, trans-
ferring,
and
storing
of
results are executed
in
this
section. Figure
11
shows a few of
the
operations per-
formed
in
the
arithmetic
unit.
The
control section guides the
computer
through
the
operations necessary to complete
the
various in-
structions.
The
execution
of
a
group
of
instructions may be
compared to
compounding
a chemical formula.
The
arithmetic
section would be
the
laboratory where the
compounding
takes place;
it
would
call
on
core stor-
age for materials needed to
produce
the
result.
The
control section would follow directions given
in
the
formula.
It
would instruct
the
chemist as to
what
ingredients to mix, how
long
to
mix
them,
and
in
what
order
they should be combined.
Of
necessity, then, the control section contains a
device called
the
"instruction
sequencer."
This
de-
vice locates
the
proper
instruction to be executed;
then, while
the
instruction
is
being executed, this de-
vice sets
up
the
conditions for
the
next
instruction.
At
different times
in
the program,
the
next
instruction
to
be
executed may
depend
on
the result of a test in-
struction, for example,
whether
an
error
indicator
is
on
or
off (Figure
12)
.
The
arithmetic
operations which computers are
capable
of
performing
treat
each
part
of
a word
in
014623
ADD
541034
555657
12345
Sub.
11111
01234
':"_
,,'_"'~"~
Unit
Control
Un
it
Figure
II.
Arithmetic
Operations
10
IBM
709·7090
12345
SHIFT~
~
~
STORE
3416
Arithmetic Section
"test the indicator!!
error
indicator«.t-.
"if
the indicator
is
on obtain the next instruction-from location
1000.
If
the indicator
is
off obtain the next instruction
from
location
2000."
"the
indicator
is
on,
put 1000 into the instruction sequencer"
"get
the instruction located
at
address 1000 and
execute
it."
- - - -
COntral
se~iia;;
- - - - - - - - - - - - - - - - -
--
11000!;nstructian sequencer
Figure
12.
Conditional
Testing
and
Transferring
core storage as
either
a 1
or
a
O.
Thus,
a
computer
word
consists
of
36 zero
and
one
digits
and
is said to
be
expressed
in
the
"binary
system."
An
example
of
a
binary
word
as
it
appears
in
the
arithmetic
unit
is
001101110010011011001001111001001001 which is sim-
ply
a string
of
zeros
and
ones. By
doing
its arith-
metic
in
the
binary system,
the
computer
is able to
achieve
greater
speeds
and
efficiencies
than
would
otherwise be possible.
Normally,
in
solving a problem,
the
numerical
data
are
originally
entered
into
the
computer
in
decimal
or
IBM
card
coding.
The
computer
is
then
instructed
to translate
the
data
into
binary form, go
through
the
desired computations,
and
then
translate
the
results
back
into
decimal form (Figure 13). However,
data
may be
entered
into
the
computer
in
any form desired
by the programmer.
Instruction
0011010101111
ADD
11010001111,00
10000011101011
PRINT
Central
P(ocessing Unit
Figure
13. Decimal
and
Binary
Data
Flow
Stored
Program
The
work accomplished by the
computer
in
solving
a
problem
or
processing
data
consists
of
executing
many
instructions
at
high
speed.
To
solve a problem,
it
must
first
be
reduced to equations
or
instructions
that
the
computer
is capable
of
performing.
The
en-
tire set
of
instructions used
in
solving a
problem
form
a program for
the
computer. Because these instruc-
tions are
held
in
the computer's storage
unit,
it
is
called a stored program system.

Normally, instructions
are
taken
from
sequentially
ascending locations
of
core storage. However,
the
exe-
cution
of
instructions does
not
necessarily have
to
occur
sequentially.
It
is possible,
when
control
or
transfer
instructions
are
given, for
the
computer
to
alter
the
process
of
sequential
execution
and
to
indi-
cate
some
particular
location
in
core storage contain-
ing
the
next
instruction
word
to
be
executed.
In
this
way,
the
execution
of
any
instruction
or
block
of
in-
structions
may
be
repeated
as
often
as desired.
For
some
control
instructions,
whether
the
next
in-
struction
is
taken
in
sequence
or
from
some
other
specified location
may
depend
on
the
result
of
a test
(Figure
12).
In
this case,
the
control
operations
pro-
vide
the
program
with
decision-making abilities.
The
logical
path
followed by
the
program
(that
is,
the
precise sequence
of
instructions to
be
executed) may
be
controlled
by a series
of
tests
applied
at
various
points
in
the
program.
Doing
this gives a
stored
pro-
gram
the
ability
to
change
its course of execution.
These
conditional
operations
increase
immeasurably
the
scope
of
the
system's
application.
Most
computer
instructions
have
an
address
part
indicating
the
location
in
core storage
subjected
to
some
arithmetic
or
logical
operation.
This
address
part,
or
field, always occupies
bit
positions
21
through
35 (Figure 14)
in
an
instruction
word.
Address
part
I
s,
I
Figure
14. Address
Part
of
an
Instruction
The
15-bit address field is large
enough
to
hold
the
number
32,767 -
the
largest address
in
core storage.
This
number
expressed
in
the
binary
system is simply
15
consecutive ones (Figure 15) .
II
III
I I
11111
11111
S,1
2021
35
Figure
15. Address
Part
Showing
Maximum
Address
In
a
data
processing system
with
8,192 words of
core storage,
the
largest address (8191)
is
contained
in
only
13
bit
positions
of
the
instruction
word.
The
contents
of
the
two left-most positions
of
the
address
field
are
ignored
during
the
execution
of
an
instruc-
tion
to
decode
an
address. Similarly, a
computer
with
4,096 words
of
core storage uses
only
bit
positions 24
through
35
as
its address field.
The
operation
part
of
an
instruction
normally
is
not
fixed
in
length
but
may
vary
depending
upon
the
instruction
itself.
Figure
16
shows
the
bit
pattern
for
an
instruction
specifying
the
addition
of
the
contents
S,1
35
Figure
16.
Add
Instruction
of
core storage
location
0001.
When
this
instruction
is
executed
by
the
computer,
the
contents
of
core loca-
tion
0001
are
added
to
the
contents
of
the
accumulator
register.
For
example, assume
that
the
accumulator
contains
the
number
+1.
If
the
number
in
location
0001
is
+2,
the
result
of
executing
the
ADD
instruction
(Fig-
ure
17) is a 1
bit
in
positions 34
and
35,
and
0 bits
in
all
other
positions
of
the
accumulator;
(II
is
the
binary
expression for
the
sum,
3).
The
first
position
of
the
word
is
used
to express
the
sign
of
the
amount
or
result.
Instruction
(Add)
location 1
(+2)
000000000000000000000000000000000010
, ,
AC
before
(+1)
aaa
000
aaaa0 a
000
aa0 a0 0 a0 0 0 a0 0 a
00
a0 a
01
,
AC
after
(+3)
1010000
a0 0 0 0 0 aa0 0 0 aa0 aaa0 a0 0 a
00000
aa1
Ii
s 1
J5
Figure
17.
Execution
of
an
Add
Instruction
A register is defined
as
a device
with
the
ability
to
accept
data,
hold
them,
and
transfer
the
data
to
an-
other
register
or
device.
The
registers
are
given dif-
ferent
names according to
their
functions.
Thus,
the
accumulator
register
"accumulates"
arithmetic
results.
The
multiplier-quotient
register
holds
either
the
mul-
tiplier
or
the
quotient
in
an
arithmetic
operation.
On
all
arithmetic
operations,
the
sign positions
of
the
registers
in
use
are
automatically
adjusted.
The
accumulator
register has 38 positions.
They
allow
the
register to
handle
a 35-bit
word
with
its
sign.
Two
extra
positions, P
and
Q,
are
provided
to
keep
track
of
overflow conditions.
If
two 35-bit
num-
bers
are
added
together,
it
is possible
that
the
result
would
be
larger
than
35 bits, as
shown
in
Figure
18.
The
accumulator
is
used to
hold
one
factor
during
arithmetic
operations.
The
other
factor usually is
Accumulator
register
Storage register
Combined in
the
adder
and
returned
to
the
accumulator
register.
S Q P I
35
! ! !10000000000000000000000000000000001
1100000000000000000000000000000000111
Q P 1
35
I!
Ii
000000000000000000000000000000001001
!
iIi
000000000000000000000000000000001001
S Q P 1
35
}1igure 18.
Accumulator
Overflow
Condition
Central
Processing
Unit
11

Accumulator register
before a left
shift.
5 Q P 1 35
I ! ! :100000000000000000000000000000000001
5 Q P
1-----------35
Accumulator register I I I i I
after
a left shift
of
I
11
100000000000000000000000000000000000
one
place.
Figure
19.
Accumulator
Shifting
held
in
the
storage register.
The
two factors
are
com-
bined
in
another
register-type device called
the
adder.
The
adder
consists
of
35-bit positions
and
the
two
extra
ones, P
and
Q.
Thus,
any overflow
out
of
posi-
tion
1 will
be
placed
in
position
P. Likewise, any
overflow
out
of
position P will
be
placed
in
position
Q.
An
overflow
out
of
position Q will, however, be
lost.
Information
in
the
accumulator
may be shifted to
the
right
or
to the left.
1£
a left shift is involved,
an
overflow
condition
may
be
recorded
in
the
same man-
ner
as
in
an
arithmetic
operation
(Figure
19).
Not
only
is
the
entire
number
shifted
to
the
left,
but
zeros
are
inserted (position 35)
in
the
positions vacated.
Thus,
no
matter
what
the
content
of
the
accumulator,
if
a
left
shift
of
37
or
more
places is executed,
the
contents
of
the
accumulator
are
replaced by zeros.
Information
may also
be
shifted
into
the
accumu-
lator
from
the
MQ
register,
one
bit
at
a time,
or
from
the
accumulator
to the
MQ,
one
bit
at
a time.
The
effect is to create a register
that
is
74 positions
in
length,
38
positions for the
accumulator
and
36 for
the
MQ
register.
The
multiplier-quotient
(MQ)
register has
36
posi-
tions.
During
a
multiply
operation,
this register con-
tains
the
multiplier;
during
a divide,
it
receives
the
quotient.
The
register
can
store
and
shift a full
36-
bit
word.
In
addition
to shifting
right
or
left,
in
the
same
manner
as
the
accumulator,
it
can
also
"ring
shift."
That
is, bits shifted
out
of
the
sign position
enter
position
35
(Figure
20)
.
In
addition
to its
arithmetic
and
shifting functions,
the
MQ
register serves
as
a sending
and
receiving regis-
ter
for some
input-output
operations.
For
the
709
system, this means
that
information
coming from
the
magnetic
drum
or
going to
the
drum
and
CRT
equip-
ment
passes
through
the
MQ
register.
When
a
word
is
entered
into
or
taken
from a loca-
tion
in
core storage, a storage reference is said to
be
51
35
MQ
register before 111111000000000000111000111000111
000
a
ring-shift
of
three
places.
51
35
MQ
register
after
shift 11110000000000001110001110001110001111
Figure
20.
MQ
Register
"Ring
Shift"
12
IBM
709-7090
made.
This
operation
is non-destructive.
That
is,
the
contents
of
that
location
are
left
unaltered
after
the
operation.
However,
if
the
storage reference causes
new
information
to
be
entered
into
a location,
the
prior
contents
of
that
location
are
automatically re-
placed
by
the
new
information.
Only
one
such storage reference
can
be
made
during
any single
computer
cycle.
The
basic
computer
cycle
(or
internal
speed) for
the
709 is 12 microseconds
long
(12
millionths
of
a
second).
The
basic cycle for
the
7090 is 2.18 microseconds.
Normal
computer
operations
start
with
an
instruc-
tion
(I) cycle.
This
cycle does
the
following:
1.
It
obtains
the
instruction
to
be
executed from
the
core location designated
by
the
instruction
counter.
2.
It
locates
the
operand
(number
to
be
worked
with
or
upon),
if
any, as specified
by
the in-
struction's address
part.
An
example
would
be
the
instruction
ADD 0002 (add
the
contents
of
storage location 0002 to
the
contents
of
the
accumulator
register), shown
in
Figure
21. All
data
handling
concerned
with
storage
and
the
central
processing
unit
is accomplished
in
parallel.
This
means
that
all operations
are
concerned
with
a full
word
of
36 bits.
As
an
example, refer to Figure
17
where
an
ADD
operation
is performed.
Even
though
the
numbers
involved use
only
a few bits
of
the
entire
word,
the
remainder
of
the
word
is filled
with
zeros
and
all 36
positions
of
both
words
are
then
added
in
one
opera-
tion.
Thus
the
time
required
to
add
two
I-bit
num-
bers is
the
same
as
the
time
required
to
add
two
36-
bit
numbers.
This
principle
of
parallel
operation
is
one
of
the
basic differences between
the
709
and
7090 computers
when
compared
with
the
705 system series, which is
said
to
operate
serially (normally om;
position
or
character
at
a time) .
(ADD 0002) =
~
Instruction Register
5torage Register
~
Address Register
Adders
1-+004121503051
I (number in accumulator)
Accumulator Register
Figure
21. Schematic, Decoding
an
Add
Instruction

The
instruction
ADD 0002
is
brought
from
core
storage
into
the
storage register.
At
this
point,
the
operation
part
is sent to
the
instruction register
to
determine
the
type
of
operation
to be executed.
At
the
same time,
the
address
portion
of
the
storage reg-
ister is
taken
to
the
address register so
that
the
proper
core storage
location
(operand) is
added
during
the
next
storage reference cycle.
All
numbers
in
Figure
21
are
shown
in
octal
notation.
The
next
cycle,
referred
to as
an
execution
cycle,
is used
when
a reference to core storage is
required
to
obtain
another
word, e.g., a
number
to be added.
Assume
that
the
address register has
the
address
of
the
core storage location to be added.
During
this second
(reference) cycle, the contents
of
that
storage location
are
brought
from core storage to
the
storage register,
and
then
to
the
adders.
At
the
same time,
the
pre-
vious
number
in
the
accumulator register
is
taken
to
the
adders. A
new
number
is
formed
in
the
adders
and
is
then
placed
back
in
the
accumulator
register
(Figure
22).
The
operation
is
now
finished
and
the
computer
is
ready
to execute
the
next
sequential
instruction.
The
type
of
operation
just
described is
called
fixed
point
arithmetic
or
integer
arithmetic.
The
computer
can
also
perform
operations
in
floating
point
arithme-
tic. A
complete
set
of
floating
point
instructions
is
provided
to
increase
the
range
of
numbers
used
and
to
reduce
programming
time.
In
integer
arithmetic,
the
size
of
the
numbers
used
is fixed by
the
design
of
the
computer
(36-bit
word
size) . By
using
floating
point
arithmetic,
a
larger
num-
ber
may
be
expressed
and
operated
upon,
because a
part
of
the
word
is used to express
the
exponent
(char-
acteristic)
and
another
part
of
the
word
is
used
for
the
fraction
(mantissa).
A
comparison
of
number
size shows
that
the
largest
number
the
computer
can
use
with
fixed
point
opera-
tion
is
I X
1011.
This
is
equal
to 100 billion.
With
floating
point
operation,
however, 3 X
10
35
is
the
larg-
Instruction Register
+132540020425 (number
from
location 0002)
+1
32540020425
Accumulator
Register
Storage Register
Address
Reg
ister
(number
from
location 0002)
(previous
number
in accumulator)
(resulting number
in
accumulator)
Figure
22. Schematic,
Performing
an
Addition
I
Characteristic
Fraction
51
8 9 35
Figure
23.
Floating-Point
Word
Format
est
number.
This
number
is too
high
to be expressed
in
common
language
terms.
In
the
computer,
a floating-point
number
is stored
in
a
word
as shown
in
Figure 23.
The
fraction
is
con-
tained
in
bit
positions 9
through
35
with
the
sign of
the
fraction
contained
in
position
S
of
the
word.
The
characteristic
is
contained
in
bit
positions 1
through
8
and
is
formed
by
adding
+128
to
the
ex-
ponent.
For
example,
an
exponent
of
-32
would
be
represented
by a characteristic
of
128-32
or
96.
An
exponent
of
+ 1
00
would
be
represented
by a charac-
teristic
of
100+128
or
228.
Most
integer
arithmetic
instructions
have
a floating-
point
counterpart
instruction.
Thus,
it
is
possible to
ADD
or
to
perform
a floating-point ADD
(FAD).
To
summarize, a floating-point
binary
number
(X)
may be
represented
as
a signed
proper
fraction (B)
times some integral power (b) of
2.
Examples:
X B 2b
-.001
=-.100
X 2-"
.100 .100 x
2"
l.l00
.110 X
2'
110.000 .110 X 23
Assembly
Programs
The
writing
of a complete
program
for
the
computer
in
its
machine
language
would
be
rather
awkward.
For
example, to
write
only
the
one
instruction
re-
quired
to
subtract
the
contents
of
core
location
0003
from
the
contents
of
the
accumulator
register
requires
the
recording
of
36 zeros
and
ones,
as
shown
in
Figure
24.
This
instruction
can
be
written
as
SUB
0003, a
more
convenient
form
of
expressing
the
instruction.
The
writ-
ing
of
instructions
in
this form is
an
improvement
over
the
system
of
writing
36
zeros
and
ones.
In
addi-
tion
to
reducing
the
amount
of
information
which
must
be
written,
it
has.
more
meaning
to
the
reader.
Namely,
"subtract
the
contents
of
location
0003."
However, to
determine
the
entire
machine
operation,
the
programmer
or
person
reading
the
program
must
Operation
Address
Figure
24.
Subtract
Instruction
Central
Processing
Unit
13

know
what
is stored
in
location 0003.
To
assist
the
programmer,
the
use
of
symbols
can
be
extended
to
in-
clude addresses as well as
the
operation
part
of
an
in-
struction.
Assuming
that
the
net
pay
for a payroll calculation
is
stored
in
location 0003,
the
instruction
might
now
be
written
as
"subtract
net."
This
clarifies to the pro-
grammer
the
operation
to be performed,
and
also
what
quantity
is involved.
Thus,
symbolic
programming
employs instruction-by-instruction coding
in
a lan-
guage
that
is a representation
of
the
basic language
of
the
computer
itself.
The
computer
can
execute instructions only
if
,they
are stored
in
machine language.
Thus,
the
instruction
"subtract
net"
must be converted to
the
basic
machine
language before its execution.
One
way
of
doing this
would be to
manually
convert all symbolic instruc-
tions to machine language before
entering
them
into
the
computer.
This
obviously would be a laborious
task. A more practical solution
is
to have
the
com-
puter
perform
the
conversion.
This
is accomplished
through
use
of
a symbolic assembly program.
An
assembly
program
performs
the
necessary trans-
lation
or
conversion from
the
symbolic language to
the machine language.
At
the
same time,
the
program
assigns absolute core storage locations to
the
imtruc-
Convert
the
Instruction
"SUBTRACT NET"
Becomes
000100000010000000000000100000000
No Yes
Print
and
punch
the
resulting
program
Figure 25. Flow
Chart
of
an
Assembly
Program
14
IBM
709-7090
tions
and
data
contained
in
the
symbolic program.
Figure
25
shows a flow
chart
of
the
process involved
when using
an
assembly program. Assume
that
the
instructions to
be
assembled are
on
punched
cards
and
that
the
assembly
program
itself is
on
a magnetic tape
(assembly tape) .
The
assembly
program
normally provides certain re-
strictions
upon
the
length
and
type
of
symbols
that
may
be used by
the
programmer.
It
assigns
an
abso-
lute
core storage location for
the
first symbolic instruc-
tion
and
increases this location by
one
for each sub-
sequent
instruction decoded.
In
this manner, the de-
coded
program
instructions are assigned sequential lo-
cations. Space
is
provided for
the
data
that
are
a
part
of
the
assembled program. Normally,
the
constants
and
other
data
are placed
at
the
end
of
the
symbolic
program
and
are assigned sequential locations
that
follow
the
instruction area.
During
assembly,
the
first reference to a symbolic
address assigns this address to
an
absolute storage lo-
cation. Any subsequent references to this symbolic ad-
dress will also be assigned
the
same address.
The
man-
ner
in
which
the
assembly proceeds is described below.
Each
symbolic
instruction
is
read
from
the
card
reader
into
the central processing
unit.
The
"sub-
tract"
portion
of
the
first instruction is
matched
against
the
contents
of
the
assembly tape
and
is de-
coded
into
the
proper
bit
configuration for a
subtract
operation
000100000010.
The
"net"
portion
of
the
instruction
is assigned a location
in
core storage
that
is
not
being
used.
This
bit
configuration (assume
000100000000)
is
then
inserted
into
the
address
portion
of
the
decoded
subtract
instruction.
The
full instruc-
tion
word
(000100000010000000000000000I00000000),
both
operation
and
address parts,
is
then
written
as
the
first instruction
on
the
program
tape.
The
original
"subtract
net"
is stored
so
that
it
may
appear
in
the
final
printing
of
the
program.
The
assembly
program
then
tests to
determine
if
more instructions
remain
to
be
decoded.
If
there
are more,
the
above
process
is
repeated
until
all symbolic instructions have
been
decoded
and
written
on
the
program
tape.
When
the
assembly process is complete,
the
resultant
as-
sembled
program
is
printed,
together
with
the
original
symbolic instructions.
The
print-out
takes
the
follow-
ing
form:
SYMBOLIC
INSTRUCTION DECODED
MACHINE
EQUIVALENT
SUBTRACT
NET
000100000010000000000000100000000
When
the
printing
process is complete,
the
assembly
program
furnishes the
programmer
with
a
group
of

punched
cards
containing
the
machine
language
trans-
lation
so
that
if
the
program
is used again,
the
as-
sembly process
need
not
be
repeated.
Computer
Operations
The
format
of
the
instruction
word
is, for
the
most
part,
a precise one.
Although
slight
variations
exist,
in
general
the
format
is
as
shown
in
Figure
26.
Operation
part
Flag
Tag
Address part
I I I I
5,
1
11
12-13 18-20
21
35
Figure 26.
Instruction
I'onnat
The
operation
part
usually
is
contained
in
positions
S,
1-11
of
the
instruction
word.
In
the
following text
and
in
program
writing,
an
alphabetic
code
is
used
to
identify
the
instruction
operation
rather
than
the
full
name
of
the
instruction.
Thus,
the
code
CLA
signifies
CLear
and
Add,
or
SUB
means SUBtract.
If
the
numeri-
cal
machine
language
code is to be used,
it
is given
in
the
octal system.
For
example,
+0500
is
the
code
for
the
clear
and add
operation;
+0402
denotes subtrac-
tion.
All
abbreviations are simply
shorthand
methods
used to
reduce
the
manual
task
of
writing
a
program.
The
flag
part,
or
flag bits, is
contained
in
positions
12
and
13
of
the
word.
It
specifies
that
indirect
ad-
dressing is
to
take place.
This
operation
may
be
per-
formed
only
on
instructions
that
use
index
registers.
Both
indirect
addressing
and
the
use
of
index
registers
are
explained
later
in
the
text.
The
tag
bits
are
contained
in
positions 18, 19,
and
20.
They
specify
which
index
registers
are
to
be used.
Only
a few
instructions
may
not
use
indexing.
The
address
part
of
the
instruction
is
contained
in
positions
21
through
35
of
the
word.
It
tells
the
com-
puter
the
location
or
"operand"
that
is to be
used
with
the
instruction.
In
the
case
of
shifting
operations,
the
address
part
contains
the
number
of
places to
be
shifted.
For
other
instructions,
the
address
part
may
be a
part
of
the
operation
itself. Such a case
would
have
the
address
part
expressed as a four-digit num-
ber; read-1200 means
the
reading
operation
will
take
place
and
the
1200 will tell
which
input-output
unit
is
being
used.
In
this case,
the
tape
unit
numbered
0
on
data
channel
A
would
be used.
In
executing
the
instruction
ADD
1000,
the
computer
assumes
that
the
augend
is
in
the
accumulator
and
the
addend
(the
number
being
added) is specified
by
the
address
part
of
the
ADD
instruction.
The
sign
of
the
numbers
(S
position) is,
of
course, considered
dur-
ing
an
add
operation.
When
two
numbers
of
the
same
magnitude
are
being
added,
the
sign
of
the
result
is
taken
from
the
number
in
the
accumulator.
ACCUMULATOR
+6
-6
+
+
STORAGE
-6
+6 =
=
RESULT
IN
ACCUMULATOR
+0
-0
The
clear-and-add
(CLA)
instruction
is
similar
to
the
add
instruction
except
that
the
accumulator
is
cleared to zeros
and
the
contents
of
the
location
speci-
fied by
the
address
part
of
the
CLA
instruction
are
placed
in
the
accumulator.
Add
magnitude
(ADM)
is
another
similar
instruc-
tion.
Its
operation
is
the
same
as
ADD
except
that
the
sign
of
the
number
is
ignored
and
the
number
is
treated
as positive.
Other
arithmetic
instructions are
treated
in
a like
manner
since all
arithmetic
processes
are
accomplished
by
addition,
and
complementing
a
result
where
neces-
sary.
Subtraction
occurs
in
the
following
manner:
7 = 000111
Number
in
Accumulator
5 = 000101
Number
to
be
Subtracted
(Operand)
111000
Complement
of
Number
in
Accumulator
+ 000101
111101
Recomplement
the
Result
(No
High-Order
Carry)
000010
This
is
the
answer, 5
subtracted
from 7 =2.
Multiplication
is accomplished by testing
the
low-
order
position
of
the
multiplier
and
adding
the
multi-
plicand
if this low-order position is a
1.
After
each
test,
the
answer is shifted
one
place
to
the
left.
This
is
repeated
until
there
are
no
more
numbers
in
the
mul-
tiplier. 5 = 000101
Multiplicand
X3=
000011
Multiplier
000101
000101
000000
15
=00001111
Product
Division is accomplished
in
a like
manner
but
shift-
ing
occurs
in
the
opposite
direction. By
shifting
a
binary
number
one
place
to
the
left,
the
result
is
the
same as
multiplying
by 2. A
number
shifted
one
place
to
the
right
has
been
divided
by
2.
A
group
of
word
transmission
instructions
is also
provided.
These
instructions
are
concerned
with
the
movement,
at
high
speed,
of
words
or
parts
of
words
from
one
location
or
register
to
another.
In
particu-
lar,
information
may
be
either
stored
or
taken
from
locations
in
core storage
and
various registers
in
the
central
processing
unit.
Since
the
word
transmission
instructions
are
concerned
with
the
movement
of
data,
they
are
used
frequently.
The
store
(STO)
instruction
stores
the
contents
of
the
accumulator
in
the
location specified by
the
ad-
Central
Processing
Unit
15

dress
part
of
the
store instruction.
Other
store instruc-
tions accomplish
the
storing
of
the address portion,
tag,
and
other
portions
of
both
the
accumulator
and
the
multiplier-quotient registers.
The
computer
also has certain load instructions
to
accomplish the same
end
as
the
store instructions, ex-
cept
in
reverse. A store instruction places the contents
of
a register
in
storage. Conversely a
load
instruction
takes the contents
of
a storage location
and
places
it
in
a register.
There
are also
load
instructions for
the
index
registers.
With
transmit, store,
or
load
type instructions,
the
contents
of
the storage location
or
register from which
the
data
are being moved
remain
unchanged.
Shift instructions are used to move the contents
of
the accumulator
and/or
the
multiplier-quotient regis-
ters
either
to the
right
or
the left
of
their original posi-
tions.
With
the exception
of
the
rotate-MQ-Ieft instruc-
tion, zeros are automatically inserted
in
the vacated
positions of the register.
Thus,
a shift larger
than
the
bit
capacity
of
the register causes the contents
of
the
register to be lost
and
replaced by zeros.
When
a shift
instruction is interpreted, the
amount
of
the shift is
determined by
bit
positions
28
through
35
of
the
shift
instruction.
An
example is given
in
Figure
27.
Instruction
Accumulator left shift
(ALS)
Operation part Address part
+0767 00000100 = 4
SQPl
35
Accumulator contents
,,0..Q01010oo100111oo101001110111ooog.Y),01
before shift
LOS;W
4'$
Accumulator contents 01000100111001010011101110000111010000
after shift
Figure
27.
Accumulator Shifting
Control instructions are defined
as
instructions gov-
erning
the flow
of
a program.
They
are the instruc-
tions
that
cause the
computer
to alter the
normal
process of taking its instructions from sequential stor-
age locations. Control
or
"transfer" instructions may
be divided
into
two types:
(1)
unconditional transfers
specifying the location of
the
next
instruction to be
executed,
and
(2)
conditional transfers performing a
test
of
some kind.
The
location
of
the
next
instruc-
tion
then
depends
on
the
outcome
of
the test.
Unconditional
Conditional
Transfer
(TRA)
2000.
The
next
instruction will
come from location 2000.
Transfer
on
If
the
contents
of
the
ac-
plus
(TPL)
2000.
cumulator
are plus.
the
next
instruction will
be
taken from 2000.
If
not
plus.
the
next
sequential
instruction will be taken.
Certain
test instructions exist
and
are similar to
conditional transfer instructions
in
that
they cause
16
IBM
709-7090
some test to be performed. Unlike conditional trans-
fers,
the
test instructions
do
not
specify a location for
the
next
instruction. Instead, the alternative location
is fixed relative to the position
of
the test instruction
in
the
program.
An
example is shown
in
the follow-
ing
program.
LOCATION
INSTRUCTION
100
Add
10l
P-BitTest
102 Shift
Right
103
Store
REMARKS
If
the
P
bit
of
the
accumulator
is
a
I.
the
next
instruction
(102)
is skipped
and
the
instruction located
after
that
(103)
is executed.
If
position P con-
tains a
O.
the
next
instruction
(102)
is executed.
Many
of
the indicators may be tested
in
this
manner
and
the
flow
of
the
program
adjusted to
fix
the cause
of
the
indication
or
to proceed
around
it.
Another
important
group
of
instructions
is
the
one
concerned
with
the indexing operations.
These
in-
structions are explained
under
the indexing section of
the manual.
Information
Paths
The
core storage
unit
is normally connected directly
to
the
central processing
unit.
It
is
also the site
of
the
stored program
that
controls the entire
computer
sys-
tem.
On
the
other
hand,
the auxiliary storage
and
in-
put-output
devices are normally disconnected (not
physically
but
logically) from the system.
They
be-
come connected only by execution of certain stored
program
instructions.
The
contents
of
these devices
may control the computer only after being transmitted
to core storage.
Thus,
data
flows
between
input-output
devices
and
core storage
through
the central processing
unit
in
the
704
system (Figure
28)
.
T
Figure 28. Information Flow.
IBM
704 System

Using Figure 28, assume
that
the
magnetic
tape
unit
marked
"1"
is
reading
data.
Because
the
tape
data
are
arranged
in
six-bit
groups
across
the
width
of
the
tape,
it
takes six
of
these
groups
to
make
up
a 36-bit
word. As these
groups
are
read
from
tape, they
are
as-
sembled
in
the
tape
control.
When
a full
word
is
as-
sembled, this
word
is
sent
to
the
central
processing
unit
and
from
there
to
the
core storage location speci-
fied by
the
instruction
that
caused
the
tape
to
be
read.
Actually, two
instructions
are
required
to
read
data
from
any
input-output
device
into
core storage.
The
first is a read-tape-I
instruction
with
"read"
as its op-
eration
part
and
"tape
1" as its address
part.
The
execution
of
this
instruction:
(1) selects
the
proper
tape
unit,
(2)
puts
it
into
read
status,
and
(3) starts
the
tape
moving
in
the
proper
direction.
The
second
instruction
needed
is calleda copy instruction.
"Copy"
is
the
operation
part
with
the
location
that
the
data
should
enter
(core storage) as
the
address
part.
If
a
copy-1000
instruction
were executed,
the
data
read
would
be
entered
into
core storage location 1000. A
single copy
instruction
moves
one
full
word
into
stor-
age.
If
two
or
more
words
are
to
be moved, two
or
more
copy instructions
must
be
furnished, each
with
a different address
part.
INSTRUCTION
ADDRESS
Read
Tape
I
Copy 1000
Copy
1001
Copy 5000
REMARKS
Gets
tape
1 ready
and
moving
Puts
that
word
into
location 1000
Puts
second word
into
location
1001
Puts
third
word
into
location 5000
This
type
of
instruction
group
is called a "copy
loop"
or
a copy
routine.
A
true
"loop"
is fully ex-
plained
under
the
heading
"Index
Registers."
The
information
paths
and
the
components used
in
the
709 system are
shown
in
Figure
29.
Comparing
Dota
Synchronizer
Unit
Channel
II
A"
Channel"
BII
Figure
29.
Information
Flow,
IBM
709 System
Figures
28
and
29,
note
that
the
major
difference be-
tween
the
two systems
is
the
fact
that
data
coming
from
or
going
to core storage
do
not
pass
through
the
central
processing
unit.
Instead,
a
new
device called
a
data
synchronizer is used as
the
go-between for in-
put-output
devices
and
core storage.
With
the
709
computer,
the
stored
program
starts
an
input-output
operation
by
defining
which
device
is
to
transmit
(read tape)
and
what
area
in
storage
is
to
receive
the
data;
then
the
central
processing
unit
is
free
to
do
other
calculations.
Note
the
main
differ-
ence between
the
704
and
the
709.
In
the
704,
the
cen-
tral
processing
unit
must
wait
until
all
data
have
been
transmitted
while
the
709 merely starts
the
operation
and
is
then
free
to
do
other
work.
This
subject
is
ex-
panded
under
the
section
"IBM
766
Data
Synchro-
nizer."
The
7090
computer
system uses basically
the
same
information
paths
as
does
the
709.
Two
new
units
are
added
in
the
7090 system.
They
replace
the
data
syn-
chronizer's
operation.
They
are
called
"multiplexor"
and
"data
channel."
Their
operation
is
explained
in
the
section
"IBM
766
Data
Synchronizer." Figure 30
shows
information
flow
and
components
in
the
7090
system.
There
may be a
maximum
of
eight
data
channels at-
tached
to
the
multiplexor.
Each
data
channel
may
have
the
same
complement
of
input·output
devices as
shown
in
Figure 30.
This
feature
gives a
maximum
of
80
magnetic
tape
units,
eight
card
readers,
eight
card
punches,
and
eight
printers.
Figure
30 shows
that
the
central
processing
unit
of
the
7090 system has even less
control
over
core storage
and
the
input·output
devices
than
does
the
709 system.
The
main
difference
in
all
three
systems is
the
pro-
gression from a synchronous
computer
(704) to
an
asynchronous
computer
(709-7090),
as
far
as
the
in-
put·output
controls
are
concerned.
Here,
synchronous
is
defined
as
one
operation
happening
after
another
has finished, while asynchronous means
simultaneous
occurrence
of
several operations.
L
~~~~J~-"""1Central
Processing
Unit
Figure
30.
Information
Flow,
IBM
7090 System
Central
Processing
Unit
17

Indexing
and
Indirect Addressing
The
copy
routine,
described previously, is acceptable
if
a
limited.
number
of
words are to
be
copied.
For
example, 1,000 copy instructions are needed to copy
1,000 words.
This
wastes storage space. However,
the
copy address
could
be altered by
the
program
each
time
it
is
used.
A
program
to copy 1,000 words from tape
number
I
and
place
them
into
consecutive storage locations
could be as
in
Figure 31.
In
this program,
thirteen
instructions
and
three constants are
required
tomodify
the address
of
the
copy instruction
and
test for
the
end
of
the
copy loop.
The
program
is considerably
improved over the
routine
in
which 1,000 copy in-
structions are needed. However,
the
use
of
an
index
register makes
the
program
much
more
efficient.
The
computers
contain
three
index
registers
that
are
important
to
the
system's
operational
abilities.
These
registers are
termed
A, B,
and
C
or
1,2,
and
4.
The
latter
terminology is more convenient for
the
programmer
because
the
numbers used are
the
octal
representation
of
the
"addresses"
of
the
three
index
registers.
Inst
.
Loc. Instruction
Remarks
50
Read
tape 1
Get
tape I ready
to
read
51
Copy
200
Put
the lst
word
into location
200
52 CLA62 Clear the accumulator
to
zeros and add
10
it the
contents
of
location
62
(0000----000)
53
ADD
64
Add
to
the accumulator contents the contents of lo-
cation 64 (0000----001).
These
instructions
make a counter which
is
increased
by
one
for
each
copy instruction
executed.
54
STO
62
Store the result
in
location
62.
55 CLA63 Clear and add into the accumulator, the contents
of
location
63
(0000----1000).
56
SUB
62
Subtract
from
the accumulator (1000) the contents
of location 62.
(This
is
the location that will in-
crease
with
each copy instruction
execution.)
57
TRZ
65
Transfer when the accumulator contents are
zero.
This
will occur
when
1000
copies have been
ex-
ecuted.
58 CLA51 Clear the accumulator and add the contents of lo-
cation
51
(copy 200).
59
ADD
64
Add
the contents
of
location 64
to
the contents of
the accumulator.
This
will increase the copy
address
from
200 to
201
the first time.
The
ad-
dress will then be increased
by
one each time the
instruction
is
executed.
60
STO
51
Store the result back
at
location
51
•
61
TR
51
Transfer back
to
location
51
so
that the next
word
will
wi
II
be read in.
(Remember
that the copy address
has
been increased
by
one.)
62 00---0000 Constants:
63 00---1000
64 00---0001
65
STOP
The
program will reach this instruction after
1000
words
have been copied and will stop.
Figure 31. Sample
Program
18
IBM
709-7090
operation
tag-bits
address
1-1
___
.....
1-=0_0"--'1
.....
1
__
,---_1
register
specification
octal
alphabetic
A
10 1 0 I
11
0 0 I
S,2
11
18
2021
35
Figure 32. Index-Register
Tag
Bits
2
4
B
c
The
addresses
of
index
registers are
stipulated
in
a
part
of
the
instruction
word
known as
the
tag field.
Such addresses are normally referred to as tags.
The
tags
perform
the
same function as
the
address
~f
the
instruction.
They
tell
the
computer
whether
an
mdex
register is to
be
used
and
which register is to
be
used.
The
tag field is located
in
positions 18,
19,
and
20
of
the
instruction
(Figure 32) . By
having
more
than
one
tag
bit
in
the
tag
field, two
or
more
index
registers
may be used
in
a single instruction.
Thus,
the
con-
tents
of
the registers would be combined
and
the
re-
sultant
sum
would
be
used.
The
index
registers are
15
positions
long-large
enough to
hold
the
largest possible storage address.
They
are used to modify
an
address by
adding
the
complement
of
their
contents to the address.
This
re-
duces
the
address by
the
contents
of
the
index
regis-
ter.
Many
instructions may specify
index
action, thus
making
them
useful for such functions as address
modification
and
counting.
As
an
example
of
the
arithmetic involved
when
in-
dex registers
are
used, assume
that
index
register I
contains
the
number
2
and
that
the
copy instruction,
with
an
address
of
200,
is
to be executed.
The
follow-
ing
occurs (Figure 33) .
When
the
copy
instruction
is decoded,
the
tag
bit
in
position
20
specifies
index
action; thus,
the
contents
of
index
register 1 are complemented
and
placed
in
the adders.
Note
that
the
contents
of
an
index
reg-
ister are always complemented when sent to
the
ad-
ders.
This
feature results
in
subtracting
the
contents
from
the
address.
The
address
portion
of
the
copy in·
struction is also placed
in
the
adders;
after
adding
the
two numbers,
the
result (called
the
effective address)
is
used
in
execution
of
the
copy instruction
instead
of
operation
tag
address
1000111000000100000010011000000010000000 I
address
part
of
instruction·-·0000000100oo000
index register contents - - -111111111111101
_111111111111101
carry
is
added into ( 000000001111101
units postion - - - - )0 1
Effective address -- - - 000000001111110 =
176
Figure
33.
Index-Register Arithmetic, Subtracting

/0001110000001000000100110000000100000001
Address
part
000000010000000
index
register contents 000000000000010
--000000000000010
Effective address
OOOOOqoHl,OOqolO
= 202
Figure
34.
Index·Register
Arithmetic,
Adding
the
actual address.
In
this case,
the
effective address
is 176.
If
the
programmer
wishes to increase
the
effec-
tive address,
the
number
to
be
placed
in
the
index
register is inserted
in
complement
form.
Thus,
when
the
address
and
index
register contents
are
combined,
the
result
is
an
additive process.
Using
the same facts
(as
in
Figure
33)
with
the
index
contents
in
comple-
ment
form,
the
effective address
is
now
202
instead
of
176 (Figure
34).
With
an
instruction available to reduce
the
contents
of
the
index
register each time
it
is used,
the
effec-
tive address is easily modified.
The
instruction
is
called
"transfer
on
index"
(TIx)
and
has
the
format
shown
in
Figure 35.
The
operation
of
the
instruc-
tion
is
as follows:
If
the
number
in
the
specified
index
register
is
greater
than
the
decrement portion,
the
in-
dex register is
reduced
by
the
amount
of
the
decre-
ment
and
the
computer
takes its
next
instruction
from
the
location
specified
by
the
instruction
address.
If
the
index
register contents
are
equal
to
or
less
than
the
decrement,
the
register is
not
changed
and
the
next
instruction
in
sequence
is
executed.
IOperation
I Decrement I Tag Address
S,1
23
17
18
2021
35
Figure
35.
TIX
Instruction
Format
To
apply
this instruction, assume the same condi-
tions set
forth
for
Figure
31. Follow
the
copy instruc-
tion
with
the
transfer-on-index
instruction
with
a de-
crement
portion
of
I.
The
result
would
be
as
follows:
True
Index
Register
Contents
Decrement
Contents
of
TIX
Instruction
True
Result
after
Decrement
Is
Subtracted
000000000000010
000000000000001
000000000000001
This
use
of
index
registers for address modification
can
now be
applied
to a
program
to copy 1,000 words
from a
tape
unit
into
1,000 storage locations.
The
program
can
be
written
as
follows:
LOCATION
INSTRUCTION
DECREMENT
TAG ADDRESS
50
Read
tape
51
Load
index
register 100
52 Copy 1200
53
Transfer
on
index
(0001) 52
54
Compute
100
Constant
(1000)
Location 50.
This
instruction
selects
tape
unit
1 for
reading.
Location 51.
The
load
index
instruction
places
the
contents
of
location 100
into
index
register
I.
Loca-
tion
100 contains
the
quantity
1000.
Location 52. Because
the
instruction
is
tagged, the
address
of
the copy
instruction
is
treated
as
explained
in
Figure 33.
The
first time
cpy
is executed, the con-
tents
of
the
index
register
are
subtracted, resulting
in
an
effective address
of
200.
The
index
register is
then
reduced
by
the
decrement
of
the
transfer-on-index in-
struction
so
that
successively
higher
locations
of
stor-
age are used each time
through
the
loop.
Location 53.
The
TIX
instruction,
having
a decre-
ment
of
I,
reduces
the
index
register each time
it
is
executed for a total
of
1,000 times.
After
1,000 words
have
been
copied,
the
decrement
of
the
TIX
will
equal
the
index
register.
No
transfer will
occur
and
the
next
sequential
instruction
(54) will be executed.
Location 100.
The
constant
of
1,000 is
needed
to
load
the
index
register
when
the
instruction
at
loca-
tion
51
is executed.
By
comparing
this
routine,
properly
called a copy
loop,
with
the
routine
explained
before, the
number
of
instructions
needed
to copy 1,000 words
from
tape
has
been
reduced
from 1,001 to
four
instructions
and
one
constant
(through
the
computer's
ability to
count,
modify addresses,
and
test for the
end
of
loop
with
one
instruction) .
By using
the
many
indexing
operations
available
in
the
computer,
an
index
register
may
be
added
to, sub-
tracted from,
and
tested
in
various combinations
so
that
many
desired effects
may
be
accomplished.
1£
more
than
one
index
register is specified
by
the
tag field,
the
procedure
is
the
same except
that
the
contents
of
two
or
more
index
registers
are
combined
and
the
result
is
then
subtracted
from
the
address field
of
the
instruction
being
executed.
The
variable address concept is
expanded
and
in-
cludes a feature called indirect addressing.
Just
as
index
registers
are
addressed by tags,
indirect
address-
ing
is specified
by
the
presence
of
l's
in
positions
12
and
13
of
the
instruction.
This
portion
is
called a
flag.
For
example, assume
that
the
instruction
shown
(Figure 36) is to
be
executed.
Instead
of
subtracting
the
contents
of
location 2054 from
the
contents
of
the
accumulator
register,
the
computer,
because
of
the
operation flag
tag
address
location
2054
Isubtract III 1000
120541
I 11500 I
S
21
35
Figure
36.
Instruction
Format
Central
Processing
Unit
19
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