Intel IXDP465 User manual

Order Number: 305825, Revision: 002
May 2005
Intel®IXDP465 Development
Platform
Quick Start Guide
May 2005

May 2005 Intel®IXDP465 Development Platform AN
2 Order Number: 305825, Revision: 002
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Intel®IXDP465 Development Platform—Contents
AN Intel®IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 3
Contents
1.0 Purpose ..........................................................................................................................................5
2.0 Applicable Documents and Revisions ........................................................................................5
3.0 Known Issues ................................................................................................................................6
4.0 Inspection.......................................................................................................................................6
5.0 Intel®IXDP465 Development Platform Overview........................................................................7
5.1 Emulation with the Intel®IXDP465 Development Platform...................................................8
6.0 Default Switch Settings.................................................................................................................9
7.0 Default Jumper Settings .............................................................................................................12
7.1 Intel®IXDP465 Baseboard Jumpers ..................................................................................12
7.2 Intel®IXP465 Network Processor/DDR Module Jumpers ..................................................15
7.3 Intel®IXPETM465 Ethernet PHY Mezzanine Card Jumpers..............................................17
8.0 LCD Display and LED Indicators................................................................................................18
9.0 Preparing the Platform for Initial Use........................................................................................21
10.0 Starting the Platform...................................................................................................................21
11.0 Operating the Platform................................................................................................................22
12.0 Technical Support .......................................................................................................................22
Figures
1 Photo of IXDP465 Development Platform Setup for Quick Start Operation .................................8
2 Intel®IXDP465 Development Platform Switch Locations...........................................................11
3 Intel®IXDP465 Baseboard Jumper Locations............................................................................14
4 Intel®IXP465 Network Processor/DDR Module Jumper Locations............................................16
5 Intel®IXPETM465 Ethernet PHY Mezzanine Card Jumper Locations.......................................18
6 Intel®IXDP465 Development Platform LED Locations ..............................................................20
7 LCD Display for Wind River* VxWorks* Bootloader ...................................................................22
Tables
1 Reference Documents..................................................................................................................5
2 Fuse Bit Settings for Network Processor Emulation.....................................................................9
3 Intel®IXDP465 Development Platform Switch Descriptions and Default Settings.....................10
4 Intel®IXDP465 Baseboard Jumper Descriptions and Default Settings......................................12
5 Intel®IXP465 Network Processor/DDR Module Jumper Descriptions and Default Settings......15
6 Intel®IXPETM465 Ethernet PHY Mezzanine Card Jumper Descriptions and Default Settings.17
7 Intel®IXDP465 Development Platform LED Descriptions and Default Settings.........................19
8 UART Communications Configuration........................................................................................21

Intel®IXDP465 Development Platform—Contents
May 2005 Intel®IXDP465 Development Platform AN
4 Order Number: 305825, Revision: 002
Revision History
Date Revision Description
May 2005 002
Text updates for this release include:
• Added paragraph about using zoom feature to read PDF
in Section 1.0. (SCR 4282)
• Added references to Intel®IXDP465 Development
Platform Specification Update.
• Added detail to procedure in Section 4.0.
• Added Section 5.1, “Emulation with the Intel®IXDP465
Development Platform” on page 8.
• Clarified default settings for J127 and J128 in Table 4.
(SCR 4280)
• Added info about updating flash memory to Section 11.0.
(SCR 4281)
• Updated Figures 1-6, replacing line art with board photos.
April 2005 001 Initial release of this document.

Quick Start Guide—Intel®IXDP465 Development Platform
AN Intel®IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 5
1.0 Purpose
This document, the Intel®IXDP465 Development Platform Quick Start Guide, contains
instructions for unpacking, inspecting, setting up, and starting the Intel®IXDP465 Development
Platform.
Before the IXDP465 development platform is powered up for the first time, it is very important to
first become familiar with the platform. Therefore, Section 5.0 through Section 8.0 provide the
required information for powering up the platform for first time use. These sections provide the
following information:
•Photo of the IXDP465 development platform setup for Quick Start operation, showing the
location of factory-installed mezzanine modules and location of key interfaces to assist with
connection of console, Ethernet, and power cables.
•Factory default settings of all switches and jumpers, allowing the user to ensure they were not
accidentally changed during transport, or repositioned by a previous platform user.
•Location and definitions of the LCD display and all the platform LEDs, so that they can be
visually monitored for proper power-up and booting.
Instructions for preparing and starting the IXDP465 development platform begin in Section 9.0.
Note: It is highly recommended that a printout of this entire Quick Start Guide is obtained prior to
preparing and powering up the platform for the first time. All tables in this Quick Start Guide
include checkboxes so that items in the printout can be checked off to insure that all platform
switches, jumpers, and LEDs operate in their default state, which will ensure a successful first-time
bootup of the platform.
Use the Zoom feature in Adobe* Reader* to optimize viewing of the figure details contained in this
document, for example, the switch and jumper locations on the IXDP465 development platform.
Note: If any deviations from the factory default settings of this Quick Start Guide are planned, or for
more detailed information about this platform, including design definition of all boards, mezzanine
cards, platform components, optional modules, optional switch and jumper settings, and overall
development capabilities, please see the Intel®IXDP465 Development Platform User’s Guide.
2.0 Applicable Documents and Revisions
The documents referenced below may be obtained online unless noted otherwise.
Table 1. Reference Documents (Sheet 1 of 2)
Title Document
Number Location
Intel®IXDP465 Development Platform User’s Guide 306462 Documentation Web Page†
Intel®IXDP465 Development Platform Specification Update 306509 Intel Representative
Intel®IXDP465 Development Platform Documentation Kit N/A Documentation Web Page†
† This document is available at:
http://www.intel.com/design/network/products/npfamily/docs/ixp4xx.htm
†† This document is available at: http://www.intel.com/design/network/products/npfamily/ixp425swr1.htm

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3.0 Known Issues
Known issues are described in the following documents:
•Silicon errata: Intel®IXP4XX Product Line of Network Processors Specification Update
•Software errata: Intel®IXP400 Software - Software Specification Update
•Platform errata: Intel®IXDP465 Development Platform Specification Update
4.0 Inspection
Before the contents of the box are unpacked, ensure that all precautions are observed prior to
removing Electrostatic Sensitive Device (ESD) assemblies from their protective packaging.
Unpack the contents of the box. After all the components are unpacked, verify that all the items
listed in the packing list are present. The packing list is included in the STOP Readme First
document shipped with the kit. If any item is missing, refer to Section 12.0, “Technical Support”
for instructions.
After verifying all items are present:
•Inspect each item for any visible damage.
•Inspect the cable connectors to ensure that none of the pins are bent or damaged.
•Inspect the overall platform assembly to ensure that all mezzanine cards (modules) are
properly seated. This can be done by first ensuring that all four 5/8 inch standoffs and nuts on
each corner of the mezzanine cards are not loose. If they appear loose either due to shipping or
previous handling, then they need to be re-seated per the following procedure:
a. Remove all four nuts, by hand-turning them in a counter-clockwise direction as viewed
from the top of the assembly.
b. Ensure that all four 5/8 inch standoffs are tight, by hand-turning each of them in a
clockwise direction while the mezzanine card is still plugged in.
Intel®IXP4XX Product Line of Network Processors
Specification Update 306428 Intel Representative
Intel®IXP45X and Intel®IXP46X Product Line of Network
Processors Datasheet 306261 Documentation Web Page†
Intel®IXP45X and Intel®IXP46X Product Line of Network
Processors Developer’s Manual 306262 Documentation Web Page†
Intel®IXP400 Software Release - Software Release Notes N/A Software Web Page††
Intel®IXP400 Software - Software Specification Update 273795 Documentation Web Page†
Intel®IXP400 Software Programmer’s Guide 252539 Documentation Web Page†
Table 1. Reference Documents (Sheet 2 of 2)
Title Document
Number Location
† This document is available at:
http://www.intel.com/design/network/products/npfamily/docs/ixp4xx.htm
†† This document is available at: http://www.intel.com/design/network/products/npfamily/ixp425swr1.htm

Quick Start Guide—Intel®IXDP465 Development Platform
AN Intel®IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 7
c. Re-seat the mezzanine card into the connector by applying finger pressure from one hand
to the top-side of the mezzanine card directly over the connector while applying finger
pressure from your other hand to the bottom-side of the base platform directly under the
connector.
Caution: Make sure that your fingers on both hands do not press against installed
components on the assembly.
d. Verify that the mezzanine card is properly re-seated, by visually confirming there are no
gaps between the connectors and no gaps between the four standoffs and the mezzanine
card.
e. Replace all four nuts, by hand-turning and tightening them in a clockwise direction.
If any item is damaged or missing, refer to Section 12.0, “Technical Support” for instructions.
Note: A set of extra jumpers is included with the kit. These jumpers are not required for default operation
of the platform as described in this manual. The extra jumpers are provided for any deviations from
the factory default settings which may be required to support optional platform configurations.
5.0 Intel®IXDP465 Development Platform Overview
The IXDP465 development platform is used for development with the Intel®IXP46X Product Line
of Network Processors, and consists of:
•one Intel®IXDP465 development platform baseboard
•one Intel®IXP465 Network Processor/DDR module (defaulted to 533 MHz operation)
•one Intel®IXPETM465 MII Ethernet PHY mezzanine card
Both the Intel®IXP465 Network Processor/DDR Module and the Intel®IXPETM465 MII
Ethernet PHY Mezzanine card plug into the baseboard. These three separate card assemblies are
shipped pre-assembled by the factory and should appear per the photo as shown in Figure 1 on
page 8. The IXDP465 development platform also ships with a Intel®PRO/100+ Adapter
(packaged separately).
Figure 1 represents the top side view of IXDP465 development platform setup and shows all key
interfaces and components. This figure should be compared against the platform that was contained
in the box, so that familiarity is gained of all key platform components. The platform should also
be viewed from the back side, to observe all provisions for optional mezzanine cards, but if more
data is required, please see the Intel®IXDP465 Development Platform User’s Guide.
Figure 1 should also be referenced while preparing the platform for initial use per Section 9.0, to
use as a visual aid to validating proper setup of the IXDP465 development platform for Quick Start
operation.

Intel®IXDP465 Development Platform—Quick Start Guide
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5.1 Emulation with the Intel®IXDP465 Development Platform
The Intel®IXDP465 Development Platform can be used for development of products using the
Intel®IXP45X and Intel®IXP46X Product Line of Network Processors. Although the IXDP465
development platform is shipped with a fully-featured Intel®IXP465 Network Processor operating
at 533 MHz, the platform can also be used to develop products that require either an Intel®IXP460
Network Processor or an Intel®IXP455 Network Processor. These processors support subsets of
the IXP465 processor’s features, therefore software can be used to disable certain features on the
IXP465 to emulate the IXP460 and IXP455 processors.
Figure 1. Photo of IXDP465 Development Platform Setup for Quick Start Operation
B4991-02
1
2
3
5
6
4
7
9
10
8
11 13 1412 15
19
18
16
17
21
20
KEY:
1. EthernetPort 0
2. EthernetPHYMezzanine Card in MII-0 NPE B slot
3. EthernetSMII6-pack
4. MII-1 NPE C location(no mezzanine cardinstalled)
5. USB 2.0 HostController
6. USB 1.1 Device Controller
7. Flash Memory
8. DDRIMemory
9. UART1 Cable to PC for WindRiver* VxWorks*
10. UART0 Cable to PC for RedHat* RedBoot*
11. Intel® IXP465Network Processor/DDR Module
12. Intel® IXP465 Network Processor
13. PCI Option Interface
14. EthernetNIC Card plugged into PCIslot0
15. EthernetCable fromNIC to PC
16. Power Switch
17. 4-slot HostPCI backplane
18. Power Supply
19. Voltage Regulators
20. Power Supply Cable Connector
21. LCD Display

Quick Start Guide—Intel®IXDP465 Development Platform
AN Intel®IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 9
Emulation is accomplished by accessing the EXP_UNIT_FUSE_RESET register via software and
writing a 1 to the fuse bit number that corresponds to the feature to be disabled. For a full
description of this register, see the Intel®IXP45X and Intel®IXP46X Product Line of Network
Processors Developer’s Manual.
Table 2 shows the default fuse bit settings for the fully-featured IXP465 network processor. Other
rows in the table show the fuse bit settings which can disable a feature to emulate IXP460 or
IXP455 network processor operation.
6.0 Default Switch Settings
This section describes the factory default settings of all platform switches, to ensure they were not
accidentally changed during transport, or repositioned by a previous user of the platform.
The IXDP465 development platform has all switches located on the top-side of the entire assembly.
Figure 2 on page 11 identifies the exact location of all switches, clustered into two different areas,
one for GPIO LED Switches and one for Expansion Bus Address Strap Switches.
•The GPIO LED Switches (SW1, SW2) allow the choice of connecting any of the 16 GPIO
signals to a LED, which can be useful for development purposes. Each GPIO has a green LED
indicator attached to it, which when illuminated, indicates a “low” state. A switch is placed on
each LED to allow the LED to be disconnected from the GPIO and reduce loading. See
Figure 2 on page 11 for the DIP Switch locations. Although the factory default setting for
these switches is “LED Illuminated,” these 16 switches can be set to other settings if desired.
•The Expansion Bus Address Strap switches (SW3, SW4, SW5) allows the choice of either
floating, or a 1 K pull-down resistor on each of the 24 expansion bus address lines. If set to
floating, then a weak internal pull-up resistor in the IXP465 network processor controls the
strap value. For operation as defined in this guide, ensure that all switches are set as shown in
Figure 2.
All platform switches are summarized in Table 3, which provides a high-level description of each
switch and their factory default settings, all of which must be checked prior to powering up the
platform for the first time.
Table 2. Fuse Bit Settings for Network Processor Emulation
Features of Intel®IXP45X and Intel®IXP46X Product Line of Network Processors
Processor
ECC/1588 PCI NPE-C (crypto) NPE-B (no crypto) NPE-A (WAN) Ethernet C (crypto) Ethernet B (no crypto) UTOPIA HSS/HDLC Hash/AES/DES UDC (USB Device) RCOMP_disable Core speed Core speed RSA Ethernet B [1-3] Ethernet A USB Host UCP (phy_limit[1]) UCP (phy_limit[0])
Intel®IXP465 (533 MHz) 00000000000000000000
Intel®IXP460 (533 MHz) 00001001110000111000
Intel®IXP455 (533 MHz) 10000000000000010000
Fuse Bit Number†232221201918171613109876543210
† Available to software via EXP_UNIT_FUSE_RESET register.

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Table 3. Intel®IXDP465 Development Platform Switch Descriptions and Default Settings
Board Location
(See Figure 2) Ref ID Switch Description Default Settings Quick
Start
Check?
GPIO LED Switches SW1 Select individual LED illumination
settings of all odd GPIO signals All odd GPIO illuminated. Switch in ON position. F
GPIO LED Switches SW2 Select individual LED illumination
settings of all even GPIO signals All even GPIO illuminated. Switch in ON position. F
Expansion Bus
Address Strap
Switches SW3 Select floating or pull down straps
for EX_ADDR[8:1] signals All EX_ADDR floating. Switch in OFF position. F
Expansion Bus
Address Strap
Switches SW4 Select floating or pull down straps
for EX_ADDR[16:9] signals All EX_ADDR floating. Switch in OFF position. F
Expansion Bus
Address Strap
Switches SW5 Select floating or pull down straps
for EX_ADDR[24:17] signals All EX_ADDR floating. Switch in OFF position. F

Quick Start Guide—Intel®IXDP465 Development Platform
AN Intel®IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 11
Figure 2. Intel®IXDP465 Development Platform Switch Locations
B5020-01
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
SW3 SW4 SW5
 
  
   
 
  
   
  
  
 
GPIO 15
GPIO 13
GPIO 11
GPIO 9
GPIO 7
GPIO 5
GPIO 3
GPIO 1
GPIO 14
GPIO 12
GPIO 10
GPIO 8
GPIO 6
GPIO 4
GPIO 2
GPIO 0
P34
SW1
R145
SW2
R148

Intel®IXDP465 Development Platform—Quick Start Guide
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7.0 Default Jumper Settings
This section defines the factory default settings for all IXDP465 development platform jumpers, to
ensure they were not accidentally changed during transport, or repositioned by a previous user of
the platform. The jumper settings are discussed in the following sections:
•“Intel®IXDP465 Baseboard Jumpers” on page 12
•“Intel®IXP465 Network Processor/DDR Module Jumpers” on page 15
•“Intel®IXPETM465 Ethernet PHY Mezzanine Card Jumpers” on page 17
Each section contains a jumper summary table which provides a high-level description of each
jumper and their factory default settings, all of which must be checked prior to powering up the
platform for the first time.
7.1 Intel®IXDP465 Baseboard Jumpers
The Intel®IXDP465 baseboard jumpers are located on the top-side of the platform assembly as
shown in Figure 3. This figure illustrates the exact location of these jumpers clustered into three
different detailed views, along with their default settings.
Table 4. Intel®IXDP465 Baseboard Jumper Descriptions and Default Settings (Sheet 1 of 2)
Board Location
(See Figure 3) Ref ID Jumper Description for Installed State Default Settings QuickStart Check?
WRITE JP126 Disables write protection of the I2C
EEPROM device. Installed. F
A24 JP127
EX_ADDR24 jumper used in
conjunction with JP128 to partition and
access the flash device in any of four
sections.
• For RedHat* RedBoot*, install both
JP127 and JP128.
• For Wind River* VxWorks*, install
JP127 only.
Installed. F
A23 JP128
EX_ADDR23 jumper used in
conjunction with JP127 to partition and
access the flash device in any of four
sections.
• For RedHat* RedBoot*, install both
JP127 and JP128.
• For Wind River* VxWorks*, install
JP127 only.
Installed. F
MII/SMII/UTOPIA: SMII JP1 Connects SMII-specific shared NPE
signals to the SMII multi-port PHY Not installed. F
MII/SMII/UTOPIA:
ETH A JP2 Connects ETH A-specific shared NPE signals to the NPE A mezzanine card Installed. F
MII/SMII/UTOPIA:
UTOPIA JP3 ConnectsUTOPIA-specificNPEsignals to the UTOPIA mezzanine card Not installed. F

Quick Start Guide—Intel®IXDP465 Development Platform
AN Intel®IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 13
MII/SMII/UTOPIA:
ETH B JP4 Connects ETH B-specific shared NPE signals to the NPE B mezzanine card Installed. F
MII/SMII/UTOPIA:
ETH C JP65
JP95 Connects ETH C-specific shared NPE
signals to the NPE C mezzanine card Installed.
Installed. F
MII/SMII/UTOPIA JP9
JP11 Connects a 33 MHz signal on both
UTP_OP_CLK and UTP_IP_CLK Not installed.
Not installed. F
Table 4. Intel®IXDP465 Baseboard Jumper Descriptions and Default Settings (Sheet 2 of 2)
Board Location
(See Figure 3) Ref ID Jumper Description for Installed State Default Settings QuickStart Check?

Intel®IXDP465 Development Platform—Quick Start Guide
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Figure 3. Intel®IXDP465 Baseboard Jumper Locations
B5021-01
MII / SMII / UTOPIA
WRITE
UTOPIA
JP3
ETH A
JP2 SMII JP1
ETH C
ETH B
JP4
JP11
JP9
A23
A24 JP128 JP127 JP126
Installed =
NOT Installed =
KEY:

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AN Intel®IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 15
7.2 Intel®IXP465 Network Processor/DDR Module Jumpers
Figure 4 identifies the jumper locations and Table 5 describes the jumper settings for the Intel®
IXP465 Network Processor/DDR module.
Table 5. Intel®IXP465 Network Processor/DDR Module Jumper Descriptions and Default
Settings
Board Location
(See Figure 4) Ref ID Jumper Description for Installed State Default Settings QuickStart Check?
SCL P4 Selects I2C pin, instead of GPIO Shunt 1-2. F
SDA P2 Selects I2C pin, instead of GPIO Shunt 1-2. F
IXP 3.3V JP45 Enables monitoring of +3.3V current Not installed. F
XTAL OUT JP50 Reserved Not installed. F
XTAL IN JP49 Reserved Not installed. F
BYPSSCLK JP41 Connects oscillator to OSC_IN Installed. F
REFCLK JP1 Enables Spreadspectrum clock
reference Not installed. F
SSCLK JP2 Connects Spreadspectrum clock to
OSC_IN Not installed. F
ENSSCLK JP44 Enables Spreadspectrum clock output Not installed. F
IXP COREV JP47 Enables monitoring of +1.3V/+1.4V
current Not installed. F
667 MHz JP48 Enables selection of +1.3V as core voltage, instead of +1.4V as required
for 667 MHz operation Installed. F
IXP 2.5V JP46 Enables monitoring of +2.5V current Not installed. F

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Figure 4. Intel®IXP465 Network Processor/DDR Module Jumper Locations
B5036-01
JP46
IXP 2.5V
667 MHz JP47
IXP COREV
EN SSCLK
SSCLK
REFCLK
BYP SSCLK
(installed by default)
XTAL IN
XTAL OUT
IXP 3.3V
SDA - P2
SCL - P4
GPIO
I2C IXP

Quick Start Guide—Intel®IXDP465 Development Platform
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7.3 Intel®IXPETM465 Ethernet PHY Mezzanine Card Jumpers
Figure 5 identifies the jumper locations and Table 6 describes the jumper settings for the Ethernet
card.
Table 6. Intel®IXPETM465 Ethernet PHY Mezzanine Card Jumper Descriptions and Default
Settings
Board Location
(See Figure 5) Ref ID Jumper Description for Installed State Default Settings QuickStart Check?
GND JP1 GND Not installed. F
GND JP3 GND Not installed. F
A0 JP2 PHY Address A0 for MII-0 NPE-B
Ethernet mezzanine slot Shunt 2-3. F
A1 JP5 PHY Address A1 for MII-0 NPE-B
Ethernet mezzanine slot Shunt 2-3. F
A2 JP6 PHY Address A2 for MII-0 NPE-B
Ethernet mezzanine slot Shunt 2-3. F
A3 JP7 PHY Address A3 for MII-0 NPE-B
Ethernet mezzanine slot Shunt 2-3. F
A4 JP8 PHY Address A4 for MII-0 NPE-B
Ethernet mezzanine slot Shunt 2-3. F
GND JP4 GND Not installed. F

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8.0 LCD Display and LED Indicators
This section provides an overview of the LCD display, and also defines the locations, colors, and
definitions of all LEDs, so that they can be visually monitored for proper power-up and booting.
The IXDP465 development platform provides a 2 x16-digit LCD display that can be used for
software debug. The IXP465 Expansion Data Bus directly drives this display. When booting the
factory-installed boot images for either Wind River* VxWorks* or RedHat* RedBoot*, this LCD
display can be monitored for visual indication of a successful boot, as described in Section 10.0 of
this guide.
The IXDP465 development platform also uses many LEDs scattered throughout the different board
assemblies, each of which provides a different visual indication of status, as summarized in
Table 7. After powering up the platform for the first time, all of the default settings must be
checked to ensure correct operation.
Figure 5. Intel®IXPETM465 Ethernet PHY Mezzanine Card Jumper Locations


  

  











  
 
 !! "# !

Quick Start Guide—Intel®IXDP465 Development Platform
AN Intel®IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 19
Figure 6 on page 20 shows the exact locations for all LEDs on the IXDP465 development platform,
per the descriptions and colors summarized in Table 7.
Table 7. Intel®IXDP465 Development Platform LED Descriptions and Default Settings
Board Location
(See Figure 6) LED Indication when ON Color Default Settings Quick Start Check
Power LED: +12V +12V power is on Green ON F
Power LED: +5V +5V power is on Green ON F
Power LED: -12V -12V power is on Green ON F
Power LED: +3.3V +3.3V power is on Green ON F
Power LED: +1.5V†+1.3V/+1.4V power is on Green ON F
PCI LED: Option PCI operating as option Green OFF F
PCI LED: 66 MHz PCI operating at 66 MHz Green ON F
PCI LED: 33 MHz PCI operating at 33 MHz Green OFF F
PCI LED: Host PCI operating as host Green ON F
CPU Power LED: Reset IXP465 system is in reset Green OFF F
CPU Power LED: 3.3V +3.3V power is applied to IXP465 Green ON F
CPU Power LED: 2.5V +2.5V power is applied to IXP465 Green ON F
CPU Power LED: COREV +1.3V/+1.4V power is applied to IXP465 Green ON F
GPIO LEDs:
GPIO 0 - GPIO 15 GPIO[15:0] driven low Green ON F
GPIO LEDs: Power LED +2.5V power is on Green ON F
FLASH STATUS Flash device is being programmed Yellow OFF F
† Board silkscreen text reads “+1.5V” however, core voltage is actually 1.3/1.4V.

Intel®IXDP465 Development Platform—Quick Start Guide
May 2005 Intel®IXDP465 Development Platform AN
20 Order Number: 305825, Revision: 002
Figure 6. Intel®IXDP465 Development Platform LED Locations
Note: In the Power LED area, the silkscreen text reads “+1.5V” however, core voltage is actually 1.3/1.4V.
B5022-01
  
 
 
  
GPIO 15
GPIO 13
GPIO 11
GPIO 9
GPIO 7
GPIO 5
GPIO 3
GPIO 1
GPIO 14
GPIO 12
GPIO 10
GPIO 8
GPIO 6
GPIO 4
GPIO 2
GPIO 0
P34
SW1
PCI
Option PCI 66 MHz PCI 33 MHz PCI Host
SW2
RESET
3.3V 2.5V
COREV
+12.0V
+5.0V
-12.0V
+3.3V
 
 
+1.5V
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