Intel SL6VU - Celeron 2.40GHz 400MHz 128KB Socket 478... User manual

Intel®Celeron®Processor in the
478-Pin Package
Specification Update
October 2006
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Notice: The Intel®Celeron®Processor in the 478-Pin Package may contain design
defects or errors known as errata which may cause the product to deviate from
published specifications. Current characterized errata are documented in this
Specification Update.
Document Number: 290749-030

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2 Intel®Celeron®Processor in the 478-Pin Package Specification Update
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL®PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL
DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR
WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT,
COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining
applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel®Celeron®Processor in the 478-Pin Package may contain design defects or errors known as errata which may cause the product to
deviate from published specifications. Current characterized errata are available on request.
The Specification Update should be publicly available following the last shipment date for a period of time equal to the specific product’s warranty
period. Hardcopy Specification Updates will be available for one (1) year following End of Life (EOL). Web access will be available for three (3)
years following EOL.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Intel, Celeron Pentium, Intel Xeon, and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United
States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2003–2005, Intel Corporation

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Intel®Celeron®Processor in the 478-Pin Package Specification Update 3
Contents
Revision History..................................................................................................................4
Preface................................................................................................................................6
Summary Tables of Changes .............................................................................................8
General Information ..........................................................................................................14
Component Identification Information...............................................................................15
Errata.................................................................................................................................19
Specification Changes ......................................................................................................46
Specification Clarifications................................................................................................47
Documentation Changes ..................................................................................................50
§

Revision History
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4 Intel®Celeron®Processor in the 478-Pin Package Specification Update
Revision History
Version Description Date
-001 Initial release. May 2002
-002 Added erratum AC35. Added Documentation Changes AC4- AC5.
Updated processor identification information table. June 2002
-003 Added erratum AC37. Added Documentation Changes AC3- AC12. July 2002
-004 Updated with Intel®Celeron®Processor on 0.13 Micron Process and in
the 478-Pin Package. Added erratum AC38. Updated Erratum AC17.
Added Documentation Changes AC3- AC24.
September
2002
-005 Added erratum AC39. Added Documentation Changes AC25- AC32. October 2002
-006 Added Erratum AC40. Added Spec Change V1. Added Documentation
Changes AC1- AC10. Updated processor identification information table. November 2002
-007 Added Erratum AC41. January 2003
-008 Added Erratum AC42. February 2003
-009 Updated Erratum AC41. Added erratum AC43.
Updated processor identification information table March 2003
-010 Added Specification clarification AC1. Updated processor identification
information table. Added Errata AC44 and AC45. May 2003
-011 Updated processor identification information table. Updated Erratum
AC40. June 2003
-012 Updated processor identification information table. Added D1 step
update. June 2003
-013 Added Erratum AC46, AC47 and AC49. Updated processor identification
information table. August 2003
-014 Added Erratum AC49, AC50 and AC51. Updated processor identification
information table. September 2003
-015 Updated Erratum AC51. Updated processor identification information
table. November 2003
-016 Added Errata AC52- AC56. March 2004
-017 Updated Erratum AC16. Added Erratum AC57. April 2004
-018 Removed Errata that were previously called AC54 & AC55. Added Errata
AC56 and AC57. June 2004
-019 Updated Erratum AC11 & added Erratum AC58. August 2004
-020 Added Errata AC59- AC61. September
2004
-021 Added Erratum AC62- AC63 October 2004
-022 Updated processor identification information table. Added Erratum V64 November
2004

Revision History
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Intel®Celeron®Processor in the 478-Pin Package Specification Update 5
Version Description Date
-023 Added Erratum AC65 December
2004
-024 •Added specification clarification AC1. April 2005
-025 •Changed the Errata ID tag from “V” to “AC”. Updated Summary table of
changes. Updated Microcode Update Guide and .PDB file guide.
Added Erratum AC66.
October 2005
-026 •Updated erratum AC40. January 2006
-027 •Updated document numbers for Software Developers Manuals. March 2006
-028 •Added erratum AC67 and AC68. Updated Summary Table of Changes. April 2006
-029 •Added erratum AC69. Updated Summary Table of Changes. June 2006
-030 •Updated the names of the Software Developer Manuals. Updated
Summary Table of Changes. Updated Links. October 2006

Preface
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6 Intel®Celeron®Processor in the 478-Pin Package Specification Update
Preface
This document is an update to the specifications contained in the documents listed in the
following Affected Documents/Related Documents table. It is a compilation of device and
document errata and specification clarifications and changes, and is intended for hardware system
manufacturers and for software developers of applications, operating system, and tools.
Information types defined in the Nomenclature section of this document are consolidated into this
update document and are no longer published in other documents. This document may also
contain information that has not been previously published.
Affected Documents
Document Title Document Number
Intel®Celeron®Processor in the 478-Pin Package up to 1.80 GHz
Datasheet http://developer.intel.com/design/ celeron/datashts/251748.htm
Intel®Celeron®Processor on 0.13 Micron Process in the 478-Pin
Package http://developer.intel.com/support /processors/celeron/478/
Related Documents
Document Title Document Number
Intel® 64 and IA-32 Intel® Architectures Software Developer's
Manual, Volume 1: Basic Architecture 253665
Intel® 64 and IA-32 Intel® Architectures Software Developer's
Manual, Volume 2A: Instruction Set Reference, A-M 253666
Intel® 64 and IA-32 Intel® Architectures Software Developer's
Manual, Volume 2B: Instruction Set Reference, N-Z 253667
Intel® 64 and IA-32 Intel® Architectures Software Developer's
Manual, Volume 3A: System Programming Guide 253668
Intel® 64 and IA-32 Intel® Architectures Software Developer's
Manual, Volume 3B: System Programming Guide 253669

Preface
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Intel®Celeron®Processor in the 478-Pin Package Specification Update 7
Nomenclature
S-Spec Number is a five-digit code used to identify products. Products are differentiated by their
unique characteristics (e.g., core speed, L2 cache size, package type, etc.) as described in the
processor identification information table. Care should be taken to read all notes associated with
each S-Spec number
Errata are design defects or errors. Errata may cause the Intel®Celeron®processor in the 478-pn
package behavior to deviate from published specifications. Hardware and software designed to be
used with any given stepping must assume that all errata documented for that stepping are present
on all devices.
Specification Changes are modifications to the current published specifications. These changes
will be incorporated in the next release of the specifications.
Specification Clarifications describe a specification in greater detail or further highlight a
specification’s impact to a complex design situation. These clarifications will be incorporated in
the next release of the specifications.
Documentation Changes include typos, errors, or omissions from the current published
specifications. These changes will be incorporated in the next release of the specifications.

Summary Tables of Changes
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8 Intel®Celeron®Processor in the 478-Pin Package Specification Update
Summary Tables of Changes
The following table indicates the Specification Changes, Errata, Specification Clarifications, or
Documentation Changes that apply to the listed component steppings. Intel intends to fix some of
the errata in a future stepping of the component, and to account for the other outstanding issues
through documentation or Specification Changes as noted. This table uses the following
notations:
Codes Used in Summary Table
Stepping
X: Erratum, Specification Change or Clarification that applies
to this stepping.
(No mark) or (Blank Box): This erratum is fixed in listed stepping or specification
change does not apply to listed stepping.
Status
Doc: Document change or update that will be implemented.
PlanFix: This erratum may be fixed in a future stepping of the
product.
Fixed: This erratum has been previously fixed.
NoFix: There are no plans to fix this erratum.
PKG: This column refers to errata on the Celeron processor in
the 478-pin package substrate
AP: APIC related erratum.
Shaded: This item is either new or modified from the previous
version of the document.

Summary Tables of Changes
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Intel®Celeron®Processor in the 478-Pin Package Specification Update 9
Note: Each Specification Update item is prefixed with a capital letter to distinguish the product. The key
below details the letters that are used in Intel’s microprocessor Specification Updates:
A = Dual-Core Intel® Xeon® processor 7000 sequence
B = Mobile Intel ® Pentium ® II processor
C = Intel ® Celeron ® processor
E = Intel ® Pentium ® III processor
F = Intel® Pentium® processor Extreme Edition and Intel® Pentium® D processor
G = Intel ® Pentium ® III Xeon™ processor
H = Mobile Intel ® Celeron ® processor at 466/433/400/366/333/300 and 266 MHz
J = 64-bit Intel® Xeon™ processor MP with 1MB L2 Cache
K = Mobile Intel ® Pentium ® III processor
L = Intel ® Celeron ® D processor
M = Mobile Intel ® Celeron ® processor
N = Intel ® Pentium ® 4 processor
O = Intel ® Xeon™ processor MP
P = Intel ® Xeon™ processor
Q = Mobile Intel®Pentium®4 processor supporting Hyper-Threading Technology on 90-
nm process technology
R = Intel® Pentium® 4 processor on 90 nm process
S = 64-bit Intel® Xeon™ processor with 800 MHz system bus (1 MB and 2 MB L2
cache versions)
T = Mobile Intel® Pentium® 4 processor-M
V = Mobile Intel® Celeron® processor on .13 Micron Process in Micro-FCPGA
Package
W= Intel® Celeron® M processor
X = Intel®Pentium®M processor on 90nm process with 2-MB L2 Cache
Y = Intel® Pentium® M processor
Z = Mobile Intel ® Pentium ® 4 processor with 533 MHz system bus
AA = Intel® Pentium® processor Extreme Edition and Intel® Pentium® D processor on
65nm
AB = Intel®Pentium®4 processor on 65 nm process
AC = Intel®Celeron®processor in 478 Pin Package
AD = Intel® Celeron® D processor on 65nm process
AE = Intel® CoreTM Duo Processor and Intel® CoreTM Solo processor on 65nm process
AF = Dual-Core Intel® Xeon® processor LV
AG = Dual-Core Intel® Xeon® Processor 5100 Series
AH = Intel® Core™2 Duo mobile processor
AI = Intel® Core™2 Extreme Processor X6800Δand Intel® Core™2 Duo Desktop
Processor E6000ΔSequence
AL = Dual-Core Intel® Xeon® Processor 7100 Series
NO. E0 nC1 nD1 Plans ERRATA
AC1 X X X NoFix
I/O restart in SMM may fail after simultaneous machine check
exception (MCE)
AC2 X X X NoFix
MCA registers may contain invalid information if RESET#
occurs and PWRGOOD is not held asserted

Summary Tables of Changes
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10 Intel®Celeron®Processor in the 478-Pin Package Specification Update
NO. E0 nC1 nD1 Plans ERRATA
AC3 X Fixed
Uncacheable (UC) code in same line as write back (WB) data
may lead to data corruption
AC4 X X X NoFix Transaction is not retried after BINIT#
AC5 X X X NoFix Invalid opcode 0FFFh requires a ModRM byte
AC6 X X X NoFix
FSW may not be completely restored after page fault on
FRSTOR or FLDENV instructions
AC7 X X X NoFix
The processor flags #PF instead of #AC on an unlocked
CMPXCHG8B instruction
AC8 X X X NoFix
When in no-fill mode the memory type of large pages are
incorrectly forced to uncacheable
AC9 X X X NoFix
Processor may hang due to speculative page walks to non-
existent system memory
AC10 X Fixed Writing a performance counter may result in incorrect value
AC11 X X X NoFix IA32_MC0_STATUS register overflow bit not set correctly
AC12 X Fixed
Performance counter may contain incorrect value after being
stopped
AC13 X NoFix
MCA error code field in IA32_MC0_STATUS register may
become out of sync with the rest of the register
AC14 X NoFix
The IA32_MC1_STATUS register may contain incorrect
information for correctable errors
AC15 X X X NoFix Debug mechanisms may not function as expected
AC16 X X X NoFix
Machine check architecture error reporting and recovery may
not work as expected
AC17 X Fixed
Processor may timeout waiting for a device to respond after
~0.67 seconds
AC18 X X X NoFix
Cascading of performance counters does not work correctly
when forced overflow is enabled
AC19 X Fixed
IA32_MC1_STATUS MSR ADDRESS VALID bit may be set
when no valid address is available
AC20 X X X NoFix EMON event counting of x87 loads may not work as expected
AC21 X Fixed
Software controlled clock modulation using a 12.5% or 25%
duty cycle may cause the processor to hang
AC22 X Fixed
SQRTPD and SQRTSD may return QnaN indefinite instead of
negative zero
AC23 X X X PlanFix
Bus Invalidate Line requests that return unexpected data may
result in L1 cache corruption
AC24 X X X PlanFix
Write Combining (WC) load may result in unintended address
on system bus
AC25 X Fixed
Incorrect data may be returned when page tables are in Write
Combining (WC) memory space
AC26 X PlanFix Buffer on resistance may exceed specification
AC27 X X X NoFix
Processor issues inconsistent transaction size attributes for
locked operation