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  9. Kenwood KD-600 User manual

Kenwood KD-600 User manual

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KENWOOD
HI/FI
STEREO
COMPONENTS
KD-600
(KD-650)
NOTE:
KD-600
is
not
provided
with
tonearm,
shell
and
cartridge.
(KD-650)
QUARTZ
PLL
DIRECT
DRIVE
TURNTABLE
CONTENTS
EXTERNAL
VIEW.
0.cc
occ
decsscesesacs
Seca
ie
acetates
tetie
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ds
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3
INTERNAL
VW
ete
cd
nce
dd
iennes
Sestetade
sehen
dand aces
bee
dented
es
cue
tabsaneoauvenwepadee
saath
4
CIRCUIT
DESCRIPTION
ico
vsescssssesie
inna
disa
sees
nds
decciew
gene
Sane
Roce
acea
ie
eee
BLOCK
DIAGRAM
ME
GHANIUS
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scacetcae
testes
thts
Seite
decd
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ea
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ne
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ees
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cosnwciaacs
caias
daveiueee
rea
deeds
ciiaqwinos
coceh
thant
ped
ve
dace
dea
eredomernegened
EXPLODED:
VIEW
a
wskicisincicncg
ed
iadh
cides
ee
nstin corer eater
ccdote
aeves
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adidas
sha
ahieseigue
paatekeereesieae’
EXPLODED
VIEW
PARTS
LIST
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entre
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ees
.
PARTS
(LIST
ic
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DESTINATIONS’
PARTS
LIST...........
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Secdss
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WAVEFORM
OF
CHECK
POINTS
Note:
fry
Component
and
circuitry:
‘are
subject
to
modification’
to
insure
best
operation
under
differing.
local
conditions.
This
manual
is
based
on,
the
U.S.
(K)
standard,
and.
provides
information
on
regional
circuit
modification
through
use
of
alternate
schematic
diagrams,
and
information
on
regional
component
variations
through
use
of
parts
list...”
s
Region
:
Code
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South
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Other
Areas
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Audio.
Clubj.i.
Gis
specie
EXTERNAL
VIEW
Pea
Turntable
cover
(A53-02
13-12)
Hinge
(2)
(J50-03
15-04)
Turntable
sheet*
Turntable
platter
(DO2-002
1-15)
Turntable
case
ass’y*
Insulator
(JO2-03
28-05)
Hinge
(1)
(J50-03
14-05)
Audio
cord
{E30-1333-05)
Power
cord*
*Refer
to
Destinations’
Parts
List.
INTERNAL
VIEW
Hole
cover
plate*
Motor
assy
(T43-0017-05)
Tonearm
ass'y
(J91-01.18-08)
mown
Knob
{1}
(K29-0650-14)
a
Operation
ass’y
sy
-
=.
(D40-0451-05)
ES
ee]
@
KENWOOD,
Ste
Tuitiame
Lock
indicator
ass‘y
(BO8-9208-04})
Power
transformer*
Motor
ass'y
Power
supply
PCB
ass'y*
(T43-0017-05)
Muting
PCB
ass’y
(X25-1400-00)
Control
PCB
ass’y*
Power
switch*
Operation
ass’y
(D40-045
1-05)
Lock
indicator
ass’y
({BO8-9208-04)
*Refer
to
Destinations’
Parts
List.
CIRCUIT
DESCRIPTION
FUNDAMENTAL
THEORY
OF
QUARTZ
PLL-
TURNTABLE
As
the
motor
structure
of
the
KD-600
(650)
is
almost
identical
to
that
of
the
KD-750,
we
will
omit
the
description
of
the
motor
operation
of
the
KD-600
(650)
in
this
manual.
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St-VSLVINS
KD-600
(650)
Speed
Control
Block
Diagram
‘not
covered
in
detail
in
the
manual
for
the
KD-750.
Instead,
we
will
provide
in
this
manual
some
detailed
descriptions
of
the
KD-600
(650)’s
control
circuit
which
was
CIRCUIT
DESCRIPTION
NEGATIVE
FEEDBACK
THEORY
The
following
figure
shows
a
negative
feedback
circuit
constituting
a
closed-loop
system.
Where
M
is
a
contro!
object,
8
is
a
feedback
element:
and
A
is
an
amplifier
with
the
gain
of
A.
Vout
Based
on
the
above
figure,
we
obtain
the
following
formu-
la:
Vout
=
VAxAxM
Vin:
input
voltage
VA:
amplifier
input
voltage
Vout:
output
voltage
VA
is
expressed
as
follows:
VA
=
Vin
—
BVout
Therefore,
the
closed
loop
gain
G1
can
be
written
as:
G1
=
Vout/Vin
VAtAsM/(VA
+
BVASA*M)
=
AeM/(1
+
BA+M)
if
the
amplifier
is
assumed
to
be
an
ideal
amplifier
with
an
infinite
gain,
then
we
obtain:
G1
=
1/6
That
is,
the
closed
loop
gain
is
a
reciprocal
of
8
which
is
always
constant
regardless
of
control
object
M.
The
negative
feedback
is
thus
able
to
suppress
unstable
factors
involved
in
the
control
object
by
using
a
stabie
feedback
element
and
ideal
amplifier.
I
S-V
SERVO
In
conventional
speed
control
systems,
speed-information
feedback
depends
on
a
voltage
proportional
to
the
frequency.
Therefore,
its
closed-loop
characteristic
has
usually
a
poor
linearity
as
shown
in
the
following
figure.
Amplifier
Vref.
Turning
speed
1
FG
servo
Speed
(w)
Lene
rS
SSeS
ess
1
circuit
block
|
Feedback
element
aingram
1/x
FG
servo
input-output
yw
characteristic
Input
(Vref)
Our
KD-750
and
KD-650
(600)
Turntables
employ
not
only
the
S-V
servo
system,
which
is
an
improved
version
of
the
conventional
speed
control
system,
but
also
the
phase-feedback
control
system.
The
S-V
servo
system
uses
a
Speed-Voltage
converter
which
generates
a
voltage
reversely
proportional
to
the
motor’s
turning
speed
and
provides
an
ideaily
linear
input-output
characteristic.
Speed
(w)
—_——w
Input
(Vref)
S-V
Servo
Input-output
Characteristic
PLL
The
PLL,
a
kind
of
phase
feedback
circuit,
contro!s
the
Output
phase
of
the
voltage-controlled
oscillator
located
within
the
closed
loop
to
coincide
with
the
phase
of
the
reference
frequency.
The
following
figure
shows
a
basic
block
diagram
of
the
PLL:
This
filter
passes
only
the
frequency
close
to
the
VCO
frequency.
If
there
is
any
phase
difference,
a
voltage
is
generated.
input
signal
Phase
;
Z
comparator
Low
pass
filter
fs
(P.C.)
(L.P.F.}
Voltage
controlled
oscillator
Vco
PLL
Basic
Configuration
In
the
above
figure,
the
phase
comparator
generates
a
voltage
corresponding
to
the
phase
difference
between
the
input
signal
and
the
VCO
(Voitage-Controlled
Oscillator)
Output.
There
are
an
analog
and
digital
phase
comparator
now
available.
It
is
sometimes
called
a
phase
detector.
The
voltage-controlled
oscillator
oscillates
a
frequency
proportio-
nal
to
the
input
voltage.
Its
output
is
coupled
to
the
phase
comparator
to
constitute
a
PLL
feedback
loop.
The
low
pass
filter
(LPF)
in
the
loop
suppresses
harmonic
components
and
noises
contained
in
the
phase
comparator
output.
The
response
and
synchronisation
characteristic
of
the
PLL
largely
depend
on
this
LPF
characteristic.
The
synchronization
process
taking
place
in
the
PLL
loop
consists
of
two
stages:
frequency
pull-in
process
(in
which
the
VCO
output
frequency
approaches
the
reference
frequency)
and
lock-in
process
(in
which
the
VCO
output
is
locked
to
the
reference
frequency).
:
|
1
:
{
3
j
3
CIRCUIT
DESCRIPTION
FREQUENCY
PULL-IN
PROCESS
When
fs
and
fo
in
the
PLL
basic
block
diagram
are
different
from
each
other
(phase
difference
is
large),
the
phase
detector
operates
as
a
mixer
because
of
its
non-linear
characteristic,
and
generates
a
beat
signal
equivalent
to
the
frequency
difference.
If
this
beat
frequency
is
below
the
specific
value
inherent
to
the
PLL
loop
characteristic,
the
VCO
output
frequency
approaches
to
the
reference
frequency
until
finally
the
former
is
locked
to
the
fatter.
However,
if
the
frequency
difference
is
too
large,
the
VCO
output
is
not
synchronized
with
the
reference
frequency
by
repeating
approach
to
and
departure
from
the
reference
frequency.
The
following
figure
illustrates
the
PLL
synchronization
process
viewed
from
the
phase
comparator
output.
DC
voltage
of
PD
Phase
difference
'
'
i}
4
'
i
i
'
Lock-in
'
Pull-in
Phase
Output
in
PLL
Synchronization
Process
LOCK-IN
PROCESS
The
frequency
difference
reduced
in
the
pull-in
process
is
further
reduced
in
the
lock-in
process
until
the
PLL
can
completely
respond
to
the
beat
frequency
and
finally
the
VCO
.
output
is
synchronized
with
the
reference
frequency.
LOCK
RANGE
AND
CAPTURE
RANGE
The
PLL
voltage-frequency
conversion
characteristic
(a)
shown
in
the
following
figure
indicates
the
case
where
input
frequency
fs
is
higher
than
reference
frequency
fo.
The
foop
does
not
responds
until
input
frequency
fs
reaches
f1.
However,
when
fs
reaches
f1,
the
loop
is
suddenly
locked
to
fs
and
generates
a
negative
difference
voltage
Vdf1
which
va-
ries
proportional
to
the
reciprocal
of
conversion
gain
ko
(V/-
rad)
of
the
VCO
as
the
frequency
increases.
And
when
fs
is
equal
to
fo,
when
fs
reaches
f2
via
Vdo,
Vd
rapidly
returns
to
zero,
thus
releasing
the
lock.
It
is
this
frequency
f2
that
is
the
upper
limit
of
the
lock
range.
Vd
Oo
Out
of
lock
Out
of
lock
<a:
as
input
frequency
fs
is
increased
.....
>
Out
of
lock
<b:
as
input
frequency
fs
is
decreased
.....
>
From
the
above
figure,
the
capture
range
and
lock
range
are
expressed
as
follows:
Capture
range:
f3
—
f1
=
2afc
Lock
range:
f2
—
f4
=
2aft
From
the
above
descriptions,
it
may
be
concluded
that
the
PLL
responds
only
to
the
frequencies
apart
from
+afL
or
Afc
from
the
VCO
output
frequency
fo,
and
when
it
responds,
the
PLL
ts
locked
in.
4
|
:
;
:
a
a
a
NB
FN
i
A
a
tle
ci
ek
ns
i
es
at
CIRCUIT
DESCRIPTION
QUARTZ
LOCK
PLL
QUARTZ
Block
Diagram
for
Quartz
Lock
PLL.
From
the
above
figure,
it
is
known
that
the
control
circuit
is
Composed
of
three
basic
closed
loops:
the
inner-most
constant
current
loop
constituting
the
motor
driver
section,
the
outer
S-V
converter
closed
loop
to
control
turning
speed,
and
the
outer-most
phase-comparator
closed
loop
to
control
phase.
The
quartz
crystal
controlled
oscillator
oscillating
the
reference
frequency
for
the
phase
comparator
provides
a
higher
precision
motor
control.
OPERATION
CONTROL
SECTION
When
turntable
operations,
such
as
start,
stop
and
speed
change,
operating
mechanisms
in
conventional
turntables
have
given
undesirable
vibrations
to
the
turntable.
In
order
to
eliminate
such
unnecessary
vibrations,
the
KD600
(650)
Turntable
has
incorporated
“touch”
switches
into
its
Operating
section.
The
following
diagrams
cover
some
technical
descriptions
for
an
integrated
circuit
(IC)
designed
to
aid
the
touch
switch
operation.
The
SAS-560S,
a
monolithic
IC
designed
to
aid
the
touch
switch
operation,
requires
only
a
very
small
operating
.cur-
rent.
lt
has
four
independent
inputs,
and
two
outputs
cor-
responding
to
each
input.
The
following
table
shows
the
pin
configuration
of
the
SAS-560S.
Channel
Application
STOP
45
rpm
33
rpm
Pin
numbers
enclosed
in
a
circle
indicate
those
for
turning-speed
display
output.
SAS-560S
IC
Pin
Configuration
TOUCH
SENSOR
(SAS-560S)
This
IC
includes
4
control
circuits
as
shown
in
the
diagram
below.
(Refer
to
page
18.)
The
point
14
is
the
sensor
input
which
is
normally
biased
by
+B
through
560
kQ,
turning
Q202,
A203,
0206,
Q207,
Q210-Q215,
Q208
and
0208
to
OFF
and
0204
and
Q205
to
ON,
so
no
voltage
is
present
at
the
points
13
and
4.
By
touching
the
sensor
input
14,
a
current
flows
through
4.7
MQ,
turning
Q202
to
ON
which,
in
turn,
turns
Q204
and
Q205
to
OFF
and
Q206,
0207,
Q210-Q215,
Q208
and
Q209
to
ON,
so
that
an
output
voltage
is
developed
at
the
point
13
and
4.
By
releasing
the
sensor
input
14,
Q202
and
Q203
turn
to
OFF
and
Q204
and
0205
turn
to
ON;
Q206
also
turns
to
OFF,
while
Q207
is
locked
in
ON
state
by
Q208
and
Q209
(a
positive
feedback
loop
is
formed
by
Q207,
Q208
and
Q209).
Since
Q210-Q215
remain
ON,
the
output
voltage
ts
still
present
at
the
points
13
and
4
when
the
sensor
input
is
released.
These
circuits
can
be
unlocked
by
increasing
the
voltage
at
the
point
2.
Q206,
Q207,
Q106,
Q107,
Q306,
Q307,
0406
and
Q407
each
are
connected
to
a
common
emitter
with
an
ex-
ternal
load
resistor,
so
when
any
one
of
the
4
circuits
is
lock-
ed,
the
remaining
circuits
are
unlocked
because
the
voltage
at
the
point
2
is
increased.
There
are
no
possibilities
of
locking
more
than
one
Circuit
at
the
same
time
(see
the
circuit
diagram
of
SAS5608S,
P18).
When
the
power
is
ON,
the
output
voltage
is
first
developed
at
the
points
6
and
9
since
Q507
and
Q508
are
momentarily
turned
ON
through
the
circuit
Q504-Q508
which
functions
as
a
start
switch.
As
the
emitter
of
Q508
is
connected
to
the
base
of
Q408,
0408
turns
ON
which,
in
turn,
locks
Q407,
0408
and
Q409
in
ON
state.
CIRCUIT
DESCRIPTION
13
indicator
output
+8
©
4
output
Channel-1
in
the
IC
incorporates
a
power-set
(initializing)
of
pin-5
and
pin-6
are
used
for
turning-speed
selection
sig-
circuit
which
resets
the
entire
turntable
mode
into
the
STOP
nal.
Outputs
pin-9
and
pin-11
are
coupled
to
transistors
mode
when
the
power
of
the
turntable
is
turned
on.
The
Q15
and
Q16
respectively
which
drive
turning-speed
output
of
pin-9
is
used
for
stop-operation
signal,
while
those
indicator
LEDs.
At
45
rpm,
the
LED
(45)
lights
with
Q16
turned
OFF
and
Q15
turned
ON.
Set
to
“H”
in
the
STOP
mode.
At
45
rpm,
this
output
is
set
to
"H”.
At
33
rpm,
this
output
is
set
to
“H”.
None
of
the
LEDs
for
45
and
33
rpm
lights
with
Q15
turned
OFF.
At
33
rpm,
the
LED
(33)
lights
with
both
Q15
and
Q16
turned
ON.
~t-----
------}
Turning-speed
Indicator
LED
Drive
Circuit
SPEED-MONITORING
CIRCUIT
To
brake
monitor
Set
to
“H”
in
the
STOP
mode
or
at
45
rpm.
Set
to
"L”
at
the
correct
turning
speed.
As
the
turning
speed
decreases,
the
output
voltage
goes
higher;
as
the
turning
speed
To
power
indicator
increases,
the
voltage
goes
lower.
To
lock
indicator
|
CIRCUIT.
DESCRIPTION
The
Speed-Monitoring
circuit
monitors
motor
rotation
for
correct
turning
speed.
The
outputs
of
the
circuit
become
the
control
signals
for
the
power
indicator,
lock
indicator,
and
brake-monitor
circuit.
Pin-8
of
IC8
accepts
the
voltage
from
IC1
and
the
FG
signal,
which
is
S-V
converted
and
passed
through
a
low-pass
filter,
proportional
to
motor
rotation.
IC8
is
an
analog
level
comparator,
i.e.
an
A/D
converter,
of
which
logical
output
pins
2,
3
and
4
are
connected
to
each
logic
circuit.
The
input/output
characteristics
of
the
5-step
analog
level
comparator
is
shown
in
the
following
table:
Analog
Input
Motor
Rotation
Terminal
8
:
Turning
speed
too
high
<200mvV
Correct
turning
speed
200
~
400mV
400
~
600mV
600
~
800mV
Turning
speed
800
~
1000mV
age
low
Lock
indicator}
Power
indi-
cator
No
connec-
Output
Applica-
tion
*
Turning
speed
of
less
than
0.144
rps
(brake
signal
is
released)
Input/Output
Characteristics
of
the
5-step
Analog
Level
Comparator
The
input,
pin-8,
of
the
analog
comparator
is
adjusted
with
trimming
potentiometer
VR1
and
2
so
that
the
output,
pin-4,
is
“'H”’
with
the
correct
turning
speed
and
that
is
’L”
with
less
0.144
rps.
Together
with
this
input
voltage
adjustment,
brake
turn-off
timing
(to
eliminate
the
brake
control
signal)
is
also
adjusted.
(Refer
to
the
“Brake
Monitor
Circuit’’.)
LOCK
INDICATOR
CIRCUIT
The
Lock
Indicator
circuit
drives
the
lock
indicator
lamp
when
the
motor
is
locked
to
the
correct
turning
speed
with
the
constant
phase
difference.
The
circuit
requires
four
different
input
signals
to
drive
the
indicator
as
illustrated
-below:
10
Set
to
“L"
at
the
correct
Lock
turning
speed.
From
the
level
comparator
When
the
motor
is
turning
at
the
correct
turning
speed,
inputs
A
and
B
in
the
above
figure
are
set
to
“L”
and
“H"
respectively.
Pin-9
of
IC3
set
to
’L’.
Meanwhile,
pin-8
of
IC3
accepts
a
square
wave
and
the
square
wave
causes
the
output
level
of
pin-10
to
repeat
’H”
and
“‘L”’
alternately.
As
a
result,
the
lock
indicator
lamp,
driven
by
transistor
Q18,
is
“dynamically”
lit.
Actually
the
lamp
blinks,
but
the
blinking
periode
is
so
rapid
and
the
illuminance
level
is
so
constant
that
it
appears
as
if
the
lamp
constantly
lights.
Now
let
us
think
of
the
input
signal
to
pin-8
of
IC3.
When
the
motor
starts
turning,
an
FG
signal
is
applied
to
the
clock
input
of
IC5,
and
a
signal
S-V
converted
from
the
FG
signal
is
applied
to
its
reset
terminal
via
Q11
and
inverter
IC7.
Then
the
O
output
of
1C5
is
connected
to
pin-8
of
IC3.
The
clock
input
of
IC5
accepts
a
square
wave
while
its
reset
terminal
accepts
a
pulse
signal
as
shown
in
the
following
timing
chart:
Input
JH
Input
K
H
L
.
H
Clock
input
L
Reset
terminal
:
|
H
4
;
-
:
3
‘
e
a
L
Constant
Integrated
value
period.
Output
O
*
When
both
the
J
and
K
inputs
are
pulled
up
to
““H”
level,
every
clock
input
triggers
the
output
into
the
reverse
state.
Output
O
of
IC5
is
connected
to
pin-2
of
IC3.
As
a
result,
an
inverted
square
wave
is
obtained
on
output
pin-3
of
IC3
since
the
other
input
pin-1
of
IC3
is
always
set
to
“’L”
in
the
PLAY
mode.
Pin-8
of
IC3
accepts
the
square
wave
via
inverter
[C7
and
its
output
pin-10
repeats
‘"H”
and
‘’L”
alter-
nately
as
described
previously.
The
following
figure
illustrates
what
happens
if
the
FG
sig-
nal
has
an
trreguiar
period:
Lamp
drive
voltage
Integrated
value
(@)
FG
signal
(implies
irregular
motor
rotation)
Reset
pulse
(with
constant
period)
Q
output
waveform
Since
the
period
of
reset
pulse
is
not
regular,
the
lock
indicator
appears
to
be
blinking
(jock
is
“out’’).
©8680
Lock
Indicator
Operation
with
Irregular
FG
Signal