Lauterbach dsPIC33 User manual

MANUAL
Release 02.2022
dsPIC33 Debugger

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dsPIC33 Debugger
TRACE32 Online Help
TRACE32 Directory
TRACE32 Index
TRACE32 Documents ...................................................................................................................... 
ICD In-Circuit Debugger ................................................................................................................ 
Processor Architecture Manuals .............................................................................................. 
dsPIC33 .................................................................................................................................... 
dsPIC33 Debugger ............................................................................................................... 1
History ................................................................................................................................ 4
Warning .............................................................................................................................. 5
Introduction ....................................................................................................................... 6
Brief Overview of Documents for New Users 6
Demo and Start-up Scripts 7
Configuration ..................................................................................................................... 8
System Overview 8
Quick Start ......................................................................................................................... 9
Start a New Debug Session 9
Programming a Productive Application Binary 10
Troubleshooting ................................................................................................................ 12
FAQ ..................................................................................................................................... 13
dsPIC33 Specific Implementations .................................................................................. 14
dsPIC33 Debug Monitor 14
Breakpoints 14
Software Breakpoints 14
On-chip Breakpoints for Instructions 15
On-chip Breakpoints for Data 15
Memory Classes 16
Programming the On-chip FLASH of the dsPIC33 17
Special Hints, Restrictions, and Known Problems 17
Special Hints 17
Restrictions 17
Known Problems 17
CPU specific SYStem Settings ......................................................................................... 18
SYStem.CLockPrescaler Select the prescaler for the debug clock 18

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SYStem.CONFIG.state Display target confguration 18
SYStem.CONFIG Configure debugger according to target topology 19
<parameters> describing the “DebugPort” 19
System.CPU Select the used CPU 20
SYStem.LOCK Tristate the debug port 20
SYStem.MemAccess Real-time memory access (non-intrusive) 21
SYStem.Mode Establish the communication with the target 22
SYStem.Option Special setup 23
SYStem.Option.BReakonWDT Enable break on watchdog time-out 23
SYStem.Option.CLockSWitch Enable clock group switch 23
SYStem.Option.ENableWDT Enable watchdog timer 23
SYStem.Option.FastRC Use FRC as debug port clock 24
SYStem.Option.FreezePer Freeze peripherals on break or breakpoint 24
SYStem.Option.IMASKASM Disable interrupts while single stepping 24
SYStem.Option.IMASKHLL Disable interrupts while HLL single stepping 25
SYStem.Option.PARTitionconfig Configure the Flash partitions 25
SYStem.Option.PoWeRSaVe Enable PWRSAV instruction 25
SYStem.state Display SYStem.state window 26
CPU specific TrOnchip Commands .................................................................................27
Target Adaption ................................................................................................................. 28
Probe Cables 28
Connector Type and Pinout 28

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dsPIC33 Debugger
Version 09-Mar-2022
History
01-Jan-21 Added support for dsPIC33E family.
04-May-20 Supplemented section “Start a New Debug Session” with description of implemented feature
SYStem.DETECT.CPU.
20-Feb-20 New command: SYStem.Mode Prepare.
New section “Programming a Productive Application Binary”.

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Warning
WARNING: To prevent debugger and target from damage it is recommended to connect or
disconnect the debug cable only while the target power is OFF.
Recommendation for the software start:
1. Disconnect the debug cable from the target while the target power is
off.
2. Connect the host system, the TRACE32 hardware and the debug
cable.
3. Power ON the TRACE32 hardware.
4. Start the TRACE32 software to load the debugger firmware.
5. Connect the debug cable to the target.
6. Switch the target power ON.
7. Configure your debugger e.g. via a start-up script.
Power down:
1. Switch off the target power.
2. Disconnect the debug cable from the target.
3. Close the TRACE32 software.
4. Power OFF the TRACE32 hardware.

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Introduction
This manual serves as a guideline for debugging dsPIC33C/E cores and describes all processor-specific
TRACE32 settings and features.
Please keep in mind that only the Processor Architecture Manual (the document you are reading at the
moment) is CPU specific, while all other parts of the online help are generic for all CPUs supported by
Lauterbach. So if there are questions related to the CPU, the Processor Architecture Manual should be your
first choice.
Brief Overview of Documents for New Users
Architecture-independent information:
•“Training - Debugger Basics” (training_debugger.pdf): Get familiar with the basic features of a
TRACE32 debugger.
•“T32Start” (app_t32start.pdf): T32Start assists you in starting TRACE32 PowerView instances
for different configurations of the debugger. T32Start is only available for Windows.
•“General Commands” (general_ref_<x>.pdf): Alphabetic list of debug commands.
Architecture-specific information:
•“Processor Architecture Manuals”: These manuals describe commands that are specific for the
processor architecture supported by your debug cable. To access the manual for your processor
architecture, proceed as follows:
- Choose Help menu > Processor Architecture Manual.
• To get started with the most important manuals, use the Welcome to TRACE32! dialog
(WELCOME.view):

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Demo and Start-up Scripts
To search for PRACTICE scripts, do one of the following in TRACE32 PowerView:
• Type at the command line: WELCOME.SCRIPTS
• or choose File menu > Search for Script.
You can now search the demo folder and its subdirectories for PRACTICE start-up scripts
(*.cmm) and other demo software:
You can also inspect the demo folder manually in the system directory of TRACE32.
The ~~/demo/pic/ folder contains:
flash/ Scripts for target based programming and example declarations for
internal flash.
hardware/ Ready-to-run debugging and flash programming demos for
evaluation boards. Recommended for getting started!

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Configuration
System Overview
Example configuration for a single core debugger.
Please consider the tips given in the chapter “Connector Type and Pinout”, page 26.

POWER DEBUG USB INTERFACE / USB 3
POWER DEBUG INTERFACE / USB 3
PC or
Workstation
USB
Cable
Target
Debug
Connector
Debug Cable

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Quick Start
Start a New Debug Session
Starting up the debugger is done as follows:
1. Select the device prompt B (BDM debugger) and reset TRACE32.
The device prompt B:: is normally already selected in the TRACE32 command line. If this is not the
case, enter B:: to set the correct device prompt. The RESet command is only necessary if you do
not start directly after booting the TRACE32 development tool.
2. Specify the CPU specific settings.
This command selects the CPU type. In case the exact type of CPU is not known, the command
SYStem.DETECT.CPU can be used to detect the connected target.
3. Reset the target and enter debug mode.
This command resets the CPU on the target, enables On-Chip-Debug Mode and halts at address
0x0.The CPU stops executing any instruction, and the user is able to download and test the code.
After this command is executed, it is possible to access memory and registers.
If this command results in an error, the target might not be prepared for debugging with TRACE32. In
this case use following command to prepare the target before entering the debug mode.
If the CPU DSPIC33XXXX is selected, TRACE32 tries to detect the CPU type of the connected target
before the system is brought up.
4. Load the program into the program memory.
B::
RESet
SYStem.CPU DSPIC33CH128MP508
SYStem.Mode Up
FLASH.UNSECUREerase
DO ~~/demo/pic/flash/dspic33cxxxx.cmm

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A typical start sequence of the PIC is shown below. This sequence can be written to a PRACTICE script file
(*.cmm, ASCII format) and executed with the command DO <file>.
*) These commands open windows on the screen. The window position can be specified with the WinPOS
command.
Programming a Productive Application Binary
To write an application where the debug access is disabled to the program memory, a different approach
must be used.
1. Select the device prompt B (BDM debugger) and reset TRACE32.
B:: ; Select the ICD device prompt
RESet ; Reset the TRACE32 software
WinCLEAR ; Clear all windows
SYStem.Up ; Reset the target and enter debug mode
DO
~~/demo/pic/flash/<script>.cm
m
; Load the target application with the
; family specific script
; Set the stack pointer to address 8000
PER.view ; Show clearly arranged peripherals
; in window *)
List.Mix ; Open source code window *)
Register.view /SpotLight ; Open register window *)
Frame.view /Locals /Caller ; Open the stack frame with
; local variables *)
Var.Watch %SpotLight flags ast ; Open watch window for variables *)
Break.Set 0x101000 /Program
/Onchip
; Set on-chip breakpoint
; to address 101000
NOTE: Due to the architecture of the dsPIC33 microcontroller, the on-chip breakpoints
halt the target two instructions after the program counter (PC) reached the
address of an on-chip breakpoint. This is called skid.
B::
RESet

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The device prompt B:: is normally already selected in the TRACE32 command line. If this is not the
case, enter B:: to set the correct device prompt. The RESet command is only necessary if you do
not start directly after booting the TRACE32 development tool.
2. Specify the CPU specific settings by selecting the appropriate script and prepare the program
memory
3. Reset the target and enter prepare mode.
This command resets the CPU on the target, and enables program memory access.
4. Write the configuration information first.
The address range given in the Data.LOAD.auto command must be modified to point to the last
flash page of the target which includes the configuration memory space.
5. Write the remaining program memory.
The program binary selected for the Data.LOAD.auto command should be the same as in the
previous step.
6. Reset target
DO ~~/demo/pic/flash/dspic33cxxxx.cmm PREPAREONLY
SYStem.Mode Prepare
FLASH.ReProgram 2.
Data.LOAD.auto * P:0x2B800++0x7FF
FLASH.ReProgram off
FLASH.ReProgram 1.
Data.LOAD.auto *
FLASH.ReProgram off
SYStem.RESet

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Troubleshooting
Error Message Event Reason
Ta r g e t p o we r f a i l SYStem.Mode.Up See below.
No clock signal
detected.
SYStem.Mode.Up See below.
Target processor in
reset
SYStem.Down See below.
The number of
<number> accessed
bytes in memory is not a
multiple of the access
size <size> bytes.
No special event Internal error, please consult your
Lauterbach representative.
Memory address
<address> is not aligned
to access size <size>.
No special event Internal error, please consult your
Lauterbach representative.
Invalid memory access
size: <size> bytes (@
address <address>)
No special event Internal error, please consult your
Lauterbach representative.
Memory access timeout:
Reading from address
<address>
No special event Corrupted debug connection. Check
debug hardware and settings.

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Typically the SYStem.Up command is the first command of a debug session where communication with
target is required. If you receive error messages like “debug port fail” or “debug port time out” while executing
this command, this may have the reasons below. “target processor in reset” is just a follow-up error
message.
• Open the AREA.view window to display all error messages.
• If the target has no power or the debug cable is not connected to the target, this results in the
error message “target power fail”.
• Did you select the correct core type with SYStem.CPU <cpu>?
• There is an issue with the debug interface. Maybe there is the need to set jumpers on the target
to connect the correct signals to the debug connector. The debugger will not work, for example, if
PGEC signal is directly connected to ground on target side.
• The target is in an unrecoverable state. Re-power your target and try again.
• The default debug clock prescaler is too low. In this case try SYStem.CLockPrescaler 0xA0 and
optimize the speed when you got it working.
• The target was not prepared for debugging with TRACE32. In this case try
FLASH.UNSECUREerase.
• There are no pull-down resistors connected to the communication lines. For further information
see the chapter “Connector Type and Pinout”, page 26.
• The core has no clock.
• The core is kept in reset.
• There is a watchdog which needs to be deactivated.
FAQ
Please refer to our Frequently Asked Questions page on the Lauterbach website.

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dsPIC33 Specific Implementations
dsPIC33 Debug Monitor
In order to debug a dsPIC33C/E target, a debug monitor is required. The debug monitor is a software
program which executes on the target whenever the target receives a halt request, e.g. by a breakpoint or a
user initiated break. The debug monitor then communicates with the debugger, which allows access to the
target syste. Therefore, the debug monitor capabilities have a direct influence on the debugger capabilities.
Lauterbach provides debug monitors which are not compatible with the debug tools of other manufacturers.
The debug monitor is designed to support all basic and advanced debug features offered by a certain
dsPIC33 family.
The Lauterbach debug monitors require up to 2.908 Bytes of memory and must be loaded to the address
P:0x800000. This is a separate area in the flash memory and does not affect the space available for user
programs. In general, the debug monitor code must be present in the target memory before the debugger
can be used. To load the suitable Lauterbach debug monitor into the target’s flash memory, the command
FLASH.UNSECUREerase should be used. This command erases the user code memory and configures
the currently used debug port, too.
Breakpoints
Software Breakpoints
The Microchip dsPIC33 architecture does support unlimited software breakpoints. But their usage is not
recommended as setting them will partially rewrite the flash memory and therefore reduces the number of
flash erase cycles. The default breakpoints are On-chip breakpoints.
NOTE: The application loaded for debugging must reserve 80 bytes of data memory
at the address D:0x1000, which must not be modified by the program. This area
is used by the debug monitor to save register data, etc. Modifying the data in
this area might cause the debugger to crash.
Please check if your tools automatically reserve this area while linking the
program binary.

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On-chip Breakpoints for Instructions
Most Microchip dsPIC33 MCUs support a total of up to eight on-chip breakpoint registers which can be used
as program breakpoints to stop and debug the program which executes always in the Flash. When
debugging the slave core of a dsPIC33CH derivative only three breakpoints are available. Please consider
the skid of two assembler instructions when using on-chip breakpoints. That means, the core usually halts
two instructions after the on-chip breakpoint.
On-chip Breakpoints for Data
Data breakpoints are used to analyze the read and write accesses to global variables. The data breakpoints
can be triggered with respect to the data address or access type, i.e. read, write or both, or the data value.
Up to five on-chip breakpoints of dsPIC33 MCUs can be used as data breakpoints. On the slave core of a
dsPIC33CH derivative one data breakpoint is available.
In case of an on-chip data breakpoint, every load and store instruction is checked with respect to the
breakpoint address, access type and the value. The data breakpoints are especially useful to find out when
a global variable is written with a certain value. It is not possible to implement a similar breakpoint in software
without affecting the real-time behavior of the system. Since the load and store instructions work on RAM,
data breakpoints always point to addresses on RAM.
NOTE: One of the on-chip breakpoints of a dsPIC33CH slave core can also be used as
data breakpoint. When debugging other core types, even five data breakpoints
are possible. If data breakpoints are used, the total number of program
breakpoints is reduced.

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Memory Classes
The dsPIC33 architecture is a Harvard-type processor architecture. Therefore, following different memory
access classes are available:
To access a memory class, write the class in front of the address. For example, use D to access the data
memory:
The following examples return different results, since the dsPIC architecture uses the Harvard Architecture.
Access Class Description
DData
PProgram
Data.dump D:0x00
Data.dump D:0x100
Data.dump P:0x100

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Programming the On-chip FLASH of the dsPIC33
The PRACTICE script for programming of the on-chip FLASH of a dsPIC33 can be found in the TRACE32
demo folder ~~/demo/pic/flash/.
For programming the program memory of a dsPIC33E core, the script dspic33epxxx.cmm should be used.
For programming the program memory of a dsPIC33C master core with a single partition, the script
dspic33cxxxx.cmm should be used. For dual partition configurations of a dsPIC33C core, the script
dspic33cxxxx_dual.cmm is suitable. The dspic33chxxxslave.cmm is intended for flashing a dsPIC33CH
slave core.
Please be aware that these are just example scripts. They might need some adaption to fit your MCU.
To debug only the slave core of a dsPIC33CH target, the FLASH of the master core must be programmed at
least with a stub function including the hardware configuration words for the master and slave core.
Afterwards the slave core can be programmed. For further details see the scripts mentioned above.
Additionally, an application can be flashed to the chip’s program memory where the debug ports of the target
are disabled. To do so, the target must be brought to Prepare mode before the binary is written to flash
memory. In this case, the scripts mentioned above will fail.
Special Hints, Restrictions, and Known Problems
Special Hints
• Due to the architecture of the dsPIC33 microcontrollers, the target will always halt two assembler
instructions after an on-chip breakpoint’s address. This can lead to imprecisions when doing HLL
steps.
Restrictions
• The use of SW breakpoints is discouraged as setting them leads to faster reduction of the
target’s number of flash erase cycles.
•Go.Return will stop the target right after the current function is left. Because of the on-chip
breakpoint implementation, the debugger can not stop the target at the function epilog.
Known Problems
• Stack frames not correctly shown when entering library functions.
NOTE: All problems will be fixed in one of the next SW versions without notice!

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CPU specific SYStem Settings
SYStem.CLockPrescaler Select the prescaler for the debug clock
Default: 0x03.
Selects the prescaler for the clock used by the debug port. For a satisfying performance of the debug
communication, this value should only be set to a higher value if the debug communication fails.
SYStem.CONFIG.state Display target confguration
Opens the SYStem.CONFIG.state window, where you can view and modify most of the target
configuration settings. The configuration settings tell the debugger how to communicate with the chip on
the target board and how to access the on-chip debug and trace facilities in order to accomplish the
debugger’s operations.
Alternatively, you can modify the target configuration settings via the TRACE32 command line with the
SYStem.CONFIG commands. Note that the command line provides additional SYStem.CONFIG
commands for settings that are not included in the SYStem.CONFIG.state window.
Format: SYStem.CLockPrescaler <value>
Format: SYStem.CONFIG.state [/<tab>]
<tab>:DebugPort
<tab> Opens the SYStem.CONFIG.state window on the specified tab. For tab
descriptions, see below.
DebugPort
(default)
The DebugPort tab informs the debugger about the debug connector
type and the communication protocol it shall use.
For descriptions of the commands on the DebugPort tab, see
DebugPort.

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SYStem.CONFIG Configure debugger according to target topology
The SYStem.CONFIG commands inform the debugger about the available on-chip debug and trace
components and how to access them.
The SYStem.CONFIG command information shall be provided after the SYStem.CPU command, which
might be a precondition to enter certain SYStem.CONFIG commands, and before you start up the debug
session e.g. by SYStem.Up.
<parameters> describing the “DebugPort”
Format: SYStem.CONFIG <parameter>
<parameter>:
(DebugPort)
DEBUGPORT [DebugCable0 | DebugCableA | DebugCableB]
DEBUGPORTTYPE [SPI]
Slave [ON|OFF]
TriState [ON|OFF]
DEBUGPORT
[DebugCable0 | DebugCa-
bleA | DebugCableB]
It specifies which probe cable shall be used e.g. “DebugCableA” or
“DebugCableB”. At the moment only the CombiProbe allows to
connect more than one probe cable.
Default: depends on detection
DEBUGPORTTYPE
[SPI]
It specifies the used debug port type “SPI”. At the moment only
“SPI” is selectable.
Default: SPI.
Slave [ON | OFF] If several debuggers share the same debug port, all except one
must have this option active.
Default: OFF.
Default: ON if CORE=... >1 in the configuration file (e.g. config.t32).
TriState [ON | OFF] TriState has to be used if several debug cables are connected to a
common debug port.
Default: OFF.

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System.CPU Select the used CPU
Default: DSPIC33XXX.
Selects the processor type. Most of the current Microchip dsPIC33C and dsPIC33E MCU cores are
supported.
SYStem.LOCK Tristate the debug port
Default: OFF
If the system is locked, no access to the debug port will be performed by the debugger. While locked, the
connector of the debugger is tristated. The intention of the SYStem.LOCK command is, for example, to give
debug access to another tool. The process can also be automated, see SYStem.CONFIG TriState
Format: SYStem.CPU <cpu>
<cpu>:DSPIC33CH512MP508 |DSPIC33CK32MP102 |…
Format: SYStem.LOCK [ON |OFF]