LG 42PQ1100 User manual

PLASMA TV
SERVICE MANUAL
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CHASSIS : PD92A
MODEL : 42PQ1100 42PQ1100-ZE
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
P/NO : MFL58138612(0906-REV00) Printed in Korea

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CONTENTS
CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................7
BLOCK DIAGRAM ...................................................................................................................13
EXPLODED VIEW ...................................................................................................................16
SVC. S EET ................................................................................................................................

- 3 - LGE Internal Use OnlyCopyright © 2009 LG Electronics. Inc. All right reserved.
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SAFETY PRECAUTIONS
Many electrical and mechanical parts in this chassis have special sa ety-related characteristics. These parts are identi ied by in the
Schematic Diagram and Exploded View.
It is essential that these special sa ety parts should be replaced with the same components as recommended in this manual to prevent
X-RADIATION, Shock, Fire, or other Hazards.
Do not modi y the original design without permission o manu acturer.
General Guidance
An isolation Transformer should always be used during the
servicing o a receiver whose chassis is not isolated rom the AC
power line. Use a trans ormer o adequate power rating as this
protects the technician rom accidents resulting in personal injury
rom electrical shocks.
It will also protect the receiver and it's components rom being
damaged by accidental shorts o the circuitry that may be
inadvertently introduced during the service operation.
I any use (or Fusible Resistor) in this monitor is blown, replace it
with the speci ied.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away rom PCB.
Keep wires away rom high voltage or high temperature parts.
Due to high vacuum and large sur ace area o picture tube,
extreme care should be used in handling the Picture Tube.
Do not li t the Picture tube by it's Neck.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed rom AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead o ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
I the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be in inite.
An other abnormality exists that must be corrected be ore the
receiver is returned to the customer.
Leakage Current ot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements or each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any measurement is out o the limits speci ied, there is
possibility o shock hazard and the set must be checked and
repaired be ore it is returned to the customer.
Leakage Current ot Check circuit
1.5 Kohm/10W
To Instrument's
exposed 
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
IMPORTANT SAFETY NOTICE
0.15uF

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SPECIFICATIONS
NOTE : Speci ications and others are subject to change without notice or improvement
.
1. Application Range
This spec is applied to the 42/50” PLASMA TV used PD92A Chassis.
2. Specification
Each part is tested as below without special appointment.
1) Temperature : 25±5°C (77±9°F), CST : 40±5
2) Relative Humidity: 65±10%
3) Power Voltage: Standard Input voltage (100-240V~, 50/60Hz)
* Standard Voltage o each product is marked by models.
4) Speci ication and per ormance o each parts are ollowed each drawing and speci ication by part number in accordance with SBOM.
5) The receiver must be operated or about 20 minutes prior to the adjustment.
3. Test Method
1) Per ormance : LGE TV test method ollowed.
2) Demanded other speci ication
Sa ety : CE, IEC speci ication
EMC : CE, IEC
Chassis
PD92A
Albania, Austria, Belgium, Bosnia, Bulgaria, Croatia, Czech, Denmark, Estonia,
Finland France, Germany, Greece, Hungarym Ireland, Italy, Kazekhstan, Latvia,
Lthuania, Luxembourg, Morocco,Netherlands, Norway,
Poland, Portugal Romania, Russia, Sebia, Slovakia, Lovenia, Spain, Sweden,
Swtzerland, Turkey, UK, Ukraine
LG
Market Brand Remark
Sa ety : IEC60065
EMC : EN55013
EN55022
EN55020
EN55024
Albania, Austria, Belgium, Bosnia, Bulgaria, Croatia, Czech, Denmark,
Estonia, Finland France, Germany, Greece, Hungarym Ireland, Italy,
Kazekhstan, Latvia, Lthuania, Luxembourg, Morocco,Netherlands, Norway,
Poland, Portugal Romania, Russia, Sebia, Slovakia, Lovenia, Spain,
Sweden, Swtzerland, Turkey, UK, Ukraine
ApplianceMarket
TEST
Remark

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4. Module Specification
(1) 50”
(2) 42”
Display Screen Device
Aspect Ratio
PDP Module
Operating Environment
Storage Environment
Input Voltage
1
2
3
4
5
6
No Item Speci ication Remark
50 inch Wide Color Display Module
16:9
PDP50XG2####,
RGB Closed Type
1) Temp. : 0 ~ 40deg
2) Humidity : 20 ~ 80%
3) Temp. : -20 ~ 60deg
4) Humidity : 10 ~ 90%
AC100-240V~, 50/60Hz
PDP
LGE SPEC.
Maker LG
Display Screen Device
Aspect Ratio
PDP Module
Operating Environment
Storage Environment
Input Voltage
1
2
3
4
5
6
No Item Speci ication Remark
42 inch Wide Color Display Module
16:9
PDP42XG2####,
RGB Closed Type
1) Temp. : 0 ~ 40deg
2) Humidity : 20 ~ 80%
3) Temp. : -20 ~ 60deg
4) Humidity : 10 ~ 90%
AC100-240V~, 50/60Hz
PDP
LGE SPEC.
Maker LG

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5. Model General Specification
Market
Broadcasting system
Receiving system
Scart Jack(2EA)
Video Input (1EA)
S-Video Input (1EA)
Component Input (1EA)
RGB Input(1EA)
HDMI Input(3EA)
Audio Input (5EA)
Audio Out(1EA)
USB(1EA)
1
2
3
4
5
6
7
8
9
10
11
12
No Item Speci ication Remark
Albania, Austria, Belgium, Bosnia, Bulgaria,
Croatia, Czech, Denmark, Estonia, Finland France,
Germany, Greece, Hungarym Ireland, Italy, Kazekhstan,
Latvia, Lthuania, Luxembourg, Morocco, Netherlands,
Norway, Poland, Portugal Romania, Russia, Sebia,
Slovakia, Slovenia, Spain, Sweden, Swtzerland,
Turkey, UK, Ukraine
1) PAL-BG
2) PAL-DK
3) PAL-I,I’
4) DVB-T (ID TV)
5) SECAM- L/L’
Analog : Upper Heterodyne
Digital : COFDM
PAL, SECAM
PAL, SECAM, NTSC
PAL, SECAM, NTSC
Y/Cb/Cr, Y/Pb/Pr
RGB-PC
HDMI- DTV &SOUND
PC Audio, Component(1EA), AV(3EA)
SPDIF(1EA)
Divx, MP3, JPEG
Analog Only
4 System : PAL, SECAM,NTSC,PAL60
4 System : PAL, SECAM,NTSC,PAL60
L/R Input(PC 1EA, SCART 2EA, SIDE
AV 1EA, Component 1EA)
MP3, JPEG: 42/50PQ3000-ZA
DIVX, MP3, JPEG: 42/50PQ6000-ZA

6. Chroma & Brightness
6.1 WXGA module (42G2,42G2A module,SET With 38%Glass Filter)
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No Item Min Typ Max Unit Remark
*) Peak Brightness Mode
-1/100 white Window pattern
(Typically 1%Window size)
1. White peak 42G2 315 362 - cd/m2-100IRE (255Gray)
brightness -Picture: Vivid (Medium)
-Input: HDMI- PC(1920*1080 60Hz)
*Peak Brightness Condition may Slightly
di erent between sets.
170 189 42G2
161 183 - cd/m242G2A -25/ 100 white Window pattern
- 100% Window White Pattern
2. White average brightness 47 54 - cd/m2- 100IRE(255Gray)
- Picture: Vivid(Medium )
3. Brightness uni ormity -10 0 +10 % - 85IRE(216Gray) 100% Window White Pattern
- Picture: Vivid(Medium)
X 0.270 0.285 0.300
White Y 0.278 0.293 0.308 - White : 85IRE(216Gray)
X 0.635 0.640 - 100% Window White Pattern
4. Color Red Y 0.318 0.330 0.340 - R/G/B : 100IRE(255Gray)
Coordinate X 0.242 0.300 0.305 100% Window White Pattern
Green Y 0.595 0.600 - - Picture: Vivid(Medium )
X - 0.150 0.158 - 100% Window
Blue Y - 0.060 0.070
- 85IRE 100% Window White Pattern
5. Color coordinate uni ormity -0.01 Average +0.01 - Picture: Vivid(Medium)
-1/100 white window pattern(Peak mode)
6. Contrast ratio 42G2 100k:1 1000k:1 -100IRE(255Gray)
at dark room -Picture:Vivid(Medium)
-Input:HDMI-PC (1920*1080 60Hz)
7. Color X 0.261 0.276 0.291
Temperature Cool Y 0.268 0.283 0.298
X 0.270 0.285 0.300 - 85IRE 100% Window White Pattern
Medium Y 0.278 0.293 0.308 - APC : Vivid(Medium)
X 0.298 0.313 0.328
Warm Y 0.314 0.329 0.344

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ADJUSTMENT INSTRUCTION
1. Application Range
This spec sheet is applied all o the PDP TV, PD92A chassis.
2. Specification.
(1) Because this is not a hot chassis, it is not necessary to use
an isolation trans ormer. However, the use o isolation
trans ormer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be per ormed in the circumstance o
25±5°C o temperature and 65±10% o relative humidity i
there is no speci ic designation.
(4) The input voltage o the receiver must keep 100~240V,
50/60Hz.
(5) The receiver must be operated or about 5 minutes prior to
the adjustment when module is in the circumstance o over
15°
- In case o keeping module is in the circumstance o 0°C,
it should be placed in the circumstance o above 15°C or
2 hours
- In case o keeping module is in the circumstance o below
-20°C, it should be placed in the circumstance o above
15°C or 3 hours,.
OA ter RGB Full White in HEAT-RUN Mode, the receiver
must be operated prior to the adjustment.
OEnter into HEAT-RUN MODE
(1) Press the POWER ON KEY on R/C or adjustment.
(2) OSD display and screen display PATTERN MODE.
* Set is activated HEAT run without signal generator in this
mode.
* Single color pattern (WHITE) o HEAT RUN MODE uses to
check panel.
Caution: I you turn on a still screen more than 20 minutes
(Especially digital pattern, cross hatch pattern), an
a ter image may be occur in the black level part o the
screen.
3. PCB assembly adjustment method
Caution: Using ‘power on’ button o the control R/C, power on
TV.
OAuto-control adjustment protocol(RS-232C)
4. Insert Tool OPTION and Model
Name Download
(1) Press IN_START key on R/C to insert Tool OPTION
(2) On the “Tool Option 1”, Insert Tool Option by a number
key
(3) Press the ENTER(V)
(4) Press ENTER(V) again.
(5) Select “OK to Download” by using F/G(VOL +/-) and press
G(VOL +)
Model Name Model Option Value
50PG3000-ZA 4717
42PQ3000-ZA 4461
50PG6000-ZA 8814
42PQ6000-ZA 8558
50PQ2000-ZA 2669
42PQ2000-ZA 2413
50PS3000-ZB 4781
50PS6000-ZC 8878
42PQ1000-ZD 260
42PQ1100-ZE 10500
42PQ1000-ZA 12548
60PS4000-ZA 7085
50PQ1000-ZD 580
50PQ1100-ZE 10820
50PQ1000-ZA 12868
No Item CMD1 CMD2 Data0 Remark
1 Insert ADJ Mode a a 0 0
2 Change INPUT Mode x b 4 0 Component
3 ADC Adj st a d 1 0
4 Change INPUT Mode x b 6 0 RGB
5 Insert Tool Option 1 a b Insert Option Val e on DATA 0
6 Read Tool Option 1 a b f f
7 EDID Download a e 1 0 All=0
8 Read EDID Check s m a e
HDMI 1 : 31
HDMI 2 : 32
HDMI 3 : 33
RGB : 39
Tool Option 4782
Model Name : 50PS1000-ZD
INCH : 50
Tool : PS60
EYE : 1
Media Player : EMF-PMM
HDMI Type : 3-HDMI
XD Plazma : 0
OK to Download
DOWNLOAD : OK
Tool
Tool Option

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5. EDID(The Extended Display
Identification Data) Download
(1) Press the ADJ KEY on R/C and enter EZ ADJUST.
(2) Select “5.EDID D/L” by using D/E(CH +/-) and press
ENTER(V).
(3) Select “Start” and press navigation key(G).
(4) EDID download is executed automatically.
(5) Press EXIT key on R/C
5.1. EDID DATA
1) Analog RGB
ODetail EDID Options are below (ⓐ, ⓑ, ⓒ, ⓓ)
ⓐProduct ID
ⓑWeek, Year
=> Controlled on production line:
ex) Week: ‘03’ -> ‘03’
Year: ‘2006’ -> ‘10’
ⓒModel Name(Hex)
ⓓChecksum: Changeable by total EDID data.
2) HDMI
ODetail EDID Options are below (ⓐ, ⓑ, ⓒ, ⓓ, ⓔ)
ⓐProduct ID
ⓑWeek, Year
=> Controlled on production line:
ex) Week: ‘03’ -> ‘03’
Year: ‘2009’ -> ‘13’
ⓒModel Name(Hex)
ⓓChecksum: Changeable by total EDID data.
ⓔVender ID
* In case o 42/50PQ1000, 1100, HDMI 1 is ONLY applied.
Product ID
MODEL NAME Product ID EX EDID Table
42PQ3000 40433 9DF1 F19D
42PQ6000 40431 9DEF EF9D
50PQ3000 50250 C44A 4AC4
50PQ6000 50248 C448 48C4
42PQ2000 40467 9E13 139E
50PQ2000 50276 C464 64C4
50PS3000 50278 C466 66C4
50PS6000 50280 C468 68C4
60PS4000 50290 C472 72C4
42PQ1000 40473 9E19 199E
42PQ1100 40475 9E1B 1B9E
50PQ1000 50296 C478 78C4
Product ID
MODEL NAME Product ID EX EDID Table
42PQ3000 40433 9DF1 F19D
42PQ6000 40431 9DEF EF9D
50PQ3000 50250 C44A 4AC4
50PQ6000 50248 C448 48C4
42PQ2000 40467 9E13 139E
50PQ2000 50276 C464 64C4
50PS3000 50278 C466 66C4
50PS6000 50280 C468 68C4
60PS4000 50290 C472 72C4
42PQ1000 40473 9E19 199E
42PQ1100 40475 9E1B 1B9E
50PQ1000 50296 C478 78C4

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5.2 Confirmation
1) Press ‘InStart’ Key on Factory SVC Remote Controller, It is
possible to check ADC & EDID ADJ
2) Select “Channel Recovery” and press navigation key(G).
6. SET assembly adjustment method
Caution : Each PCB assembly must be checked by check JIG set.
(Because power PCB Assembly damages to PDP Module,
especially be care ul)
7. POWER PCB Assembly Voltage
Adjustment (Va, Vs voltage Adjustment)
7.1. Test Equipment:D.M.M 1EA
7.2. Connection Diagram for Measuring:
Re er to ig.1
7.3. Adjustment Method
(1) Va adjustment
1) Connect + terminal o D. M.M. to Va pin o P811, connect -
terminal to GND pin o P811.
2) A ter turning VR901,voltage o D.M.M adjustment as same
as Va voltage which on label o panel right/top (deviation;
±0.5V)
(2) Vs adjustment
1) Connect + terminal o D. M..M. to Vs pin o P811, connect
-terminal to GND pin o P811.
2) A ter turning VR951, voltage o D.M.M adjustment as same
as Vs voltage which on label o panel right/top (deviation ;
±0.5V)
8. Download Serial Number (RS-232C)
(1) Press “Power on” key o service R/C.(Baud rate : 115200
bps)
(2) Connect RS232 Signal Cable to RS-232 Jack.
(3) Write Serial number by use RS-232.
(4) Must check the serial number at the Diagnostics o SET
UP menu.
(Re er to below ‘6.SET INFORMATION’).
9. Adjustment of White Balance
9.1. Required Equipment
(1) Remote controller or adjustment
(2) Color Analyzer (CS-1000, CA-100,100+,CA-210 or same
product) : CH 10 (PDP)
[Please adjust CA-210, CA-100+ by CS-1000 be ore
measuring
(3) Auto W/B adjustment instrument(only or Auto adjustment)
(4) 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B
EQUIPMENT.
9.2. AUTO White Balance Process
Be ore Adjust o White Balance, Please press POWER ONLY
key
Adjust Process will start by execute RS232C Command
OColor temperature standards according to CSM and Module
OCS-1000/CA-100+/CA-210(CH 10) White balance
adjustment coordinates and color temperature.
PLASMA Remark
11000K
9300K
6500K
Cool
Medium
Warm
CSM
Color Coordinate
xy
0.283
0.293
0.329
11,000K
9,300K
6,500K
0.002
0.002
0.002
0.276
0.285
0.313
Cool
Medium
Warm
CSM Temp ±Color
Coordinate

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9. 3. Manual W/B Process (using adjusts Remote control)
Please Adjust in AV 1 MODE, Turn o Energy Saving Mode.
(1) Enter “PICTURE RESET” on Picture Mode, then turn o
Fresh Contrast and Fresh colour in Advanced Control
(2) A ter enter Service Mode by pushing “ADJ” key,
(3) Enter White Pattern o o service mode, and change o ->
on.
(4) Enter “W/B ADJUST” by pushing “G” key at “3. W/B
ADJUST”.
(5) Adjust W/B DATA, or all CSM, choose ‘COPY ALL’
[Gain Max Value is 192. So, Never make any Gain Value
over 192 and please ix one Value on 192, between R, G
and B.
9. 4. Auto-control Interface and Directions
(1) Adjust in the place where the in lux o light like loodlight
around is blocked.
(Illumination is less than 10ux).
(2) Measure and adjust a ter sticking the Color Analyzer (CA-
100+, CA210 ) to the side o the module.
(3) Aging time
A ter aging start, keep the Power on (no suspension o
power supply) and heat-run over 5 minutes
9. 5. Auto Adjustment Map(RS232C)
10. Checking the EYE-Q Operation
(1) Press the EYE Key on the adjustment remote controller.
(2) Check the Sensor DATA (It must be under 10) and keep
the data longer than 1.5s
(3) Check ‘OK’
(Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12)
[IF you press IN-STAP Button, change Green Eye-check OSD.
11. Set Information(Serial No & Model name)
11.1. Check the Serial Number & Model Name
(1) Push the menu button in DTV mode.
(2) Check the Serial Number
Select the STATION ==> Diagnostics ==> To set

12. SW Download Guide.
* Put a *.bin to USB Stick and Turn on TV
1. Put the USB Stick to the USB socket
2. Automatically detecting update ile in USB Stick
* I your downloaded program version in USB Stick is Low, it
didn’t work.
But your downloaded version is High, USB data is
automatically detecting.
3. Show the message “Copying iles rom memory”
4. Updating is staring.
5. Updating Completed, The TV will restart automatically.
A ter turn on TV, Please press ‘IN-STOP’ button on ADJ
Remote-control.
* IF you don’t have ADJ R/C, enter ‘Factory Reset’ in OPTION
MENU.
6. When TV turn on, check the Updated version on Diagnostics
MENU.
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Only or training and service purposes

BLOCK DIAGRAM
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Only or training and service purposes
LVDS
LVA_ [0:4]
SC2_L/R_IN
SATURN 4
(IC100)
TAS5709
IC1000
SP (R) SP (L)
P1000
CI Slot
(P800)
EEPROM
I2C_A_TU
KEY1/2
DDR Memory
512Mb (IC301)
SC1_R/G/B
DSUB_R/G/B
PC_L/R_IN
COMP_Y/Pb/Pr
COMP_L/R_IN
DSUB_H/V_SYNC
MAX3232
(IC702)
DDCUART-Tx/Rx
USB_DM/DP
PCM_ADD
PCM_DATA
TS_Parallel
KIC7SZ32FU
(IC802)
PCM_CD_ON
CI_CD_1/2
I2S
MUTE, AMP_RST
P402
LED_G/R & IR
Flash Memory
16MB (IC103)
SC1_CVBS_IN
SC2_CVBS_IN
SC1_TV_VOUT
DTV/MNT_V_OUT
SC1_L/R_IN
TV_L/R_OUT
DTV/MNT_L/R_OUT
PDP
Panel
TS_Serial
RS232C_Tx/Rx
RS232C_Tx/Rx
I2C_D_TU
SPDIF_OUT
DDR Memory
512Mb (IC300)
SPI_SCK SPI_SDI SPI_SD0
SPI_CSN_1
EEPROM
(IC111)
SYSTEM_SCL
SYSTEM_SDA
MDATA[0:16]
MDATA[17:31]
P1100
17V 12V 5V
SIDE_Y, C_IN
SIDE_CVBS_IN
SIDE_L,R_IN
SCL/SDA_SUB/AMP
SCL/SDA_SUB/AMP
HDCP EEPROM
(IC102)
SYSTEM_SCL
SYSTEM_SDA
EEPROM
HDMI_CEC
TDMS
HPD
5V_HDMI_1, 2, 3
EEPROM
EEPROM
DDC_SCL, SDA_1,2,3
DMI_I2C
XC5000
(IC500)
CE365
(IC501)
TV_CVBS+,SIF+
DTV_IF_N,P TS_DATA

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Only or training and service purposes
POWER FLOW DIAGRAM
AUTO_
GND
22
M5V-
ON
21
KEY-
ON
245VST23
SMW200-24C
Waf
er
Vs-
ON
AC
DET
GND GND
5V 5V
GND
12V
GND
17V
20 18 16 14 12 10
8 6 4 2
RL-ON
5V DET
GND GND
5VST
5V
GND
12V
GND
17V1
19 17 15 13 11
9 7 5 3
P1
P_KEYGPIO90
AP2125
3.3VST
Mstar
FET (Q303)
AZ1084S-3.3 AZ1117 -ADJ
3.3V_MST 1.8V_MST
1.3V_VDDC
MP2305DS
AZ1117 -1.2 1.2V_PVSB
VSB IC
DDR
5VST
FET (Q504)
Power_SW
VSB_Ctrl
5V_MST
AVDD_MPLL
VDDP AVDD_MEMPLL AVDD_ADC AVDD_DM AVDD_OTG AVDD_AU AVDD_LPLL AVDD_33
AVDD_DDR 1.3V_VDDC AVDD_MLINK
DDR1.8V
3.3V_PVSB
1.2V_DVDD 3.3V_DVDD 3.3V_AVDD
USB
MIC2019YM6
5V
5V_USB
DMI
switch
12V
KIA7808AF
5V_TU
Tuner
Audio
AMP
DCP
NVRAM
Serial
Flash
17V
EEPROM
(RGB)
MAX3232
EEPROM
( DMI)
L312
L326
L313
L301
L325
IC301
L323
L308 L307 L306 L305
L304
L303 L302 L309
L321 L316
L319 L320
L504
IC302
IC305 IC304
IC804
IC503
IC502
3.3V_AMP_DVDD 3.3V_AMP_AVDD
L1011 L1010
L501 L503
L324
L331
<Mstar Power Seq ence> AZ1117 -ADJ
IC505

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Only or training and service purposes
W Power On Sequence (LGE2872A)

- 16 - LGE Internal Use Only
EXPLODED VIEW
A10
900
901
400
520
590
240
250
300
305
301
303
302 200
120
580
260
270 603 602
501
A2
LV1
570
560
310
330
601 600
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE

- 16 - LGE Internal Use Only
EXPLODED VIEW
A10
900
901
400
520
590
240
250
300
305
301
303
302 200
120
580
260
270 603 602
501
A2
LV1
570
560
310
330
601 600
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE

MS_LRCK
SC1_CVBS_IN
100
R102
0.1uF
C122
SIDE_L_IN
0.1uF C142
4.7K
R107
SIDE_C_IN
1.2KR170
Flash_WP_1
100
R144
MUTE
SCL_EXPANDER
100
R114
100
R110
SPI_SDI
5V_ON
SPI_SCK
AC_DET
KEY2
LED_RED
22KR133
100R185
SC_REC1
100
R115
DSUB_G
TV_L_OUT
22K
R127
DTV/MNT_R_OUT
SC1_FB
DSUB_B
RS232C_TXD
SC2_L_IN
0.1uF
C101
SPI_SCK
DTV/MNT_V_OUT
+3.3V_AVDD_DVI
MS_SCK
1K
R146
LED_RED
100
R168 OPT
0.1uF
C102
100R109
1K
OPT
R145
DISP_EN
1uF
25V
C143
SC1_L_IN
4.7K
R106
SPI_SDI
TV_R_OUT
COMP_Pr
SPDIF_OUT
AUDIO_MASTER_CLK
SC2_CVBS_IN
SPI_SDO
COMP_Y
PC_R_IN
DSUB_VSYNC
SC1_R_IN
SYSTEM_SCL
001:D16;001:V5
VAVS_ON
DSUB_HSYNC IR
100
R192
POWER_ON/OFF1
1K
OPT
R142
SYSTEM_SDA
001:D16;001:V5
KEY1
SPI_CSN_1
SIDE_CVBS_IN
AMP_RST
SC2_R_IN
DSUB_R
Flash_WP_1 MS_LRCH
100
R195
22K
R128
SC2_ID
SPI_SDO
0.01uF
OPT
C152
SDA_D_TU
SCL_D_TU
PC_L_IN 0.01uF
C150
100
R108
0
OPT
R100
DTV/MNT_L_OUT
100
R169
22K
R132
100
R111
SIDE_R_IN
SC_REC2
1K
R141
SPI_CSN_1
0.1uF
50V
C147
COMP_Pb
TV_CVBS+
0.01uF
C149
SIDE_Y_IN
0.01uF
OPT C153
390
1%
R182
0.047uF
C108 FULL SPEC
0.047uF
C125
0.047uF
C106 FULL SPEC
0.047uF
C130 FULL SPEC
0.047uF
C127 0.047uFC128 FULL SPEC
0.047uF
C126 FULL SPEC
0.047uF
C116
FULL SPEC
0.047uFC117 FULL SPEC
0.047uF
C115
47R181
47
R161
FULL SPEC
47
R183
47
R174
FULL SPEC
47
R190
FULL SPEC
47
R187
47
R188
FULL SPEC
47
R186
FULL SPEC
47
R177
FULL SPEC
47
R172
FULL SPEC
47
R171
56000pFC151
56000pF
C154
LED_GRE
5V_HDMI_1 5V_HDMI_2
SC1_G
SC1_R
SC1_B
47
R160
FULL SPEC
SIDE_CVBS_DET
SCART2_DET
SCART1_DET
22 R131 SCL_EXPANDER
SDA_EXPANDER
22 R130
COMP_DET
100R126
FULL SPEC
100R122
USB_OCD
COMP_R_IN
COMP_L_IN
0.047uF
C107 FULL SPEC
510
R163
FULL SPEC 510
R164
FULL SPEC
USB_CTL 100R139
RS232C_RXD
CAT24WC08W-T
IC102
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
SYSTEM_SDA
001:F19;001:V5
4.7K
R101
22R104
SYSTEM_SCL
001:F19;001:V5
22
R103
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDC_SCL_3
1M
R156
DDC_SDA_3
HPD2
22
R150
USB_DP
HPD3
SYSTEM_SCL
DDC_SDA/UART_TX
12MHz
X100
SIF+
USB_DM
SYSTEM_SDA
22 R155
22
R154
DDC_SCL/UART_RX
+3.3V_AVDD
4.7K R113
OPT
4.7K
OPT
R112
0.1uF
C169
SDA_EXPANDER
4.7K R129 4.7K R157
5V_CI_CTL
SC1_VOUT_MUTE
JTP-1127WEM
SW100
12
43
5V_MNT
S_DET
22
R151
22
R149
5V_HDMI_3 100R193
FULL SPEC
RGB_DET
0.1uF
C104
0.1uF
C170
+3.3V_EXPANDER
+1.8V_EXPANDER
+3.3V_EXPANDER
DDC_SCL_2
DDC_SDA_2
100 R152
100 R153
0.047uFC114
47
R176
47
R173 0.047uF
C119
0.047uFC121
47
R180
47
R189 0.047uF
C129
47
R178
FULL SPEC 0.047uF
C118 FULL SPEC
0.1uF C155
0.1uF C156
0.1uF
C167
100
R124
100
R123
100
R135 100
R136
100
R134
22pF
50V
C159
OPT
22pF
50V
C160
OPT
22pF
50V
C157
OPT
22pF
50V
C158
OPT
0.1uF
C123 0.1uF
C124
DDC_SDA/UART_TX
4.7K
R116
OPT
+5V_ST
+5V_ST
47uF
16V
C166
47uF
16V
C168
R13
OPT
R12
OPT
0.047uFC111
0.047uF
C110
47
R165 47
R175
0R15
OPT
+5V_SYS
+3.3V_VDDP_ST
+3.3V_AVDD
10K
R140 10K R148
FULL SPEC
0.047uF
C112
47
R166
100R118
100
R117
0.047uF
C120
47
R179
10K
R196
FULL SPEC
D0-_HDMI3
CK+_HDMI1
CK-_HDMI1
D0-_HDMI1
D2-_HDMI2
D0+_HDMI2
CK-_HDMI3
D2+_HDMI3
D2+_HDMI2
D1-_HDMI3
D2+_HDMI1
D1-_HDMI1
D2-_HDMI3
D0+_HDMI3
D1+_HDMI3
D1+_HDMI2
CK-_HDMI2
D1+_HDMI1
D0+_HDMI1
D0-_HDMI2
CK+_HDMI2
D2-_HDMI1
D1-_HDMI2
CK+_HDMI3
DDC_SCL_1
DDC_SDA_1
HPD1
SC1_ID
100
R197
+5V_SYS
2SA1504S
Q100
E
B
C
+3.3V_VDDP_ST
1K
R10
10K
R14
10K
R11
KDS226
D100
A
AC
C
0
R18
0
R17
OPT
47uF
16V
C174
12MHz
X101
1M
R21
RTC_INT
RTC_INT
0RTC R20
0
R22
+3.3V_EXPANDER
10K R23
OPT
10K R25
FOR HD
10K R26
OPT
10K R24
FULL-HD
ROM_RX
ROM_TX
TU_SLEEP_MODE
CE6355_RESET_N
XC5000_RESET_N
3216
4.7uF
16V
C144 4.7uF
16V
C148
10uF
6.3V
C172
10uF
6.3V
C171
100
R30
RL_ON
22
R32
22
R34
100
R199
0.1uF
C177
0.1uF
C178
10
R31
33K
R159
0
R191
KDS181 D101
+3.3V_VDDP_ST
4.7uF
10V
C179
+3.3V_VDDP_ST
100
R35
470
R184
FULL SPEC
470
R167
470
R162
FULL SPEC 1nF
C109 FULL SPEC
1nF
C131 FULL SPEC
1nF
C113
LED_GRE
AT24C512BN-SH25-T
IC110
3
NC
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
4.7KR36
SDA_SUB/AMP
4.7K
R120
SCL_SUB/AMP
4.7K
R121
+3.3V_CI
+3.3V_CI
4.7K
R39
SCL_GREENEYE
4.7K
R38
SDA_GREENEYE
0
R40
GREENEYE_CTRL
0.1uF
C180
22
R143
20pF
C175
20pF
C176
20pF
C161
20pF
C162
LGE40RC-LF
IC109
1
GPIO32
2
GPIO33
3
GPIO34
4
GPIO35
5
GND_1
6
VDDP
7
GND_2
8
VDDC
9
GPIO36
10
GPIO37
11
GPIO38
12
GPIO39
13 GPIO00 14 GPIO01 15 GPIO02 16 GPIO03 17 GPIO04 18 GPIO05 19 GPIO06 20 GPIO07 21 GPIO08 22 GPIO09 23 GPIO10 24 GPIO11
25 GPIO12
26 GPIO13
27 GPIO14
28 GPIO15
29 HWRESET
30 XIN
31 I2C_SDA
32 I2C_SCL
33 GPIO16
34 GPIO17
35 GPIO18
36 GPIO19
37
GPIO20
38
GPIO21
39
GPIO22
40
GPIO23
41
GPIO24
42
GPIO25
43
GPIO26
44
GPIO27
45
GPIO28
46
GPIO29
47
GPIO30
48
GPIO31
MSD237HFG(SATURN4 NO-SD HD DIVX)
IC100
GPIO148
U2
GPIO147
T2
GPIO146
P4
GPIO145
P3
GPIO144
N6
GPIO16
F3
GPIO14
E9
GPIO4
V11
GPIO3
V10
RXA0N
H2
RXA0P
H1
RXA1N
J2
RXA1P
J1
RXA2N
K2
RXA2P
K1
RXACKN
G2
RXACKP
G1
RXB0N
D2
RXB0P
D1
RXB1N
E2
RXB1P
E1
RXB2N
F2
RXB2P
F1
RXBCKN
C2
RXBCKP
C1
RXC0N
W9
RXC0P
Y9
RXC1N
W10
RXC1P
Y10
RXC2N
W11
RXC2P
Y11
RXCCKN
W8
RXCCKP
Y8
VCLAMP
G4
REXT
F5
REFM
G6
REFP
G5
RIN0M
L1
RIN0P
L2
GIN0M
M1
GIN0P
M2
BIN0M
N1
BIN0P
N2
SOGIN0
J5
HSYNC0
L7
VSYNC0
M7
RIN1P
H6
GIN1P
H5
BIN1P
H3
SOGIN1
H4
HSYNC1
G7
VSYNC1
G8
RIN2P
L6
GIN2P
L4
BIN2P
L3
SOGIN2
L5
HSYNC2
K5
VSYNC2
K6
VCOM1
R1
VCOM0
R2
CVBS7
K4
CVBS6
J4
CVBS5
K3
CVBS4
J3
CVBS3
M3
CVBS2
P1
CVBS1
M4
CVBS0
P2
CVBSOUT
T1
DREXT
M16
DACSVM
N16
AUVRM N5
AUVRP N4
AUVAG U3
AUCOM V2
AUL0 P5
AUR0 P6
AUL1 R3
AUR1 R4
AUL2 Y3
AUR2 Y4
AUL3 R5
AUR3 R6
AUL4 T3
AUR4 T4
AUL5 T5
AUR5 T6
AUOUTL0 Y6
AUOUTR0 W4
AUOUTL1 V3
AUOUTR1 U4
AUOUTL2 Y5
AUOUTR2 W3
PWM5 R15
PWM4 T15
PWM3 U16
PWM2 T16
PWM1 P16
PWM0 R16
SAR5 V16
SAR4 V15
SAR3 U15
SAR2 V14
SAR1 Y12
SAR0 W12
I2S_OUT_MCK E16
I3S_OUT_BCK E12
I4S_OUT_WS F16
I5S_OUT_SD E11
I6S_OUT_MUTE E10
SPDIFO E14
I2S_IN_BCK G16
I3S_IN_WS H16
I4S_IN_SD G15
SPDIFI F15
SCK Y13
SDI W13
SDO Y14
SCZ W14
IRIN M18
INT L18
USB_DM_P0 A2
USB_DP_P0 A1
USB_DM_P1 B2
USB_DP_P1 B1
USB_CID_P1 E7
USB_VBUS_P1 E8
TAGC M5
VR27 M6
VR12 N3
SIFM W2
SIFP Y2
VIFM W1
VIFP Y1
DDCA_SDA P15
DDCA_SCL P14
DDCDA_SDA F6
DDCDA_SCL G3
DDCDB_SDA E4
DDCDB_SCL E6
DDCDC_SDA T14
DDCDC_SCL R14
DDCR_SDA Y15
DDCR_SCL W15
HOTPLUGA F4
HOTPLUDB E5
HOTPLUDC N15
CEC E3
HWRESET U14
XIN V1
XOUT U1
MSD237HFG(SATURN4NO-HDDIVX)
IC100-*1
GPIO148
U2
GPIO147
T2
GPIO146
P4
GPIO145
P3
GPIO144
N6
GPIO16
F3
GPIO14
E9
GPIO4
V11
GPIO3
V10
RXA0N
H2
RXA0P
H1
RXA1N
J2
RXA1P
J1
RXA2N
K2
RXA2P
K1
RXACKN
G2
RXACKP
G1
RXB0N
D2
RXB0P
D1
RXB1N
E2
RXB1P
E1
RXB2N
F2
RXB2P
F1
RXBCKN
C2
RXBCKP
C1
RXC0N
W9
RXC0P
Y9
RXC1N
W10
RXC1P
Y10
RXC2N
W11
RXC2P
Y11
RXCCKN
W8
RXCCKP
Y8
VCLAMP
G4
REXT
F5
REFM
G6
REFP
G5
RIN0M
L1
RIN0P
L2
GIN0M
M1
GIN0P
M2
BIN0M
N1
BIN0P
N2
SOGIN0
J5
HSYNC0
L7
VSYNC0
M7
RIN1P
H6
GIN1P
H5
BIN1P
H3
SOGIN1
H4
HSYNC1
G7
VSYNC1
G8
RIN2P
L6
GIN2P
L4
BIN2P
L3
SOGIN2
L5
HSYNC2
K5
VSYNC2
K6
VCOM1
R1
VCOM0
R2
CVBS7
K4
CVBS6
J4
CVBS5
K3
CVBS4
J3
CVBS3
M3
CVBS2
P1
CVBS1
M4
CVBS0
P2
CVBSOUT
T1
DREXT
M16
DACSVM
N16
AUVRM N5
AUVRP N4
AUVAG U3
AUCOM V2
AUL0 P5
AUR0 P6
AUL1 R3
AUR1 R4
AUL2 Y3
AUR2 Y4
AUL3 R5
AUR3 R6
AUL4 T3
AUR4 T4
AUL5 T5
AUR5 T6
AUOUTL0 Y6
AUOUTR0 W4
AUOUTL1 V3
AUOUTR1 U4
AUOUTL2 Y5
AUOUTR2 W3
PWM5 R15
PWM4 T15
PWM3 U16
PWM2 T16
PWM1 P16
PWM0 R16
SAR5 V16
SAR4 V15
SAR3 U15
SAR2 V14
SAR1 Y12
SAR0 W12
I2S_OUT_MCK E16
I3S_OUT_BCK E12
I4S_OUT_WS F16
I5S_OUT_SD E11
I6S_OUT_MUTE E10
SPDIFO E14
I2S_IN_BCKG16
I3S_IN_WSH16
I4S_IN_SDG15
SPDIFIF15
SCK Y13
SDIW13
SDO Y14
SCZ W14
IRINM18
INTL18
USB_DM_P0 A2
USB_DP_P0 A1
USB_DM_P1 B2
USB_DP_P1 B1
USB_CID_P1 E7
USB_VBUS_P1 E8
TAGC M5
VR27 M6
VR12 N3
SIFM W2
SIFPY2
VIFM W1
VIFPY1
DDCA_SDA P15
DDCA_SCL P14
DDCDA_SDA F6
DDCDA_SCL G3
DDCDB_SDA E4
DDCDB_SCL E6
DDCDC_SDA T14
DDCDC_SCL R14
DDCR_SDA Y15
DDCR_SCL W15
HOTPLUGA F4
HOTPLUDB E5
HOTPLUDC N15
CEC E3
HWRESET U14
XIN V1
XOUT U1
2.2uF
16V C132
2.2uF
16V C133
2.2uF16V C139
FULL SPEC
2.2uF16V C141
FULL SPEC
2.2uF
16V C135
2.2uF
16V C136
FULL SPEC
2.2uF
16V C140
FULL SPEC
2.2uF
16V C134
2.2uF16V C137
FULL SPEC
2.2uF
16V C138
FULL SPEC
10uF
16V
C173
47K
R105
22
R137
MX25L12805DMI-20G
IC103
3
NC_1
2
VCC
4
NC_2
1
HOLD
6
NC_4
5
NC_3
7
CS
8
SO 9WP/ACC
10 GND
11 NC_5
12 NC_6
13 NC_7
14 NC_8
15 SI
16 SCLK
//BOOTSTRAP PWM[1:0]=10
EEPROM
VIDEO IN
AUDIO
I2S
FLASH
HDMI
2009.04.15
MAIN_1 111
IC105: EAN43349001(STM)
I/0 EXPANSION
HDCP EEPROM
*Mstar reset:Active high reset
VOLTAGEDETECTOR
ACTIVE LOW
Flash memory CS/WP pull-up Resistor Ready(4.7K)_080402
EAX57566204
HDMI3
SIDE HDMI
HDMI1
HDMI2
16M FLASH MEMORY
K5:CVBS OUT2 REV2‘
Swap port TX, RX
Should be on top side of PCB becase of debugging
GPIO15: XOUT
1.MSG1040C --> MSG1040RC
3.GPIO: 40pcs --> 39pcs
4.GPIO0: RTC_INT
5.GPIO15: XOUT
2.PWM is Deleted & RTC is added
REVISION
PWM pin delete
READY FOR H/W OPTION
08.07.10
Updated 08.07.10
OCD IS OPTTION.(see the sheet6)
Because OCD function of IC is automatically operated.
OCD IS OPTTION.(see the sheet6)
A_IIC EXCEPT TO CHIPTUNER
MSTAR REQUEST 32.768K READY is OUT over SPEC
08.09.12
TO POWER B/D(RL_ON)
Need to check RTC_INT
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only

LVA_1M
A_MDATA[1]
LVB_0P
PCM_OE_N
LVA_1P
A_MADR[9]
PCM_D[0-7]
LVB_CKM
A_MADR[2]
A_MDATA[0]
A_MDATA[2]
A_MADR[0]
A_MDATA[6]
TS_CLK
A_MCLK+
BUF_TS_SYNC
LVA_CKM
A_MADR[7]
LVB_4P
A_BA0
PCM_CE_N
LVA_3M
A_MDATA[7]
A_MDATA[4]
LVB_2P
PCM_IOWR_N
LVA_CKP
LVB_4M A_MDATA[12]
A_MDATA[8]
A_MADR[8]
PCM_REG_N
A_RAS
A_MADR[11]
A_DQM0
BUF_TS_VAL
TS_D[0-7]
A_MDATA[14]
LVA_3P
LVB_2M
PCM_IRQA_N
TS_SYNC
A_CAS
A_MADR[10]
A_MADR[3]
LVA_2P
LVB_3P
A_DQM1
A_MCLK-
PCM_RESET
A_MDATA[13]
A_MADR[5]
LVA_4P
A_MADR[4]
LVB_1P
LVB_CKP
A_MDATA[11]
PCM_WAIT_N
A_MADR[6]
A_MDATA[15]
A_MDATA[10]
LVA_2M
A_MDATA[3]
LVB_3M
BUF_TS_DATA[0]
PCM_WE_N
PCM_A[0-14]
A_MADR[1]
LVA_0P
A_BA1
TS_VALID
A_WE
LVB_1M
A_MDATA[5]
BUF_TS_CLK
A_MDATA[9]
PCM_CD_N
A_CLKE
LVA_0M
A_MADR[12]
LVA_4M
LVB_0M
PCM_IORD_N
22 R218
22 R217
22 R214
22 R213
22 R219
22 R220
22 R216
22 R215 A_DQS1M
A_DQS1P
A_DQS0M
A_DQS0P
A_ODT
1/10W
1K 1%
R231
1/10W
1K
1%
R232
B_DQM0
B_MDATA[0]
B_MDATA[2]
B_MADR[12]
B_WE
B_DQS1P
B_MADR[1]
B_MDATA[12]
B_MCLK-
B_MADR[2]
B_BA1
B_MADR[6]
B_MDATA[1]
B_MADR[0]
B_MDATA[7]
B_MADR[5]
B_MDATA[6]
B_MADR[4]
B_ODT
B_MDATA[4]
B_MDATA[15]
B_MDATA[11]
B_MDATA[14]
B_RAS
B_MADR[11]
B_MDATA[9]
B_MDATA[3]
B_MCLK+
B_DQS1M
B_DQM1
B_CAS
B_MADR[7]
B_MADR[10]
B_CLKE
B_DQS0P
B_MDATA[5]
B_DQS0M
B_MADR[8]
B_MADR[9]
B_BA0
B_MDATA[13]
B_MDATA[8]
B_MDATA[10]
B_MADR[3]
1/16W
22
AR200
1/16W
22
AR201
1/16W
22
AR202
1/16W
22
AR203
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
0.1uF
50V
C214
0.1uF
50V
C205 +1.25V_VDDC
+3.3V_AVDD_LPLL
0.1uF
50V
C201
+3.3V_AVDD_MPLL
+1.8V_DDR2_MAIN
0.1uF
50V
C203
+1.25V_AVDD_DVI
0.1uF
50V
C207
0.1uF
50V
C209
+3.3V_AVDD_AU
0.1uF
50V
C206
0.1uF
50V
C213
0.1uF
50V
C210
+3.3V_AVDD_MEMPLL
+3.3V_AVDD_ADC
0.1uF
50V
C208
0.1uF
50V
C200
0.1uF
50V
C215
0.1uF
50V
C204
0.1uF
50V
C216
+3.3V_VDDP
0.1uF
50V
C202
+3.3V_AVDD_VIF
+3.3V_AVDD_OTG
HDMI_CEC
0.1uF
50V
C217
56
R258
56
R229
56
R239
56
R237
56
R259
56
R226
56
R236
56
R247
56
R241
56
R249
56
R225
56R245
56
R255
56
R228
56
R243
56
R253
56
R257
56R256
56
R248
56
R252
56
R235
56
R227
56
R244
56
R260
56
R254
56
R246
56
R240
56
R238
56
R242
56
R230
33 R222
33 R223
33 R224
33 R221
100 R212
56
R276 1G
56
R277 1G
A_BA2
B_BA2
33
R234
33
R251
33
R233
33
R250
0
R278
OPT
0
R279
+1.8V_DDR2_MAIN
MSD237HFG(SATURN4 NO-SD HD DIVX)
IC100
GND_1
B15
GND_2
D7
GND_3
D8
GND_4
D12
GND_5
D13
GND_6
F7
GND_7
J9
GND_8
J10
GND_9
J11
GND_10
J12
GND_11
J13
GND_12
K9
GND_13
K10
GND_14
K11
GND_15
K12
GND_16
K13
GND_17
L9
GND_18
L10
GND_19
L11
GND_20
L12
GND_21
L13
GND_22
L19
GND_23
L20
GND_24
M9
GND_25
M10
GND_26
M11
GND_27
M12
GND_28
M13
GND_29
W6
GND_30
W7
AVDD_AU P8
AVDD_LPLL K18
AVDD_MPLL N7
AVDD_MEMPLL D14
AVDD_33_1 H7
AVDD_33_2 J6
AVDD_33_3 J7
AVDD_33_4 K7
AVDD_USB F8
AVDD_VIF P7
AVDD_DM P13
VDDP_1 N8
VDDP_2 N12
VDDP_3 P11
VDDP_4 P12
AVDD_DDR_1 G11
AVDD_DDR_2 G12
AVDD_DDR_3 G13
AVDD_DDR_4 G14
AVDD_DDR_5 H14
AVDD_DVI G10
VDDC_1 H9
VDDC_2 H10
VDDC_3 J15
VDDC_4 K15
VDDC_5 L15
VDDC_6 M15
VDDC_7 N10
VDDC_8 N11
VDDC_9 P10
MSD237HFG(SATURN4 NO-SD HD DIVX)
IC100
LVA0M
V20
LVA0P
V19
LVA1M
W20
LVA1P
Y20
LVA2M
Y19
LVA2P
W19
LVACKM
Y18
LVACKP
W18
LVA3M
Y17
LVA3P
W17
LVA4M
Y16
LVA4P
W16
LVB0M
M20
LVB0P
M19
LVB1M
N20
LVB1P
N19
LVB2M
P20
LVB2P
P19
LVBCKM
R20
LVBCKP
R19
LVB3M
T20
LVB3P
T19
LVB4M
U20
LVB4P
U19
TS0DATA[7]
V5
TS0DATA[6]
T8
TS0DATA[5]
T7
TS0DATA[4]
R8
TS0DATA[3]
R7
TS0DATA[2]
U6
TS0DATA[1]
U5
TS0DATA[0]
V4
TS0CLK
Y7
TS0VALID
V6
TS0SYNC
W5
TS1DATA
M17
TS1CLK
N18
TS1VALID
L17
TS1SYNC
P18
PCM_D[7]/CI_D[7]
U7
PCM_D[6]/CI_D[6]
U8
PCM_D[5]/CI_D[5]
U9
PCM_D[4]/CI_D[4]
T9
PCM_D[3]/CI_D[3]
R9
PCM_D[2]/CI_D[2]
P9
PCM_D[1]/CI_D[1]
R10
PCM_D[0]/CI_D[0]
R11
PCM_A[14]/CI_A[14]
V7
PCM_A[13]/CI_A[13]
V8
PCM_A[12]/CI_A[12]
U10
PCM_A[11]/CI_A[11]
T10
PCM_A[10]/CI_A[10]
T11
PCM_A[9]/CI_A[9]
V9
PCM_A[8]/CI_A[8]
U11
PCM_A[7]/CI_A[7]
R12
PCM_A[6]/CI_A[6]
T12
PCM_A[5]/CI_A[5]
U12
PCM_A[4]/CI_A[4]
V12
PCM_A[3]/CI_A[3]
R13
PCM_A[2]/CI_A[2]
T13
PCM_A[1]/CI_A[1]
U13
PCM_A[0]/CI_A[0]
V13
PCMIOR/CI_RD
U18
PCMIOW/CI_WR
T18
PCMREG/CI_CLK
U17
PCMCEN/CI_CS
T17
PCMIRQ/CI_INT
R17
PCMWAIT/CI_WACK
R18
PCMOEN
V18
PCMWEN
V17
CI_RST
P17
CI_CD
N17
A_MVREF E13
A_DDR2_DQM[1] A10
A_DDR2_DQM[0] C9
A_DDR2_DQS[1] C8
A_DDR2_DQS[0] B9
A_DDR2_DQSB[1] B8
A_DDR2_DQSB[0] A9
A_MDATA[15] A8
A_MDATA[14] B10
A_MDATA[13] A7
A_MDATA[12] A11
A_MDATA[11] B11
A_MDATA[10] B7
A_MDATA[9] C10
A_MDATA[8] C7
A_MDATA[7] C6
A_MDATA[6] C11
A_MDATA[5] C5
A_MDATA[4] C12
A_MDATA[3] B12
A_MDATA[2] A6
A_MDATA[1] A12
A_MDATA[0] B6
A_MADR[12] C13
A_MADR[11] D4
A_MADR[10] C14
A_MADR[9] A14
A_MADR[8] D5
A_MADR[7] B13
A_MADR[6] D6
A_MADR[5] B14
A_MADR[4] A3
A_MADR[3] A13
A_MADR[2] B3
A_MADR[1] A15
A_MADR[0] C3
A_BADR[2] F14
A_BADR[1] D10
A_BADR[0] D9
A_MCLK B5
A_MCLKZ A5
A_MCLKE D11
A_ODT C4
A_WEZ D3
A_RASZ B4
A_CASZ A4
B_MVREF E15
B_DDR2_DQM[1] F18
B_DDR2_DQM[0] E20
B_DDR2_DQS[1] D20
B_DDR2_DQS[0] E19
B_DDR2_DQSB[1] D19
B_DDR2_DQSB[0] E18
B_MDATA[15] D18
B_MDATA[14] F19
B_MDATA[13] C18
B_MDATA[12] G18
B_MDATA[11] G19
B_MDATA[10] C19
B_MDATA[9] F20
B_MDATA[8] C20
B_MDATA[7] B20
B_MDATA[6] G20
B_MDATA[5] A20
B_MDATA[4] H20
B_MDATA[3] H19
B_MDATA[2] B18
B_MDATA[1] H18
B_MDATA[0] B19
B_MADR[12] K20
B_MADR[11] C15
B_MADR[10] J20
B_MADR[9] K19
B_MADR[8] A16
B_MADR[7] J17
B_MADR[6] D15
B_MADR[5] H17
B_MADR[4] B16
B_MADR[3] G17
B_MADR[2] D16
B_MADR[1] F17
B_MADR[0] C16
B_BADR[2] K17
B_BADR[1] E17
B_BADR[0] J19
B_MCLK A19
B_MCLKZ A18
B_MCLKE J18
B_ODT C17
B_WEZ D17
B_RASZ B17
B_CASZ A17
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[3]
PCM_A[4]
PCM_A[5]
PCM_A[6]
PCM_A[7]
PCM_A[8]
PCM_A[9]
PCM_A[10]
PCM_A[11]
PCM_A[12]
PCM_D[0]
PCM_A[13]
PCM_D[1]
PCM_A[14]
PCM_D[2]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
TS_D[7]
TS_D[6]
TS_D[5]
TS_D[4]
TS_D[3]
TS_D[2]
TS_D[1]
TS_D[0]
PCM_D[7]
211
MAIN_2
Next Revision Ready (Stand By 0.2W)_080403
EAX57566204
Need to swap even to odd
for 1G Memory
for 1G Memory
2009.04.15
AIN_2
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
A_MDATA[14]
DDR2_A_MDATA[7]
DDR2_B_MDATA[4]
1/16W
56
AR302
DDR2_A_MADR[0] DDR2_B_MADR[0]
A_DQS0M
0.1uF C336
DDR2_B_MADR[9]
DDR2_A_MDATA[8]
A_MDATA[2]
A_CLKE
B_MDATA[12]
B_MDATA[10]
DDR2_A_MADR[5]
A_MDATA[6]
DDR2_B_MDATA[2]
B_DQM1
B_CLKE
0.1uF C332
DDR2_B_MADR[4]
DDR2_B_MDATA[1]
DDR2_A_MADR[12]
0.1uF C334
A_MADR[4]
DDR2_B_MADR[5]
+1.8V_DDR2_MAIN
1/16W
56
AR301
B_MDATA[4]
B_MDATA[0]
1/16W
56
AR311
1/16W
56
AR306
A_MDATA[8]
DDR2_A_MDATA[4]
DDR2_B_MADR[2]
B_MDATA[3]
0.1uF C310
B_MADR[8]
0.1uF C323
B_MADR[12]
DDR2_B_MADR[1]
A_MADR[11]
0.1uF C329
DDR2_B_MDATA[11]
B_MADR[10]
1K
1%
R350
A_BA0
B_MADR[7]
DDR2_B_MDATA[8]
B_DQS1P
DDR2_B_MDATA[5]
DDR2_B_MDATA[2]
0.1uF C324
DDR2_A_MDATA[8]
DDR2_A_MADR[6]
A_WE
A_DQS1P
A_MCLK-
B_BA1
DDR2_A_MADR[12]
DDR2_B_MDATA[10]
A_CAS
+1.8V_DDR2_MAIN
A_MDATA[4]
DDR2_A_MDATA[15]
DDR2_B_MDATA[3]
DDR2_A_MADR[4]
A_MDATA[11]
A_MCLK+
0.1uF C314
DDR2_A_MADR[10]
A_DQS0P
DDR2_B_MADR[4]
DDR2_A_MDATA[6]
B_MADR[0]
A_RAS
1K
1%
R351
DDR2_A_MADR[2]
DDR2_A_MDATA[13]
B_MDATA[2]
DDR2_B_MDATA[13]
DDR2_B_MADR[0]
A_ODT
B_MDATA[7]
A_MDATA[10]
DDR2_A_MDATA[2]
DDR2_B_MDATA[6]
DDR2_A_MADR[0]
DDR2_B_MDATA[0]
DDR2_B_MDATA[3]
A_MADR[8]
DDR2_A_MDATA[0]
0.1uF
C302
B_MADR[5]
A_DQS1M
+1.8V_DDR2_MAIN
1/16W
56
AR307
B_MDATA[5]
A_MDATA[3]
DDR2_A_MADR[1]
A_MDATA[15]
DDR2_B_MADR[10]
DDR2_B_MADR[10]
DDR2_B_MDATA[8]
DDR2_B_MDATA[7]
B_MDATA[11]
B_MDATA[6]
DDR2_B_MADR[7]
B_DQS0M
DDR2_A_MDATA[1]
B_MDATA[1]
0.1uF C330
0.1uF C318
DDR2_A_MDATA[9]
0.1uF
50V
C320
A_MADR[2]
DDR2_B_MDATA[0]
DDR2_B_MDATA[4]
0.1uF C315
DDR2_A_MDATA[11]
DDR2_A_MDATA[5]
B_RAS
DDR2_B_MADR[6]
A_MDATA[5]
B_MADR[1]
0.1uF C307
B_MADR[3]
DDR2_A_MDATA[14]
+1.8V_DDR2_MAIN
DDR2_B_MDATA[5]
+1.8V_DDR2_MAIN
DDR2_A_MADR[7]
DDR2_A_MDATA[6]
DDR2_B_MDATA[15]
DDR2_B_MDATA[13]
A_MADR[3]
B_CAS
B_DQS0P
1/16W
56
AR310
DDR2_B_MDATA[12]
B_BA0
0.1uF C306
DDR2_B_MADR[7]
1/16W
56
AR312
DDR2_A_MDATA[11]
B_MDATA[13]
A_DQM1
DDR2_B_MDATA[14]
DDR2_A_MDATA[2]
1/16W
56
AR308
DDR2_A_MDATA[12]
A_DQM0
DDR2_B_MADR[5]
0.1uF C326
DDR2_A_MDATA[3]
DDR2_B_MADR[3]
A_MDATA[13]
DDR2_A_MADR[1]
DDR2_B_MDATA[14]
0.1uF C335
1/16W
56
AR303
0.1uF C308
DDR2_A_MDATA[9]
0.1uF C317
0.1uF
50V
C301
DDR2_A_MADR[9]
0.1uF C337
A_MDATA[7]
B_DQM0
DDR2_B_MADR[1]
0.1uF C331
DDR2_A_MDATA[13]
1/16W
56
AR300
A_MADR[0]
0.1uF C328
0.1uF C312
1/16W
56
AR305
B_MADR[6]
B_WE
A_MADR[1]
DDR2_A_MADR[2]
A_MADR[6]
A_MADR[7]
0.1uF C316
1/16W
56
AR309
A_MADR[12]
DDR2_A_MDATA[1]
DDR2_A_MDATA[5]
B_MCLK-
1K
1%
R355
DDR2_A_MDATA[15]
DDR2_A_MDATA[4]
DDR2_B_MADR[12]
DDR2_A_MDATA[0]
DDR2_B_MADR[12]
DDR2_B_MDATA[7]
DDR2_A_MDATA[10]
0.1uF C305
DDR2_B_MDATA[10]
B_MDATA[14]
B_MADR[2]
DDR2_A_MDATA[14]
B_MDATA[15]
DDR2_B_MDATA[6]
A_MDATA[0]
0.1uF
C321
0.1uF C325
DDR2_A_MADR[7]
B_DQS1M
B_ODT
A_MADR[5]
+1.8V_DDR2_MAIN
B_MADR[11]
DDR2_B_MADR[3]
DDR2_B_MDATA[12]
DDR2_B_MDATA[9]
DDR2_A_MADR[9]
DDR2_B_MDATA[9]
1/16W
56
AR304
B_MDATA[8]
B_MCLK+
B_MADR[4]
1K
1%
R354
DDR2_A_MADR[3]
DDR2_A_MADR[10]
A_MDATA[9]
A_MADR[10]
B_MADR[9]
DDR2_A_MADR[6]
0.1uF C311
0.1uF C304
0.1uF C313
DDR2_A_MADR[3]
A_MDATA[12]
DDR2_B_MADR[9]
DDR2_A_MADR[5]
0.1uF C327
B_MDATA[9]
A_MDATA[1]
A_MADR[9]
0.1uF C309
DDR2_B_MDATA[1]
DDR2_A_MADR[4]
DDR2_B_MADR[6]
DDR2_A_MDATA[3]
A_BA1
DDR2_B_MDATA[11]
DDR2_A_MDATA[7]
1/16W
56
AR313
DDR2_A_MDATA[10]
DDR2_A_MDATA[12]
DDR2_B_MADR[2]
DDR2_B_MDATA[15]
0.1uF C333
0.1uF
50V
C319
0.1uF
50V
C300
B_BA2
A_BA2
H5PS5162FFR-S6C
HYNIX
EAN55705501
DDR2SDRAM
IC300
FOR HYNIX J2
VREF
J8
CK
H2 VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8 VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2 VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8 VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7 VSSQ5
D8 VSSQ6
D2 VSSQ7
A7 VSSQ8
B8 VSSQ9
B2 VSSQ10
P9 VSS1
N1 VSS2
J3 VSS3
E3 VSS4
A3 VSS5
G9 VDDQ1
G7 VDDQ2
G3 VDDQ3
G1 VDDQ4
E9 VDDQ5
C9 VDDQ6
C7 VDDQ7
C3 VDDQ8
C1 VDDQ9
A9 VDDQ10
R1 VDD1
M9 VDD2
J9 VDD3
E1 VDD4
A1 VDD5
B9 DQ15
B1 DQ14
D9 DQ13
D1 DQ12
D3 DQ11
D7 DQ10
C2 DQ9
C8 DQ8
F9 DQ7
F1 DQ6
H9 DQ5
H1 DQ4
H3 DQ3
H7 DQ2
G2 DQ1
G8 DQ0
H5PS5162FFR-S6C
HYNIX
EAN55705501
DDR2SDRAM
IC301
FOR HYNIX J2
VREF
J8
CK
H2 VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8 VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2 VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8 VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7 VSSQ5
D8 VSSQ6
D2 VSSQ7
A7 VSSQ8
B8 VSSQ9
B2 VSSQ10
P9 VSS1
N1 VSS2
J3 VSS3
E3 VSS4
A3 VSS5
G9 VDDQ1
G7 VDDQ2
G3 VDDQ3
G1 VDDQ4
E9 VDDQ5
C9 VDDQ6
C7 VDDQ7
C3 VDDQ8
C1 VDDQ9
A9 VDDQ10
R1 VDD1
M9 VDD2
J9 VDD3
E1 VDD4
A1 VDD5
B9 DQ15
B1 DQ14
D9 DQ13
D1 DQ12
D3 DQ11
D7 DQ10
C2 DQ9
C8 DQ8
F9 DQ7
F1 DQ6
H9 DQ5
H1 DQ4
H3 DQ3
H7 DQ2
G2 DQ1
G8 DQ0
EDE5116AJBG-8E-E
IC300-*1
FORELPIDA
J2
VREF
J8
CK
H2 VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4
L2
BA0
R8
NC_3
K7
RAS
F8 VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2 VSSQ_4
B3
UDM
M2
A10
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8 VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7 VSSQ_5
D8 VSSQ_6
D2 VSSQ_7
A7 VSSQ_8
B8 VSSQ_9
B2 VSSQ_10
P9 VSS_1
N1 VSS_2
J3 VSS_3
E3 VSS_4
A3 VSS_5
G9 VDDQ_1
G7 VDDQ_2
G3 VDDQ_3
G1 VDDQ_4
E9 VDDQ_5
C9 VDDQ_6
C7 VDDQ_7
C3 VDDQ_8
C1 VDDQ_9
A9 VDDQ_10
R1 VDD_1
M9 VDD_2
J9 VDD_3
E1 VDD_4
A1 VDD_5
B9 DQ15
B1 DQ14
D9 DQ13
D1 DQ12
D3 DQ11
D7 DQ10
C2 DQ9
C8 DQ8
F9 DQ7
F1 DQ6
H9 DQ5
H1 DQ4
H3 DQ3
H7 DQ2
G2 DQ1
G8 DQ0
EDE5116AJBG-8E-E
IC301-*1
FORELPIDA
J2
VREF
J8
CK
H2 VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
NC_4
L2
BA0
R8
NC_3
K7
RAS
F8 VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2 VSSQ_4
B3
UDM
M2
A10
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8 VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7 VSSQ_5
D8 VSSQ_6
D2 VSSQ_7
A7 VSSQ_8
B8 VSSQ_9
B2 VSSQ_10
P9 VSS_1
N1 VSS_2
J3 VSS_3
E3 VSS_4
A3 VSS_5
G9 VDDQ_1
G7 VDDQ_2
G3 VDDQ_3
G1 VDDQ_4
E9 VDDQ_5
C9 VDDQ_6
C7 VDDQ_7
C3 VDDQ_8
C1 VDDQ_9
A9 VDDQ_10
R1 VDD_1
M9 VDD_2
J9 VDD_3
E1 VDD_4
A1 VDD_5
B9 DQ15
B1 DQ14
D9 DQ13
D1 DQ12
D3 DQ11
D7 DQ10
C2 DQ9
C8 DQ8
F9 DQ7
F1 DQ6
H9 DQ5
H1 DQ4
H3 DQ3
H7 DQ2
G2 DQ1
G8 DQ0
3
DDR2 11
EAX57566204
Close to DDR Power Pin
Close to DDR Power Pin
for 1G Memory
for 1G Memory
2009.04.15
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only