Motorola M68EM05C0 User manual

M68EM05C0UM/D
EMULATION MODULE
USER’S MANUAL
M68EM05C0
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Motorola, Inc., 1996; All Rights Reserved
M68EM05C0
Emulation Module
User’s Manual
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Motorola reserves the right to make changes without further notice to any products herein
to improve reliability, function, or design. Motorola does not assume any liability arising out
of the application or use of any product or circuit described herein; neither does it convey
any license under its patent rights nor the rights of others. Motorola products are not
designed, intended, or authorized for use as components in systems intended for surgical
implant into the body, or other application in which the failure of the Motorola product could
createasituationwherepersonalinjuryordeathmayoccur. ShouldBuyerpurchaseoruse
Motorola products for any such unintended or unauthorized application, Buyer shall
indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part.
Motorola and the Motorola logo are registered trademarks of Motorola, Inc.
Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
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M68EM05C0UM/D
MOTOROLA 5
Table of Contents
General
Description Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Emulation Components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Emulation Module Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Target Cable Assemblies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Connector Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Target Cable Connector Pin Assignments . . . . . . . . . . . . . . . . . . .12
Logic Analyzer Connector Pin Assignments . . . . . . . . . . . . . . . . .15
MMDS/MMEVS
Configuration and
Operation
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Setting M68EM05C0 Jumper Headers . . . . . . . . . . . . . . . . . . . . . . . .19
Clock Source Select Header, W1 . . . . . . . . . . . . . . . . . . . . . . . . . .19
Port D Source Select Header, W2 . . . . . . . . . . . . . . . . . . . . . . . . .20
Mode Select Header, W3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Internal Read Visibility (IRV) Header, W4 . . . . . . . . . . . . . . . . . . .21
External Memory Select Header, W5 . . . . . . . . . . . . . . . . . . . . . . .22
Personality Files Usage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
MC68HC05C0 Emulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Port D Pullups/Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
IRV and LIRV Operation and the Configuration Register . . . . . . . .25
Remaining System Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Schematics Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
M68EM05C0 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
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M68EM05C0UM/D
6MOTOROLA
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M68EM05C0UM/D
MOTOROLA General Description 7
GeneralDescription
Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Emulation Components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Emulation Module Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Target Cable Assemblies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Connector Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Target Cable Connector Pin Assignments . . . . . . . . . . . . . . . . . . .12
Logic Analyzer Connector Pin Assignments . . . . . . . . . . . . . . . . .15
Introduction
Your M68EM05C0 gives your Motorola development tool the ability to
emulate target systems based on the MC68HC05C0 MCUs. By
substituting a different emulation module (EM), you can enable your
Motorola development tool to emulate other MCUs. Refer to
Motorola’s
Development Tool Selector Guide
, order number SG173/D, for a
complete list of available EMs.
This hardware user's manual explains connection, configuration, and
operation information specific to the M68EM05C0 emulation module.
The module can be installed in two Motorola development systems. To
configure your M68EM05C0 for either an MMDS05 or an
MMEVS05/MMEVS08, follow the instructions given in MMDS/MMEVS
Configuration and Operation on page 17.
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General Description Emulation Components
M68EM05C0UM/D
8 General Description MOTOROLA
Emulation Components
Motorola’scompleteemulationsystemconsistsoftheemulationmodule
described in this manual as well as other separately purchased options
described in the following paragraphs.
The following items are included with the M68EM05C0 emulation
module:
•An M68EM05C0 emulation module (EM) — the printed circuit
board that enables system functionality for 05C0 MCUs. The
female connectors, on the bottom of the module, mate with male
connectors on a development system platform board. The EM
also has a connector for the target cable assembly.
• Configuration software — 3 1/2-inch diskette containing
personality files for this module.
Separately purchased Motorola modular development tool options
include:
•An MMEVS05/MMEVS08 (MMEVS) modular evaluation
system — The MMEVS is an economical development tool that
provides real-time in-circuit emulation. The unit's integrated
design environment includes an editor, an assembler, a user
interface, and a source-level debugging program.
•An MMDS05 modular development system — The MMDS is a
high-performance development tool that has all the capabilities of
the MMEVS. In addition, it also has a bus state analyzer and
real-time memory windows.
• Flex cable target assembly — Refer to Target Cable
Assemblies on page 10 for more information.
User supplied components include:
•Host computer — see the appropriate development tool user’s
manual for minimum requirements.
•Power supply — +5 Vdc required for the MMEVS.
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General Description
Emulation Module Layout
M68EM05C0UM/D
MOTOROLA General Description 9
Emulation Module Layout
Figure 1 shows the layout of the M68EM05C0. Jumper header W1 lets
you select the clock-signal source. W2 configuration determines the port
D emulation source. Jumper header W3 selects muxed or non-muxed
mode emulation. Jumper header W4 controls internal read visibility. W5
determines where external memory resides.
Target connectors J2 and J3 are the interface to a target system; these
connectors use a separately purchased target cable assembly. When
you install the M68EM05C0 on the MMDS05, the target cable passes
through the slit in the station module enclosure. Connector J1 connects
to a logic analyzer.
DIN connectors P1 and P2 connect the EM and a development system
platform board.
Figure 1. M68EM05C0 Emulation Module
W3
W4
W1
W5
J1
P1 P2 J2 J3
W2
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General Description Target Cable Assemblies
M68EM05C0UM/D
10 General Description MOTOROLA
Target Cable Assemblies
To connect your M68EM05C0 to a target system, you need a separately
purchased target cable assembly.
The target cable connects to the emulator via connectors J2 and J3 on
the M68EM05C0 emulation module. Pin assignments and signal
descriptions for connectors J2 and J3 can be found in Target Cable
Connector Pin Assignments on page 12.
Figure 2 represents a target cable assembly. An assembly consists of a
flex cable and a target head adapter. One end of the flex cable plugs
onto M68EM05C0 connectors J2 and J3 with orientation shown in
Figure 2. The other end of the flex cable plugs into the target head
adapter. The adapter then inserts into the MCU socket of your target
system.
The MCU package in your target system determines the correct flex
cable and target head adapter needed:
• For a 44-pin PLCC package, use flex cable M68CBL05C and
target head adapter M68TC05C0FN44.
• For a 40-pin DIP package, use flex cable M68CBL05B and target
head adapter M68TB05C0P40.
• Fora42-pinSDIPpackage,useflexcableM68CBL05Bandtarget
head adapter M68TB05C0B42.
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General Description
Target Cable Assemblies
M68EM05C0UM/D
MOTOROLA General Description 11
Figure 2. Target Cable Assembly
44-PIN PLCC
FLEX CABLE:
M68CBL05C
TARGET HEAD ADAPTER
M68TC05C0FN44 40-PIN DIP
FLEX CABLE:
M68CBL05B
TARGET HEAD ADAPTER
M68TB05C0P40 42-PIN SDIP
FLEX CABLE:
M68CBL05B
TARGET HEAD ADAPTER
M68TB05C0B42
TARGET
HEAD
ADAPTER
TO
TARGET
HEAD
TO
TARGET SYSTEM
MCU SOCKET
EMULATION
MODULE
FLEX
CABLE
TO
EMULATION
MODULE
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General Description Connector Information
M68EM05C0UM/D
12 General Description MOTOROLA
Connector Information
The reachable connectors on the M68EM05C0 module provide access
to the user mode emulation signals (J2 and J3) as well as select internal
signals (J1). Connectors J2 and J3 are used for a cable interface to a
user’s target system, while connector J1 is used to connect a logic
analyzer.
Target Cable
Connector Pin
Assignments
Figure 3 shows the pin assignments for connectors J2 and J3. Table 1
listssignaldescriptionsforconnectorJ2;Table2listssignaldescriptions
for connector J3.
Figure 3. Target Connector Pin Assignment
GND
NC
J2
A15
A14
A13
A12
A11
A10
A9
A8
GND
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
NC
EMVCC
GND
NC
NC
NC
NC
NC
NC
NC
A/PD6
A/PD7
A/PD5
A/PD4
A/PD3
A/PD2
A/PD1
A/PD0
GND
GND
GND
TIRQ
NC
NC
NC
GND
NC
NC
NC
NC
NC
NC
NC
GND
NC
OSC1
LIR
WR
RD
OSC2
NC
RESET
PC3
PC2
PC1
PC0
NC
GND
PB0
B1/TCP
PB3
PB2
CS1/B5
EVDD
NC
GND
NC
AS/CS2
GND
GND
PB4
J3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
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General Description
Connector Information
M68EM05C0UM/D
MOTOROLA General Description 13
Table 1. Connector J2 Signal Descriptions
Pin Mnemonic Signal
1, 4, 19, 24,
38, 40 GND GROUND
2 EMVCC +5 Vdc POWER — Connection to the system
voltage VCC
3, 6, 8, 10, 12,
14, 16, 18, 23 NC No connection
5, 7, 9, 11, 13,
15, 17, 21 A15, A14–A8
Upper address lines — These upper address lines
constitute the upper address byte. A15 is active
low (inverted). A14-A8 are active high.
20, 22, 26, 28,
30, 32, 34, 36 A/PD7– A/PD0
In muxed mode, these lines are port D (bits 7–0) —
general-purpose I/O lines controlled by software
via data direction and data registers.
In non-muxed mode, these lines are the dedicated
lower address byte A7–A0.
25, 27, 29, 31,
33, 35, 37, 39 AD7–AD0 In muxed mode, these lines are the multiplexed
lower address byte and the data byte.
In non-muxed mode, these lines are the data byte.
Table 2. Connector J3 Signal Descriptions
Pin Mnemonic Signal
1 T-IRQ TARGET INTERRUPT REQUEST — Active-low input signal from the target that asynchronously
applies an MCU interrupt
2 RESET Active-low bidirectional signal to/from the target
system driven low to pull the MCU into reset
3, 5, 7, 11, 12,
13, 15, 17,19,
21, 23, 25,
29, 30, 34
NC No connection
4, 6, 8, 10 PC3–
PC0
PORT C (bits 3–0) — General-purpose I/O lines
controlled by software via data direction and data
registers
9,14, 27, 32,
38, 40 GND GROUND
16 PB0
PORT B bit 0 — General-purpose I/O lines
controlled by software via data direction and data
registers
Becomes the timer compare (TCMP) output pin
when the output compare mode feature of the
16-bit timer subsystem is enabled
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General Description Connector Information
M68EM05C0UM/D
14 General Description MOTOROLA
18 PB1/TCP
PORT B bit 1 — General-purpose I/O lines
controlled by software via data direction and data
registers
Becomes the timer capture (TCAP) input pin when
the input capture mode feature of the 16-bit timer
subsystem is enabled
20, 22, 24 PB2, PB3,
PB4
PORT B (bits 2, 3, 4) ‚ General-purpose I/O lines
controlled by software via data direction and data
registers
Pins become the RDI, TDO, and SCK lines
respectively when serial communication interface
subsystem is enabled.
26 CS1/PB5
CHIP SELECT 1/PORT B 5 — General-purpose
I/O lines controlled by software via data direction
and data registers
Can also be a dedicated chip select line via
manipulation of the CS1P1 and CS1P0 bits of the
configuration register.
28 EVDD
EXTERNAL VOLTAGE DETECT — Connected to
target VCC used to sense target power applied, for
target status in MMDS05 status window
31 OSC1
OSCILLATOR 1 — A possible clock source input for
the M68EM05C0 board; system bus frequency is
OSC1÷4;use of this signal is controlled by jumper
header W1.
33 LIR
LOAD INSTRUCTION REGISTER — Active-low
output used to indicate that a fetch of the next
opcode is in progress. Note that the mode is not
latched on the emulator, but is controlled via
jumper header W3.
35 WR WRITE — Active-low output used to indicate that a
write cycle is in progress
36 AS/CS2
ADDRESS STROBE/CHIP SELECT 2 — In muxed
mode, this pin is the address strobe signal.
In non-muxed mode, this pin is the active-low chip
select 2 signal.
37 RD READ — Active-low output used to indicate that a
read cycle is in progress
39 OSC2 OSCILLATOR 2 — Output clock signal. Inversion of
the OSC1 clock.
Table 2. Connector J3 Signal Descriptions (Continued)
Pin Mnemonic Signal
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General Description
Connector Information
M68EM05C0UM/D
MOTOROLA General Description 15
Logic Analyzer
Connector Pin
Assignments
Figure 4 shows the pin assignments for logic analyzer connector J1.
Thisconnectorprovidestheemulator easyaccesstomanyofthesignals
used internally. Table 3 lists signal descriptions for this connector.
Figure 4. Connector J1 Pin Assignments
—
—
J1
LA11
LA10
LA9
LA8
LA7
LA6
LA5
LA3
LA4
LA1
LA0
LR/W
—
—
—
VCC
RESET
LA2
GND
—
GND
LA12
LA13
LA14
LA15
AD7
AD6
AD4
AD5
AD2
AD1
AD0
LIR
—
—
ACLK
—
AD3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
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General Description Connector Information
M68EM05C0UM/D
16 General Description MOTOROLA
Table 3. Logic Analyzer Connector J1 Signal Descriptions
Pin Mnemonic Signal
1, 3, 4, 31, 33,
34, 35, 36, 40 NC No connection
2, 6 GND GROUND
14, 12, 10, 8 LA15–LA12 LATCHED ADDRESSES (bits 15–12) — MCU
latched output address bus
5, 7, 9, 11, 13,
15, 17, 19,
21, 23, 25, 27 LA11–LA0 LATCHED ADDRESSES (bits 11–0) — MCU
latched output address bus
16, 18, 20,
22, 24, 26,
28, 30 AD7–AD0 DATA BUS (bits 7–0) — MCU multiplexed I/O bus
29 LR/W LATCHED READ/WRITE — The MCU’s write signal is latched and used on the emulator to
control emulator memory accesses.
32 LIR LOAD INSTRUCTION REGISTER — Active low signal indicating an opcode fetch cycle is in
process.
37 VCC +5 Vdc POWER — Connection to the system
voltage VCC
38 ACLK
ANALYZER CLOCK — The latched addresses are
valid on the latched address bus at the rising
edge of ACLK. Also, data is valid on the AD BUS
at ACLK’s rising edge.
39 RESET RESET — Active-low signal; will be asserted
during internally or externally caused resets
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M68EM05C0UM/D
MOTOROLA MMDS/MMEVS Configuration and Operation 17
MMDS/MMEVS Configuration and Operation
Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Setting M68EM05C0 Jumper Headers . . . . . . . . . . . . . . . . . . . . . . . .19
Clock Source Select Header, W1 . . . . . . . . . . . . . . . . . . . . . . . . . .19
Port D Source Select Header, W2 . . . . . . . . . . . . . . . . . . . . . . . . .20
Mode Select Header, W3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Internal Read Visibility (IRV) Header, W4 . . . . . . . . . . . . . . . . . . .21
External Memory Select Header, W5 . . . . . . . . . . . . . . . . . . . . . . .22
Personality Files Usage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
MC68HC05C0 Emulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Port D Pullups/Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
IRV and LIRV Operation and the Configuration Register . . . . . . . .25
Remaining System Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
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MMDS/MMEVS Configuration and Operation Introduction
M68EM05C0UM/D
18 MMDS/MMEVS Configuration and Operation MOTOROLA
Introduction
The following paragraphs explain how to configure and use your
M68EM05C0 as part of an MMDS or MMEVS system. For other parts of
system installation and configuration, see either the
MMDS05
Operations Manual
(MMDS05OM/D) or MMEVS05/MMEVS08
Operations Manual
(MMEVS0508OM/D).
The topics covered in this chapter are:
•Setting M68EM05C0 Jumper Headers on page 19 explains how
to set the M68EM05C0 jumper headers.
•Personality Files Usage on page 23 discusses the personality
file usage on the M68EM05C0 board.
•MC68HC05C0 Emulation on page 24 explains special
considerations for emulating with this module.
•Remaining System Installation on page 26 covers the final
steps to system installation.
NOTE: You can configure an M68EM05C0 already installed in the
system platform board. To do so, remove system power and
then follow the guidance of this chapter.
CAUTION: Be sure to switch off power before you reconfigure an
installed EM. Reconfiguring EM jumper headers with the
power on can damage emulation circuits.
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MMDS/MMEVS Configuration and Operation
Setting M68EM05C0 Jumper Headers
M68EM05C0UM/D
MOTOROLA MMDS/MMEVS Configuration and Operation 19
Setting M68EM05C0 Jumper Headers
Your M68EM05C0 has five jumper headers — W1 through W5. The
following explains how to configure these components.
Clock
Source Select
Header, W1
Jumper header W1 determines the source of the clock signal. The
diagram here illustrates the jumper header where the pins marked C
indicate common pins. The default configuration selects the 16-MHz
canned oscillator clock source (at board location Y1).
The other possible clock sources are one originating from the platform
board or a user supplied clock source coming through target cable
connected to J2 and J3. For the platform board source clock, reposition
the W1 jumper between pins MMDS and C, then use the system’s OSC
command to select a frequency. For a user supplied source, reposition
the W1 jumper between pins TGT_OSC and C.
NOTE: The user supplied source should be a CMOS level square
wave.
NOTE: In muxed mode, 8 MHz is the maximum OSC1 frequency
(2-MHz bus speed). In non-muxed mode, 16 MHz is the
maximum rated OSC1 frequency (4-MHz bus).
CLK SRC
MMDS
CAN
W1
C
FABRICATED
JUMPER
C
C
TGT_OSC
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MMDS/MMEVS Configuration and Operation Setting M68EM05C0 Jumper
M68EM05C0UM/D
20 MMDS/MMEVS Configuration and Operation MOTOROLA
Port D
Source Select
Header, W2
TheportDsource headercontrolsthemuxedmode portDsourceforthe
M68EM05C0 emulation module. The proper configuration for this
jumperisdeterminedbythe versionofMC68HC05C0siliconusedasthe
resident MCU and installed in the XU11 socket on the M68EM05C0
board.
For first pass silicon, the port D I/O logic is rebuilt external to the MCU
using a port replacement unit (PRU). The W2 jumper should be in the
PRUposition.Inthisposition,the port D keyscan interruptsfeatureisnot
available in emulation.
For later versions of silicon, the emulator uses port D I/O logic on the
resident MCU. The W2 jumper should be in the MCU position. The
keyscan interrupts feature is supported with this configuration.
Mode Select
Header, W3 Jumper header W3 controls the mode the resident MC68HC05C0 MCU will operate in. When the jumper is installed, the MCU will come out of
reset in muxed mode. The data is multiplexed with the lower order
address bits in this mode.
Non-muxed mode is entered out of reset if the jumper is removed from
the header. In this mode, address and data have individual, separate
lines.
MUXED MODE
PORT D SOURCE
MCU
FABRICATED
JUMPER
PRU
W2
W3
FABRICATED
JUMPER
IN = MUX
OUT = NMUX
MODE
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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