NEC V854 UPD703006 User manual

User’s Manual
Printed in Japan
©
1997
V854TM
32/16-Bit Single-Chip Microcontroller
Hardware
µ PD703006
µ PD703008
µ PD70F3008
µ PD703008Y
µ PD70F3008Y
Document No. U11969EJ3V0UM00 (3rd edition)
Date Published March 1999 N CP(K)

2User’s Manual U11969EJ3V0UM00
[MEMO]

User’s Manual U11969EJ3V0UM00 3
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimatelydegradethedeviceoperation. Stepsmustbetakentostopgenerationofstaticelectricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulatorsthateasilybuildstaticelectricity. Semiconductordevicesmustbestoredandtransported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wriststrap. Semiconductordevicesmustnotbetouchedwith barehands. Similar precautionsneed
to be taken for PW boards with semiconductor devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
totheinputpins, it is possible that aninternalinputlevelmaybegenerated due to noise, etc., hence
causingmalfunction. CMOSdevicesbehave differentlythan BipolarorNMOSdevices. Inputlevels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
V854, and V850 Family are trademarks of NEC Corporation.
Windows is either a registered trademark or a trademark of Microsoft Corporation in the United States and/
or other countries.
UNIXis aregisteredtrademark licensedby X/OpenCompany Limitedin theUnitedStates andother countries.

4User’s Manual U11969EJ3V0UM00
License not needed : µ PD703006, 70F3008, 70F3008Y
The customer must judge the need for license: µ PD703008, 703008Y
The export of these products from Japan is regulated by the Japanese government. The export of some or all of these products
may be prohibited without governmental license. To export or re-export some or all of these products from a country other than
Japan may also be prohibited without a license from that country. Please call an NEC sales representative.
Purchase of NEC I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C
system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
The information in this document is subject to change without notice.
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
NECCorporationdoesnotassumeanyliabilityforinfringementofpatents,copyrightsorotherintellectualproperty
rights of third parties by or arising from use of a device described herein or any other liability arising from use
ofsuch device. No license,eitherexpress,implied orotherwise,isgranted underanypatents,copyrights or other
intellectual property rights of NEC Corporation or others.
WhileNECCorporationhas beenmaking continuousefforttoenhancethereliabilityof itssemiconductordevices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated “quality assurance program“ for a specific application. The recommended applications of
adevice depend on itsquality grade, as indicatedbelow. Customers must check thequality grade of eachdevice
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.
M7 96.5

User’s Manual U11969EJ3V0UM00 5
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
product in your application, pIease contact the NEC office in your country to obtain a list of authorized
representatives and distributors. They will verify:
•
Device availability
•
Ordering information
•
Product release schedule
•
Availability of related technical literature
•
Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
•
Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
NEC Electronics Inc. (U.S.)
Santa Clara, California
Tel: [phone]
800-366-9782
Fax: [phone]
800-729-9288
NEC Electronics (Germany) GmbH
Duesseldorf, Germany
Tel: [phone]
Fax: [phone]
NEC Electronics (UK) Ltd.
Milton Keynes, UK
Tel: [phone]
Fax: [phone]
NEC Electronics Italiana s.r.l.
Milano, Italy
Tel: [phone]
Fax: [phone]
NEC Electronics (Germany) GmbH
Benelux Office
Eindhoven, The Netherlands
Tel: [phone]
Fax: [phone]
NEC Electronics (France) S.A.
Velizy-Villacoublay, France
Tel: [phone]
Fax: [phone]
NEC Electronics (France) S.A.
Spain Office
Madrid, Spain
Tel: [phone]
Fax: [phone]
NEC Electronics (Germany) GmbH
Scandinavia Office
Taeby, Sweden
Tel: [phone]
Fax: [phone]
NEC Electronics Hong Kong Ltd.
Hong Kong
Tel: [phone]
Fax: [phone]
NEC Electronics Hong Kong Ltd.
Seoul Branch
Seoul, Korea
Tel: [phone]
Fax: [phone]
NEC Electronics Singapore Pte. Ltd.
United Square, Singapore 1130
Tel: [phone]
Fax: [phone]
NEC Electronics Taiwan Ltd.
Taipei, Taiwan
Tel: [phone]
Fax: [phone]
NEC do Brasil S.A.
Electron Devices Division
Rodovia Presidente Dutra, Km 214
07210-902-Guarulhos-SP Brasil
Tel: [phone]
Fax: [phone]
J99.1

6User’s Manual U11969EJ3V0UM00
Major Revisions in This Edition
Page Contents
Throughout Deletion of BVDD and BVSS
Modification of voltage of VPP
Addition of µ PD703006 to the target devices
p.44 Modification of description in 2.3 (19) MODE0 to MODE2 (Mode 0 to 2)
p.47 Modification of recommended connection method for pins P40/AD0 to P47/AD7, P50/AD8
to P57/AD15, P60/A16 to P67/A23, P90/LBEN/WRL, P91/UBEN, P92/R/W/WRH, P93/
DSTB/RD, P94/ASTB, P95/HLDAK, P96/HLDRQ, WAIT, and MODE0 to MODE2 in 2.4
Pin I/O Circuit Type and Connection of Unused Pins
p.53 Modification of description of EP flag in Figure 3-3 Program Status Word (PSW)
p.54 Modification of description in 3.3.2 Specifying operation mode
p.140 Addition of Caution in 6.5.1 (2) IDLE mode
p.140 Modification of description in 6.5.1 (3) (a) PLL mode
p.140 Modification of description in 6.5.1 (3) (b) Direct mode
p.142 Modification of description of CESEL bit in 6.5.2 (1) Power save control register (PSC)
p.149 Modification of description in 6.6 (1) Securing time using internal time base counter
(NMI pin input)
p.150 Modification of description in 6.6 (2) Securing time by signal level width (RESET pin
input)
p.159 Addition of Note in 7.2 (1) Timer 0 (24-bit timer/event counter)
p.161 Addition of description in 7.2.1 (1) Timers 0, 0L (TM0, TM0L)
p.206 Addition to the item Transfer rate in 8.2.1 Features
p.220 Addition to the item High transfer speed in 8.3.1 Features
p.241 Addition of Note to bits 4 and 5 in 8.4.4 (3) IIC clock selection register (IICCL)
p.242 Addition of Caution to 8.4.4 (4) IIC shift register (IIC)
p.276 Addition of 8.4.6 (15) (b) Operation during communication reservation (when a multi-
master is used), (c) Start operation after communication reservation (when a multi-
master is used), and (d) STT setting timing (when a multi-master is used)
p.299 Modification of description of function of bits FR2 to FR0 in the table in 9.3 (2) A/D
converter mode register 1 (ADM1)
p.301 Modification of setting value of ADM1 register in the table of operation and trigger modes
in 9.4.2 Operation mode and trigger mode
pp.308 to 310, Addition of Tables 9-1 to 9-9 and Figures 9-6 to 9-14
312 to 318
p.319 Modification of description in 9.8.2 Interval of the external/timer trigger
p.379 Addition of description in 13.2 (2) Power-ON reset
p.380 Modification of initial values after reset of timer registers (TM0, TM1, TM0L, TM1L, TM20
to TM24, TM3) in Table 13-2 Initial Values after Reset of Each Register (1/2)
p.384 Deletion of CSI2 in 14.3 Programming Environment
p.385 Deletion of CSI2, SO2, SI2, and SCK2 in 14.4 Communication System
p.388 Deletion of CSI2 and the pin used by CSI2 in the table of pins used by each serial
interface in 14.5.2 Serial interface pin
p.392 Deletion of CSI2 in Table 14-1 List of Communication Systems
p.393 Modification of the table of flash memory control commands in 14.6.4 Communication
command
The mark shows major revised points in this edition.

User’s Manual U11969EJ3V0UM00 7
INTRODUCTION
Readers This manual is intended for users who understand the functions of the V854
( µ PD703006,703008,70F3008,703008Y,70F3008Y)anddesignapplicationsystems
using the V854.
Purpose This manual is intended to enable users to understand the hardware functions
described in the Organization below.
Organization The V854 User’s Manual is divided into two parts: hardware (this manual) and
architecture (V850 FamilyTM Architecture User’s Manual) manuals.
Hardware Architecture
• Pin function • Data type
• CPU function • Register set
• Internal peripheral function • Instruction format and instruction set
• Flash memory programming • Interrupt and exception
mode • Pipeline operation
How to Read This Manual It is assumed that the readers of this manual have general knowledge of electrical
engineering, logic circuits, and microcontrollers.
• To find out the details of a register whose the name is known:
→Refer to APPENDIX A REGISTER INDEX.
• To findout the details of a function whose name is known:
→Refer to APPENDIX C INDEX.
• To understand the details of an instruction function:
→Refer to the V850 Family Architecture User’s Manual available separately.
• To understand the overall functions of the V854:
→Read this manual according to the Table of Contents.
Conventions Data significance: Higher digits on the left and lower digits on the right
Active low: xxx (overscore over pin or signal name)
Memory map address: High order at high stage and low order at low stage
Note: Footnote for items marked with Note in the text
Caution: Information requiring particular attention
Remark: Supplementary information
Number representation: Binary ... xxxx or xxxxB
Decimal ... xxxx
Hexadecimal ... xxxxH
Prefixes indicating power of 2 (address space, memory capacity):
K (kilo): 210 = 1024
M (mega): 220 = 10242
G (giga): 230 = 10243

8User’s Manual U11969EJ3V0UM00
Related documents Therelateddocumentsindicatedinthispublicationmayincludepreliminaryversions.
However, preliminary versions are not marked as such.
•Documents related to devices
Document Name Document No.
V850 Family Architecture User’s Manual U10243E
V850 Family Instruction Table U10229E
µ PD703008 Data Sheet To be prepared
µ PD703008Y Data Sheet To be prepared
µ PD70F3008 Data Sheet U12756E
µ PD70F3008Y Data Sheet U12755E
V854 Hardware User’s Manual This manual
• Documents related to development tools (User’s Manual)
Document Name Document No.
IE-703002-MC (In-circuit emulator) U11595E
IE-703008-MC-EM1 (In-circuit emulator option board) U12420E
CA850 (C Compiler Package) Operation (UNIXTM based) U12839E
Operation (WindowsTM based) U12827E
C Language U12840E
Assembly Language U10543E
ID850 (Ver.1.31) (Integrated Debugger) Operation Windows based U13716E
RX850 (Real Time OS) Basics U13430E
Technical U13431E
Installation U13410E
RX850 Pro (Real Time OS) Fundamental U13773E
Technical U13772E
Installation U13774E
RD850 (Task Debugger)Note U11158E
RD850 (Ver.3.0) (Task Debugger) U13737E
AZ850 (System Performance Analyzer) U11181E
SM850 (Ver.2.0) (System Simulator) Operation Windows based. Under preparation
Note Supports ID850 (Ver.1.31)

9
User’s Manual U11969EJ3V0UM00
TABLE OF CONTENTS
CHAPTER 1 INTRODUCTION .............................................................................................................. 23
1.1 General ..................................................................................................................................... 23
1.2 Features ................................................................................................................................... 24
1.3 Application Fields................................................................................................................... 25
1.4 Ordering Information.............................................................................................................. 25
1.5 Pin Identification (Top View)................................................................................................. 26
1.6 Function Block Configuration............................................................................................... 28
1.6.1 Internal block diagram ................................................................................................................. 28
1.6.2 Internal units................................................................................................................................. 29
CHAPTER 2 PIN FUNCTIONS............................................................................................................. 31
2.1 Pin Function List..................................................................................................................... 31
2.2 Pin Status................................................................................................................................. 36
2.3 Pin Function ............................................................................................................................ 37
2.4 Pin I/O Circuit Type and Connection of Unused Pins....................................................... 47
2.5 I/O Circuits of Pins ................................................................................................................. 48
CHAPTER 3 CPU FUNCTIONS ........................................................................................................... 49
3.1 Features ................................................................................................................................... 49
3.2 CPU Register Set .................................................................................................................... 50
3.2.1 Program register set .................................................................................................................... 51
3.2.2 System register set...................................................................................................................... 52
3.3 Operation Modes..................................................................................................................... 54
3.3.1 Operation modes ......................................................................................................................... 54
3.3.2 Specifying operation mode.......................................................................................................... 54
3.4 Address Space ........................................................................................................................ 56
3.4.1 CPU address space..................................................................................................................... 56
3.4.2 Image (Virtual Address Space) ................................................................................................... 57
3.4.3 Wrap-around of CPU address space.......................................................................................... 58
3.4.4 Memory map ................................................................................................................................59
3.4.5 Area .............................................................................................................................................. 60
3.4.6 External expansion mode............................................................................................................ 67
3.4.7 Recommended use of address space ........................................................................................ 69
3.4.8 Peripheral I/O registers ............................................................................................................... 71
3.4.9 Specific registers.......................................................................................................................... 77
CHAPTER 4 BUS CONTROL FUNCTION.......................................................................................... 81
4.1 Features ................................................................................................................................... 81
4.2 Bus Control Pins and Control Register............................................................................... 82
4.2.1 Bus control pins ........................................................................................................................... 82
4.2.2 Control register ............................................................................................................................ 82
4.3 Bus Access.............................................................................................................................. 83
4.3.1 Number of access clocks ............................................................................................................ 83

10 User’s Manual U11969EJ3V0UM00
4.3.2 Bus width...................................................................................................................................... 84
4.4 Memory Block Function......................................................................................................... 85
4.5 Wait Function .......................................................................................................................... 86
4.5.1 Programmable wait function........................................................................................................ 86
4.5.2 External wait function .................................................................................................................. 87
4.5.3 Relations between programmable wait and external wait ......................................................... 87
4.6 Idle State Insertion Function................................................................................................. 88
4.7 Bus Hold Function.................................................................................................................. 89
4.7.1 Outline of function........................................................................................................................ 89
4.7.2 Bus hold procedure...................................................................................................................... 89
4.7.3 Operation in power save mode ................................................................................................... 89
4.8 Bus Timing............................................................................................................................... 90
4.9 Bus Priority.............................................................................................................................. 97
4.10 Memory Boundary Operation Condition ............................................................................. 97
4.10.1 Program space............................................................................................................................. 97
4.10.2 Data space ................................................................................................................................... 97
4.11 Internal Peripheral I/O Interface ........................................................................................... 98
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION................................................. 99
5.1 Features ................................................................................................................................... 99
5.2 Non-Maskable Interrupt ....................................................................................................... 102
5.2.1 Operation.................................................................................................................................... 103
5.2.2 Restore ....................................................................................................................................... 105
5.2.3 Non-maskable interrupt status flag (NP) .................................................................................. 106
5.2.4 Noise elimination circuit of NMI pin .......................................................................................... 106
5.2.5 Edge detection function of NMI pin........................................................................................... 106
5.3 Maskable Interrupts.............................................................................................................. 107
5.3.1 Operation.................................................................................................................................... 109
5.3.2 Restore ....................................................................................................................................... 111
5.3.3 Priorities of maskable interrupts ............................................................................................... 112
5.3.4 Interrupt control register (xxICn) ............................................................................................... 116
5.3.5 In-service priority register (ISPR).............................................................................................. 118
5.3.6 Maskable interrupt status flag (ID)............................................................................................ 118
5.3.7 Noise elimination........................................................................................................................ 119
5.3.8 Edge detection function............................................................................................................. 120
5.3.9 Frequency divider ...................................................................................................................... 124
5.4 Software Exception .............................................................................................................. 126
5.4.1 Operation.................................................................................................................................... 126
5.4.2 Restore ....................................................................................................................................... 127
5.4.3 Exception status flag (EP)......................................................................................................... 128
5.5 Exception Trap ...................................................................................................................... 129
5.5.1 Illegal op code definition............................................................................................................ 129
5.5.2 Operation.................................................................................................................................... 129
5.5.3 Restore ....................................................................................................................................... 130
5.6 Multiple interrupt processing.............................................................................................. 131
5.7 Interrupt Response Time ..................................................................................................... 133

11
User’s Manual U11969EJ3V0UM00
5.8 Periods Where Interrupt is Not Acknowledged................................................................ 133
CHAPTER 6 CLOCK GENERATOR FUNCTION ............................................................................. 135
6.1 Features ................................................................................................................................. 135
6.2 Configuration......................................................................................................................... 135
6.3 Selecting Input Clock........................................................................................................... 136
6.3.1 Direct mode................................................................................................................................ 136
6.3.2 PLL mode ................................................................................................................................... 136
6.3.3 Clock control register (CKC) ..................................................................................................... 137
6.4 PLL Lock-up .......................................................................................................................... 139
6.5 Power Save Control.............................................................................................................. 140
6.5.1 General....................................................................................................................................... 140
6.5.2 Control registers......................................................................................................................... 142
6.5.3 HALT mode ................................................................................................................................ 143
6.5.4 IDLE mode ................................................................................................................................. 145
6.5.5 Software STOP mode................................................................................................................ 147
6.6 Specifying Oscillation Stabilization Time ......................................................................... 149
6.7 Clock Output Control ........................................................................................................... 152
6.7.1 Configuration.............................................................................................................................. 152
6.7.2 CLKOUT signal output control .................................................................................................. 152
6.7.3 CLO signal output control.......................................................................................................... 153
CHAPTER 7 TIMER/COUNTER FUNCTION (REAL-TIME PULSE UNIT)..................................... 157
7.1 Features ................................................................................................................................. 157
7.2 Basic Configuration.............................................................................................................. 158
7.2.1 Timer 0 ....................................................................................................................................... 161
7.2.2 Timer 1 ....................................................................................................................................... 162
7.2.3 Timer 2 ....................................................................................................................................... 164
7.2.4 Timer 3 ....................................................................................................................................... 165
7.3 Control Register.................................................................................................................... 166
7.4 Timer 0 Operation................................................................................................................. 174
7.4.1 Count operation ......................................................................................................................... 174
7.4.2 Count clock selection................................................................................................................. 175
7.4.3 Overflow ..................................................................................................................................... 176
7.4.4 Clearing/starting timer ............................................................................................................... 177
7.4.5 Capture operation ...................................................................................................................... 179
7.4.6 Compare operation .................................................................................................................... 181
7.5 Timer 1 Operation................................................................................................................. 183
7.5.1 Count operation ......................................................................................................................... 183
7.5.2 Count clock selection................................................................................................................. 183
7.5.3 Overflow ..................................................................................................................................... 184
7.5.4 Clearing/starting timer ............................................................................................................... 185
7.5.5 Capture operation ...................................................................................................................... 186
7.5.6 Compare operation .................................................................................................................... 187
7.6 Timer 2 Operation................................................................................................................. 188
7.6.1 Count operation ......................................................................................................................... 188

12 User’s Manual U11969EJ3V0UM00
7.6.2 Count clock selection................................................................................................................. 188
7.6.3 Overflow ..................................................................................................................................... 189
7.6.4 Clearing/starting timer ............................................................................................................... 189
7.6.5 Compare operation .................................................................................................................... 189
7.6.6 Toggle output ............................................................................................................................. 191
7.7 Timer 3 Operation................................................................................................................. 192
7.7.1 Count operation ......................................................................................................................... 192
7.7.2 Count clock selection................................................................................................................. 192
7.7.3 Overflow ..................................................................................................................................... 192
7.7.4 Clearing/starting timer ............................................................................................................... 193
7.7.5 Capture operation ...................................................................................................................... 193
7.7.6 Compare operation .................................................................................................................... 194
7.8 Application Examples .......................................................................................................... 195
7.9 Note......................................................................................................................................... 203
CHAPTER 8 SERIAL INTERFACE FUNCTION ............................................................................... 205
8.1 Features ................................................................................................................................. 205
8.2 Asynchronous Serial Interface (UART) ............................................................................. 206
8.2.1 Features ..................................................................................................................................... 206
8.2.2 Configuration of asynchronous serial interface........................................................................ 207
8.2.3 Control registers......................................................................................................................... 209
8.2.4 Interrupt request......................................................................................................................... 215
8.2.5 Operation.................................................................................................................................... 216
8.3 Clocked Serial Interface 0 to 3 (CSI0 to CSI3) ................................................................. 220
8.3.1 Features ..................................................................................................................................... 220
8.3.2 Configuration.............................................................................................................................. 220
8.3.3 Control registers......................................................................................................................... 222
8.3.4 Basic operation .......................................................................................................................... 224
8.3.5 Transmission in CSI0 to CSI3................................................................................................... 226
8.3.6 Reception in CSI0 to CSI3 ........................................................................................................ 227
8.3.7 Transmission/reception in CSI0 to CSI3 .................................................................................. 228
8.3.8 System configuration example .................................................................................................. 230
8.4 I2C Bus ( µ PD703008Y and 70F3008Y only) ....................................................................... 231
8.4.1 Features ..................................................................................................................................... 231
8.4.2 Functions.................................................................................................................................... 232
8.4.3 Configuration.............................................................................................................................. 234
8.4.4 Serial interface control register ................................................................................................. 236
8.4.5 I2C bus functions........................................................................................................................ 242
8.4.6 Definition and controls of I2C bus ............................................................................................. 243
8.4.7 Communication operation.......................................................................................................... 277
8.4.8 Timing chart ............................................................................................................................... 279
8.5 Baud Rate Generator 0 to 3 (BRG0 to BRG3) .................................................................. 286
8.5.1 Configuration and function ........................................................................................................ 286
8.5.2 Baud rate generator compare registers 0 to 3 (BRGC0 to BRGC3) ...................................... 291
8.5.3 Baud rate generator prescaler mode registers 0 to 3 (BPRM0 to BPRM3) ........................... 292
8.6 Selection of Operational Serial Interface .......................................................................... 293

13
User’s Manual U11969EJ3V0UM00
CHAPTER 9 A/D CONVERTER ......................................................................................................... 295
9.1 Features ................................................................................................................................. 295
9.2 Configuration......................................................................................................................... 295
9.3 Control Register.................................................................................................................... 297
9.4 A/D Converter Operation ..................................................................................................... 301
9.4.1 Basic operation of A/D converter.............................................................................................. 301
9.4.2 Operation mode and trigger mode............................................................................................ 301
9.5 Operation in the A/D Trigger Mode.................................................................................... 308
9.5.1 Select mode operation............................................................................................................... 308
9.5.2 Scan mode operation................................................................................................................. 310
9.6 Operation in the Timer Trigger Mode ................................................................................ 311
9.6.1 Select mode operation............................................................................................................... 311
9.6.2 Scan mode operation................................................................................................................. 314
9.7 Operation in the External Trigger Mode............................................................................ 315
9.7.1 Select mode operation (External trigger select)....................................................................... 315
9.7.2 Scan mode operation (External trigger scan) .......................................................................... 318
9.8 Precautions Regarding Operations.................................................................................... 319
9.8.1 Stop of conversion operations .................................................................................................. 319
9.8.2 Interval of the external/timer trigger.......................................................................................... 319
9.8.3 Operation in the standby mode................................................................................................. 319
9.8.4 Compare coincide interrupt in the timer trigger mode ............................................................. 319
CHAPTER 10 REAL-TIME OUTPUT FUNCTION............................................................................. 321
10.1 Configuration and Function ................................................................................................ 321
10.2 Control Register.................................................................................................................... 322
10.3 Operation ............................................................................................................................... 322
10.4 Example.................................................................................................................................. 323
CHAPTER 11 PWM UNIT................................................................................................................... 325
11.1 Features ................................................................................................................................. 325
11.2 Configuration......................................................................................................................... 326
11.3 Control Register.................................................................................................................... 327
11.4 PWM Operations ................................................................................................................... 330
11.4.1 Basic operations of PWM .......................................................................................................... 330
11.4.2 Enabling/disabling PWM operation ........................................................................................... 332
11.4.3 Specification of active level of PWM pulse .............................................................................. 333
11.4.4 Specification of PWM pulse width rewrite cycle....................................................................... 333
11.4.5 Repetition frequency.................................................................................................................. 335
CHAPTER 12 PORT FUNCTION ....................................................................................................... 337
12.1 Features ................................................................................................................................. 337
12.2 Basic Configuration of Ports .............................................................................................. 338
12.3 Port Pin Function.................................................................................................................. 348
12.3.1 Port 0.......................................................................................................................................... 348
12.3.2 Port 1.......................................................................................................................................... 350
12.3.3 Port 2.......................................................................................................................................... 352

14 User’s Manual U11969EJ3V0UM00
12.3.4 Port 3.......................................................................................................................................... 354
12.3.5 Port 4.......................................................................................................................................... 357
12.3.6 Port 5.......................................................................................................................................... 359
12.3.7 Port 6.......................................................................................................................................... 361
12.3.8 Port 7, port 8 .............................................................................................................................. 363
12.3.9 Port 9.......................................................................................................................................... 364
12.3.10 Port 10........................................................................................................................................ 366
12.3.11 Port 11........................................................................................................................................ 368
12.3.12 Port 12........................................................................................................................................ 371
12.3.13 Port 13........................................................................................................................................ 373
12.3.14 Port 14........................................................................................................................................ 375
CHAPTER 13 RESET FUNCTION ..................................................................................................... 377
13.1 Features ................................................................................................................................. 377
13.2 Pin Function .......................................................................................................................... 377
13.3 Initialize .................................................................................................................................. 379
CHAPTER 14 FLASH MEMORY ( µ PD70F3008 AND 70F3008Y ONLY) ..................................... 383
14.1 Features ................................................................................................................................. 383
14.2 Writing by Flash Writer ........................................................................................................ 383
14.3 Programming Environment ................................................................................................. 384
14.4 Communication System....................................................................................................... 385
14.5 Pin Handling .......................................................................................................................... 386
14.5.1 VPP pin ........................................................................................................................................ 387
14.5.2 Serial interface pin..................................................................................................................... 388
14.5.3 Reset pin .................................................................................................................................... 390
14.5.4 NMI pin ....................................................................................................................................... 390
14.5.5 Mode pin..................................................................................................................................... 390
14.5.6 Port pin ....................................................................................................................................... 390
14.5.7 Other signal pin.......................................................................................................................... 390
14.5.8 Power supply.............................................................................................................................. 390
14.6 Programming Method........................................................................................................... 391
14.6.1 Flash memory control ................................................................................................................ 391
14.6.2 Flash memory programming mode ........................................................................................... 392
14.6.3 Selection of communication mode............................................................................................ 392
14.6.4 Communication command ......................................................................................................... 393
14.6.5 Resources used ......................................................................................................................... 393
CHAPTER 15 DIFFERENCES BETWEEN VERSIONS.................................................................... 395
15.1 Differences between Versions with I2C Function and Versions without
I2C Function ........................................................................................................................... 395
15.2 Differences between On-chip Flash Memory Versions, On-chip Mask ROM
Versions, and ROM-less Versions ..................................................................................... 395

15
User’s Manual U11969EJ3V0UM00
APPENDIX A REGISTER INDEX....................................................................................................... 397
APPENDIX B INSTRUCTION SET LIST........................................................................................... 403
APPENDIX C INDEX ........................................................................................................................... 409

16 User’s Manual U11969EJ3V0UM00
LIST OF FIGURES (1/4)
Figure No. Title Page
3-1. Program Counter (PC) ................................................................................................................ 51
3-2. Interrupt Source Register (ECR) ................................................................................................ 52
3-3. Program Status Word (PSW) ..................................................................................................... 53
3-4. CPU Address Space ................................................................................................................... 56
3-5. Image on Address Space ........................................................................................................... 57
3-6. External Memory Area (when expanded to 64 K, 256 K, or 1 Mbytes) ................................... 64
3-7. External Memory Area (when expanded to 4 Mbytes).............................................................. 65
3-8. External Memory Area (when fully expanded)........................................................................... 66
3-9. Recommended Memory Map...................................................................................................... 70
4-1. Example of Inserting Wait States ............................................................................................... 87
5-1. Non-Maskable Interrupt Processing ......................................................................................... 103
5-2. Accepting Non-Maskable Interrupt Request ............................................................................ 104
5-3. RETI Instruction Processing ..................................................................................................... 105
5-4. Block Diagram of Maskable Interrupt....................................................................................... 108
5-5. Maskable Interrupt Processing ................................................................................................. 110
5-6. RETI Instruction Processing ..................................................................................................... 111
5-7. Example of Interrupt Nesting Process ..................................................................................... 113
5-8. Example of Processing Interrupt Requests Simultaneously Generated ................................ 115
5-9. Example of Noise Elimination Timing ...................................................................................... 119
5-10. Software Exception Processing................................................................................................ 126
5-11. RETI Instruction Processing ..................................................................................................... 127
5-12. Exception Trap Processing....................................................................................................... 129
5-13. RETI Instruction Processing ..................................................................................................... 130
5-14. Pipeline Operation at Interrupt Request Acknowledge (General Description)....................... 133
6-1. Block Configuration ................................................................................................................... 151
6-2. CLO Signal Output Timing........................................................................................................ 153
7-1. Basic Operation of Timer 0....................................................................................................... 174
7-2. Operation after Occurrence of Overflow (when ECLR0 = 0, OST0 = 1) ............................... 176
7-3. Clearing/Starting Timer by TCLR0 Signal Input
(when ECLR0 = 1, CCLR0 = 0, OST0 = 0) ............................................................................. 177
7-4. Relations between Clear/Start by TCLR0 Signal Input and Overflow
(when ECLR0 = 1, OST0 = 1) .................................................................................................. 178
7-5. Clearing/Starting Timer by CC03 Coincidence (when CCLR0 =1, OST0 = 0) ...................... 178
7-6. Relations between Clear/Start by CC03 Coincidence and Overflow Operation
(when CCLR0 = 1, OST0 = 1).................................................................................................. 179
7-7. Example of TM0 Capture Operation ........................................................................................ 180
7-8. Example of TM0 Capture Operation (when both edges are specified).................................. 180
7-9. Example of Compare Operation ............................................................................................... 181

17
User’s Manual U11969EJ3V0UM00
LIST OF FIGURES (2/4)
Figure No. Title Page
7-10. Example of TM0 Compare Operation (set/reset output mode)............................................... 182
7-11. Basic Operation of Timer 1....................................................................................................... 183
7-12. Operation after Occurrence of Overflow (OST1 = 1) .............................................................. 185
7-13. Clearing/Starting Timer by Software (when OST1 = 1) .......................................................... 185
7-14. Example of TM1 Capture Operation ........................................................................................ 186
7-15. Example of Compare Operation............................................................................................... 187
7-16. Basic Operation of Timer 2....................................................................................................... 188
7-17. Operation with CM2n at 1 to FFFFH........................................................................................ 190
7-18. When CM2n is Set to 0............................................................................................................. 190
7-19. Example of Toggle Output Operation ...................................................................................... 191
7-20. Basic Operation of Timer 3....................................................................................................... 192
7-21. Example of TM3 Capture Operation
(when ES301 = 0, ES300 = 0, CMS3 = 0, CE3 = 1) .............................................................. 194
7-22. Example of Timing of Interval Timer Operation (timer 2) ....................................................... 195
7-23. Setting Procedure of Interval Timer Operation (timer 2)......................................................... 195
7-24. Pulse Width Measurement Timing (timer 0) ............................................................................ 196
7-25. Setting Procedure for Pulse Width Measurement (timer 0) .................................................... 197
7-26. Interrupt Request Processing Routine Calculating Pulse Width (timer 0) ............................. 197
7-27. Example of PWM Output Timing .............................................................................................. 198
7-28. Example of PWM Output Programming Procedure................................................................. 199
7-29. Example of Interrupt Request Processing Routine, Modifying Compare Value .................... 200
7-30. Example of Frequency Measurement Timing .......................................................................... 201
7-31. Example of Set-up Procedure for Frequency Measurement .................................................. 202
7-32. Example of Interrupt Request Processing Routine Calculating Cycle ................................... 202
8-1. Block Diagram of Asynchronous Serial Interface.................................................................... 208
8-2. Format of Transmit/Receive Data of Asynchronous Serial Interface ..................................... 216
8-3. Asynchronous Serial Interface Transmission Completion Interrupt Timing ........................... 217
8-4. Asynchronous Serial Interface Reception Completion Interrupt Timing................................. 219
8-5. Receive Error Timing ................................................................................................................ 219
8-6. Block Diagram of Clocked Serial Interface .............................................................................. 221
8-7. Timing of 3-Wire Serial I/O Mode (transmission) .................................................................... 226
8-8. Timing of 3-Wire Serial I/O Mode (reception).......................................................................... 227
8-9. Timing of 3-Wire Serial I/O Mode (transmission/reception).................................................... 229
8-10. Example of CSI System Configuration..................................................................................... 230
8-11. Example of Serial Bus Configuration Using I2C Bus ............................................................... 232
8-12. Block Diagram of I2C Bus ......................................................................................................... 233
8-13. Pin Configuration....................................................................................................................... 242
8-14. Serial Data Transfer Timing of I2C Bus.................................................................................... 243
8-15. Start Condition........................................................................................................................... 243
8-16. Address...................................................................................................................................... 244
8-17. Transfer Direction Specification ............................................................................................... 245

18 User’s Manual U11969EJ3V0UM00
LIST OF FIGURES (3/4)
Figure No. Title Page
8-18. Acknowledge Signal .................................................................................................................. 246
8-19. Stop Condition........................................................................................................................... 247
8-20. Wait Signal ................................................................................................................................ 248
8-21. Example of Arbitration Timing .................................................................................................. 272
8-22. Communication Reservation Timing ........................................................................................ 274
8-23. Communication Reservation Procedure................................................................................... 275
8-24. STT Setting Timing Procedure ................................................................................................. 276
8-25. Master Operation Procedure .................................................................................................... 277
8-26. Slave Operation Procedure ...................................................................................................... 278
8-27. Example of Master →Slave Communication
(9-clock wait is selected both for master and slave)............................................................... 280
8-28. Example of Slave →Master Communication
(9-clock wait is selected both for master and slave)............................................................... 283
8-29. Block Diagram of Baud Rate Generator .................................................................................. 287
9-1. Block Diagram of A/D Converter .............................................................................................. 296
9-2. Relation between Analog Input Voltage and A/D Conversion Result .................................... 300
9-3. Operation Timing Example of Select Mode: 1-Buffer Mode (ANI1) ....................................... 303
9-4. Operation Timing Example of Select Mode: 4-Buffer Mode (ANI6) ....................................... 304
9-5. Operation Timing Example of Scan Mode: 4-Channel Scan (ANI0 to ANI3) ........................ 306
9-6. Example of 1-Buffer Mode (A/D trigger select 1-buffer) Operation ........................................ 308
9-7. Example of 4-Buffer Mode (A/D trigger select 4-buffer) Operation ........................................ 309
9-8. Example of Scan Mode (A/D trigger scan) Operation............................................................. 310
9-9. Example of 1-Buffer Mode (timer trigger select 1-buffer) Operation...................................... 312
9-10. Example of Operation in 4-Buffer Mode (timer trigger select 4-buffer).................................. 313
9-11. Example of Scan Mode (timer trigger scan) Operation........................................................... 314
9-12. Example of 1-Buffer Mode (external trigger select 1-buffer) Operation................................. 316
9-13. Example of 4-Buffer Mode (external trigger select 4-buffer) Operation................................. 317
9-14. Example of Scan Mode (external trigger scan) Operation...................................................... 318
10-1. Block Diagram of Real-Time Output Port ................................................................................ 321
10-2. Operational Timings of Real-Time Output Port ....................................................................... 323
11-1. Configuration of PWM Unit ....................................................................................................... 326
11-2. Basic Operations of PWM......................................................................................................... 330
11-3. Example of PWM Output by Main Pulse and Additional Pulse .............................................. 331
11-4. Example of PWM Output Operation......................................................................................... 331
11-5. Operation Timing of PWM ........................................................................................................ 332
11-6. Setting of Active Level of PWM Output ................................................................................... 333
11-7. Example 1 of PWM Output Timing (PWM pulse width rewrite cycle 2(x+8)/fPWMC) ................. 334
11-8. Example 2 of PWM Output Timing (PWM pulse width rewrite cycle 2x/fPWMC) ...................... 334

19
User’s Manual U11969EJ3V0UM00
LIST OF FIGURES (4/4)
Figure No. Title Page
12-1. Block Diagram of Type A.......................................................................................................... 342
12-2. Block Diagram of Type B.......................................................................................................... 342
12-3. Block Diagram of Type C.......................................................................................................... 343
12-4. Block Diagram of Type D.......................................................................................................... 343
12-5. Block Diagram of Type E.......................................................................................................... 344
12-6. Block Diagram of Type F .......................................................................................................... 344
12-7. Block Diagram of Type G ......................................................................................................... 345
12-8. Block Diagram of Type H.......................................................................................................... 345
12-9. Block Diagram of Type I ........................................................................................................... 346
12-10. Block Diagram of Type J .......................................................................................................... 346
12-11. Block Diagram of Type K.......................................................................................................... 347

20 User’s Manual U11969EJ3V0UM00
LIST OF TABLES (1/2)
Table No. Title Page
3-1. Program Registers ...................................................................................................................... 51
3-2. System Register Numbers.......................................................................................................... 52
3-3. Interrupt/Exception Table............................................................................................................ 61
4-1. Bus Priority .................................................................................................................................. 97
5-1. Interrupt List............................................................................................................................... 100
6-1. Operation of Clock Generator by Power Save Control ........................................................... 141
6-2. Operating Status in HALT Mode .............................................................................................. 143
6-3. Operating Status in IDLE Mode ............................................................................................... 145
6-4. Operating Status in Software STOP Mode.............................................................................. 147
6-5. Example of Count Time ............................................................................................................ 151
7-1. List of Real-Time Pulse Unit (RPU) Configuration .................................................................. 158
7-2. Capture Trigger Signal to 24-Bit Capture Register ................................................................. 179
7-3. Interrupt Request Signal from 24-Bit Compare Register ........................................................ 181
7-4. Capture Trigger Signal to 24-Bit Capture Register ................................................................. 186
7-5. Interrupt Request Signal from 24-Bit Compare Register ........................................................ 187
7-6. Capture Trigger Signal to 16-Bit Capture Register ................................................................. 193
8-1. Default Priority of Interrupts...................................................................................................... 215
8-2. I2C Bus Configuration................................................................................................................ 234
8-3. INTIIC Generation Timing and Wait Control............................................................................ 270
8-4. Definition of Extension Code Bit............................................................................................... 271
8-5. Wait Time................................................................................................................................... 273
8-6. Baud Rate Generators 0 to 3 Set-up Values (when typical clocks are used) ....................... 289
9-1. Correspondence between Analog Input Pin and ADCRn Register
(1-buffer mode (A/D trigger select 1-buffer)) ........................................................................... 308
9-2. Correspondence between Analog Input Pin and ADCRn Register
(4-buffer mode (A/D trigger select 4-buffer)) ........................................................................... 309
9-3. Correspondence between Analog Input Pin and ADCRn Register
(scan mode (A/D trigger scan) ................................................................................................. 310
9-4. Correspondence between Analog Input Pin and ADCRn Register
(1-buffer mode (timer trigger select 1-buffer)) ......................................................................... 312
9-5. Correspondence between Analog Input Pin and ADCRn Register
(4-buffer mode (timer trigger select 4-buffer)) ......................................................................... 313
9-6. Correspondence between Analog Input Pin and ADCRn Register
(scan mode (timer trigger scan)) .............................................................................................. 314
9-7. Correspondence between Analog Input Pin and ADCRn Register
(1-buffer mode (external trigger select 1-buffer)) .................................................................... 315